From: David Edelsohn <dje.gcc@gmail.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH 3/3] lt0_disi
Date: Mon, 20 Jul 2015 16:24:00 -0000 [thread overview]
Message-ID: <CAGWvnykzukbUBnDn_LOheDtSZ__RNbhShCzqB9zfeAEMuB7u-w@mail.gmail.com> (raw)
In-Reply-To: <1286bfa08e97c91f44b81556a3d26d2100c76fc5.1437404024.git.segher@kernel.crashing.org>
On Mon, Jul 20, 2015 at 12:04 PM, Segher Boessenkool
<segher@kernel.crashing.org> wrote:
> After Kyrill's patch (r225996) (changing combine to do simplification
> before doing some transformations) a shortcoming of the rs6000 backend
> becomes obvious: we have no patterns to handle
>
> (set (reg:DI) (lt:DI (reg:SI) (const_int 0)))
>
> although we can do that with a single rotate-and-mask instruction.
> Previously, combine usually came up with a more complex pattern (that
> we do implement), hiding the issue.
>
> This patch adds a define_insn for the pattern.
>
>
> 2015-07-20 Segher Boessenkool <segher@kernel.crashing.org>
>
> * config/rs6000/rs6000.md (*lt0_disi): New.
This is okay.
Thanks, David
prev parent reply other threads:[~2015-07-20 16:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-20 16:13 [PATCH 0/3] rs6000: Some updates for rotate etc Segher Boessenkool
2015-07-20 16:13 ` [PATCH 1/3] Doc fixes for rot Segher Boessenkool
2015-07-20 16:19 ` David Edelsohn
2015-07-20 16:14 ` [PATCH 2/3] Fix shift amount (GPR->SI) Segher Boessenkool
2015-07-20 16:20 ` David Edelsohn
2015-07-20 16:18 ` [PATCH 3/3] lt0_disi Segher Boessenkool
2015-07-20 16:24 ` David Edelsohn [this message]
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