From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [IPv6:2a00:1450:4864:20::535]) by sourceware.org (Postfix) with ESMTPS id 53BDA39960E2 for ; Thu, 17 Nov 2022 13:25:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 53BDA39960E2 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x535.google.com with SMTP id i21so2489794edj.10 for ; Thu, 17 Nov 2022 05:25:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=pfTgQTSF8tbPqqiBaA7lk7cROStBWe3kRR/QM0yXmPA=; b=BiRRYk28bguz/MZ83hck4isdhFPuZeiqC+tXLfHuVuA0aluEqZRoA2RxGzmDcgltWM qXouyw/e6YgpeDkMMxJku2gYhM6f4xyezwdd38eVLa2ujf6M5sK4TxRQH1dXKsUqZzUy Z9994qRkTVcYQIhbVedt8+817Ub1/rmy2cRpYJp0m1u7na4HOWbisF8KKIqjhj++kTBl e/wgbsE15MB+wBsZG2v33lvUXA32tzyKRGzgEX2YsGoNnK0P/MkqXBbEZYPhHyXp3bm6 X55SmZ2FM7RnHrLImOEAuPiI4ypRVL+yqJclrkh03X/dbN9EzZGVgmJ2ZNa6niYRk+Dd tyFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=pfTgQTSF8tbPqqiBaA7lk7cROStBWe3kRR/QM0yXmPA=; b=aCPSmVHfAzsqYkHqcOMe1TJb1syh8hRWmwJYDQ/lwrl3fEtNO+eOwtq3QMFBW9Tx9d NZHSjbhS3ci0K7PQFCGW/t9c09fqDjfUWc7cH4KWwNdfShkiwXSWbNAq9Fs0XG/i25/M kSscx2+MU+MHRI91DNsJ0dgkl7AZTUTHmAwilzeyXJ0Vv3S5cjsPRYGidhkq0e2t9y54 yZV3HUb8BFxf8sxY+PSeml3pbePPqyapa+LrEZitQgCQDst4WFed16bsz/AaQepVj++k uFBv9DuYTLmVu4voyM+ST/42Elh/MzNnya2/HdEhDJDPew7GMK6AjpbK++R/ToxoaQGt 8HNg== X-Gm-Message-State: ANoB5pm47btb0KZP4uTY4P7YJ7XwSpY+K6ybwwqPL3p6klD44uiJDoeL mNYzWcjmuUJG8AvgBw4n2SWwQo15wiPbnZg6fVg= X-Google-Smtp-Source: AA0mqf4jChIHl29eRjTLXPD0t1WaNyf8ezdnbXava6jjrRX3VAroI3DoatDllms8XOaRgQVEOKqqeyDgZ+AkQfYAlMA= X-Received: by 2002:a05:6402:1050:b0:467:e9a5:77c5 with SMTP id e16-20020a056402105000b00467e9a577c5mr2128089edu.289.1668691527832; Thu, 17 Nov 2022 05:25:27 -0800 (PST) MIME-Version: 1.0 References: <438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com> In-Reply-To: <438c6628-0b9c-e5d0-e198-2fd6edd16a93@linux.ibm.com> From: David Edelsohn Date: Thu, 17 Nov 2022 08:24:48 -0500 Message-ID: Subject: Re: [PATCHv2, rs6000] Enable have_cbranchcc4 on rs6000 To: HAO CHEN GUI Cc: gcc-patches , Segher Boessenkool , "Kewen.Lin" , Peter Bergner Content-Type: multipart/alternative; boundary="000000000000c198cc05edaa85b5" X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,HTML_MESSAGE,KAM_NUMSUBJECT,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --000000000000c198cc05edaa85b5 Content-Type: text/plain; charset="UTF-8" On Thu, Nov 17, 2022 at 1:39 AM HAO CHEN GUI wrote: > Hi, > The patch enables have_cbrnachcc4 which is a flag in ifcvt.cc to > indicate if branch by CC bits is invalid or not. The new expand pattern > "cbranchcc4" is created which intend to match the pattern defined in > "*cbranch", "*cbranch_2insn" and "*creturn". The operand sequence in > "cbranchcc4" is inline with the definition in gccint. And the operand > sequence doesn't matter in pattern matching. So I think it should work. > > Compared to last version, one new predicate and one new expander are > created. > > Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. > Is this okay for trunk? Any recommendations? Thanks a lot. > > ChangeLog > 2022-11-17 Haochen Gui > > gcc/ > * config/rs6000/predicates.md (all_branch_comparison_operator): > New, > and includes operators in branch_comparison_operator and > extra_insn_branch_comparison_operator. > * config/rs6000/rs6000.md (cbranchcc4): New expand pattern. > > gcc/testsuite/ > * gcc.target/powerpc/cbranchcc4.c: New. > > > patch.diff > diff --git a/gcc/config/rs6000/predicates.md > b/gcc/config/rs6000/predicates.md > index b1fcc69bb60..843b6f39b84 100644 > --- a/gcc/config/rs6000/predicates.md > +++ b/gcc/config/rs6000/predicates.md > @@ -1308,6 +1308,7 @@ (define_special_predicate "equality_operator" > > ;; Return 1 if OP is a comparison operation that is valid for a branch > ;; instruction. We check the opcode against the mode of the CC value. > + > ;; validate_condition_mode is an assertion. > (define_predicate "branch_comparison_operator" > (and (match_operand 0 "comparison_operator") > @@ -1331,6 +1332,11 @@ (define_predicate > "extra_insn_branch_comparison_operator" > GET_MODE (XEXP (op, 0))), > 1"))) > > +;; Return 1 if OP is a comparison operation that is valid for a branch. > +(define_predicate "all_branch_comparison_operator" > + (ior (match_operand 0 "branch_comparison_operator") > + (match_operand 0 "extra_insn_branch_comparison_operator"))) > + > ;; Return 1 if OP is an unsigned comparison operator. > (define_predicate "unsigned_comparison_operator" > (match_code "ltu,gtu,leu,geu")) > diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md > index e9e5cd1e54d..7b7d747a85d 100644 > --- a/gcc/config/rs6000/rs6000.md > +++ b/gcc/config/rs6000/rs6000.md > @@ -13067,6 +13067,16 @@ (define_insn_and_split "*_cc" > ;; Conditional branches. > ;; These either are a single bc insn, or a bc around a b. > > +(define_expand "cbranchcc4" > + [(set (pc) > + (if_then_else (match_operator 0 "all_branch_comparison_operator" > + [(match_operand 1 "cc_reg_operand") > + (match_operand 2 "zero_constant")]) > + (label_ref (match_operand 3)) > + (pc)))] > + "" > + "") > + > This is better, but the pattern should be near and after the existing cbranch4 patterns earlier in the file, not the *cbranch pattern. It doesn't match the comment. Why are you using zero_constant predicate instead of matching (const_int 0) for operand 2? Why does this need the new all_branch_comparison_operator? Can the ifcvt optimization correctly elide the 2 insn sequence? Thanks, David > (define_insn "*cbranch" > [(set (pc) > (if_then_else (match_operator 1 "branch_comparison_operator" > diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4.c > b/gcc/testsuite/gcc.target/powerpc/cbranchcc4.c > new file mode 100644 > index 00000000000..528ba1a878d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4.c > @@ -0,0 +1,11 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -fdump-rtl-ce1" } */ > +/* { dg-final { scan-rtl-dump "noce_try_store_flag_constants" "ce1" } } */ > + > +/* The inner branch should be detected by ifcvt then be converted to a > setcc > + with a plus by noce_try_store_flag_constants. */ > + > +int test (unsigned int a, unsigned int b) > +{ > + return (a < b ? 0 : (a > b ? 2 : 1)); > +} > --000000000000c198cc05edaa85b5--