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From: David Edelsohn <dje.gcc@gmail.com>
To: Michael Meissner <meissner@linux.ibm.com>,
	Segher Boessenkool <segher@kernel.crashing.org>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
	will schmidt <will_schmidt@vnet.ibm.com>,
	 Bill Schmidt <wschmidt@linux.ibm.com>,
	Peter Bergner <bergner@linux.ibm.com>
Subject: Re: [PATCH 2/5] Add Power10 XXSPLTI* and LXVKQ instructions (LXVKQ)
Date: Tue, 14 Dec 2021 11:57:05 -0500	[thread overview]
Message-ID: <CAGWvnymG7yWfzouBDuDHxU7UmOk6H2HhtsG6dqfybZig0ZXeag@mail.gmail.com> (raw)
In-Reply-To: <YYVxiZbyfoBm+7qs@toto.the-meissners.org>

On Fri, Nov 5, 2021 at 2:01 PM Michael Meissner <meissner@linux.ibm.com> wrote:
>
> On Fri, Nov 05, 2021 at 12:52:51PM -0500, will schmidt wrote:
> > > diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
> > > index 956e42bc514..e0d1c718e9f 100644
> > > --- a/gcc/config/rs6000/predicates.md
> > > +++ b/gcc/config/rs6000/predicates.md
> > > @@ -601,6 +601,14 @@ (define_predicate "easy_fp_constant"
> > >    if (TARGET_VSX && op == CONST0_RTX (mode))
> > >      return 1;
> > >
> > > +  /* Constants that can be generated with ISA 3.1 instructions are easy.  */
> >
> > Easy is relative, but OK.
>
> The names of the function is easy_fp_constant.
>
> > > +  vec_const_128bit_type vsx_const;
> > > +  if (TARGET_POWER10 && vec_const_128bit_to_bytes (op, mode, &vsx_const))
> > > +    {
> > > +      if (constant_generates_lxvkq (&vsx_const) != 0)
> > > +   return true;
> > > +    }
> > > +
> > >    /* Otherwise consider floating point constants hard, so that the
> > >       constant gets pushed to memory during the early RTL phases.  This
> > >       has the advantage that double precision constants that can be
> > > @@ -609,6 +617,23 @@ (define_predicate "easy_fp_constant"
> > >     return 0;
> > >  })
> > >
> > > +;; Return 1 if the operand is a special IEEE 128-bit value that can be loaded
> > > +;; via the LXVKQ instruction.
> > > +
> > > +(define_predicate "easy_vector_constant_ieee128"
> > > +  (match_code "const_vector,const_double")
> > > +{
> > > +  vec_const_128bit_type vsx_const;
> > > +
> > > +  /* Can we generate the LXVKQ instruction?  */
> > > +  if (!TARGET_IEEE128_CONSTANT || !TARGET_FLOAT128_HW || !TARGET_POWER10
> > > +      || !TARGET_VSX)
> > > +    return false;
> >
> > Presumably all of the checks there are valid.  (Can we have power10
> > without float128_hw or ieee128_constant flags set?)    I do notice the
> > addition of an ieee128_constant flag below.
>
> Yes, we can have power10 without float128_hw.  At the moment, 32-bit big endian
> does not enable the 128-bit IEEE instructions.  Also when we are building the
> bits in libgcc that can switch between compiling the software routines and the
> routines used for IEEE hardware, and when we are building the IEEE 128-bit
> software emulation functions we need to explicitly turn off IEEE 128-bit
> hardware support.
>
> Similarly for VSX, if the user explicitly says -mno-vsx, then we can't enable
> this instruction.
>
> > Ok.  I did look at this a bit before it clicked, so would suggest a
> > comment stl "All of the constants that can be loaded by lxvkq will have
> > zero in the bottom 3 words, so ensure those are zero before we use a
> > switch based on the nonzero portion of the constant."
> >
> > It would be fine as-is too.  :-)
>
> Ok.

Okay.

Thanks, David

  reply	other threads:[~2021-12-14 16:57 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-05  4:02 [PATCH 0/5] Add Power10 XXSPLTI* and LXVKQ instructions Michael Meissner
2021-11-05  4:04 ` [PATCH 1/5] Add XXSPLTI* and LXVKQ instructions (new data structure and function) Michael Meissner
2021-11-05 17:01   ` will schmidt
2021-11-05 18:13     ` Michael Meissner
2021-12-14 16:57       ` David Edelsohn
2021-11-15 16:35   ` Ping: " Michael Meissner
2021-12-13 16:58   ` Ping #2: " Michael Meissner
2021-11-05  4:07 ` [PATCH 2/5] Add Power10 XXSPLTI* and LXVKQ instructions (LXVKQ) Michael Meissner
2021-11-05 17:52   ` will schmidt
2021-11-05 18:01     ` Michael Meissner
2021-12-14 16:57       ` David Edelsohn [this message]
2021-11-15 16:36   ` Ping: " Michael Meissner
2021-12-13 17:02   ` Ping #2: " Michael Meissner
2021-11-05  4:09 ` [PATCH 3/5] Add Power10 XXSPLTIW Michael Meissner
2021-11-05 18:50   ` will schmidt
2021-12-14 16:59     ` David Edelsohn
2021-11-15 16:37   ` Ping: " Michael Meissner
2021-12-13 17:04   ` Ping #2: " Michael Meissner
2021-11-05  4:10 ` [PATCH 4/5] Add Power10 XXSPLTIDP for vector constants Michael Meissner
2021-11-05 19:24   ` will schmidt
2021-12-14 17:00     ` David Edelsohn
2021-11-15 16:38   ` Ping: " Michael Meissner
2021-12-13 17:06   ` Ping #2: " Michael Meissner
2021-11-05  4:11 ` [PATCH 5/5] Add Power10 XXSPLTIDP for SFmode/DFmode constants Michael Meissner
2021-11-05 19:38   ` will schmidt
2021-12-14 17:01     ` David Edelsohn
2021-11-15 16:38   ` Ping: " Michael Meissner
2021-12-13 17:07   ` Ping #2: " Michael Meissner
2021-11-05 13:08 ` [PATCH 0/5] Add Power10 XXSPLTI* and LXVKQ instructions Michael Meissner

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