From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-patches-return-400185-listarch-gcc-patches=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 88959 invoked by alias); 10 Jun 2015 00:28:39 -0000
Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-patches.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-patches/>
List-Post: <mailto:gcc-patches@gcc.gnu.org>
List-Help: <mailto:gcc-patches-help@gcc.gnu.org>
Sender: gcc-patches-owner@gcc.gnu.org
Received: (qmail 88942 invoked by uid 89); 10 Jun 2015 00:28:38 -0000
Authentication-Results: sourceware.org; auth=none
X-Virus-Found: No
X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_05,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2
X-HELO: mail-ie0-f177.google.com
Received: from mail-ie0-f177.google.com (HELO mail-ie0-f177.google.com) (209.85.223.177) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 10 Jun 2015 00:28:37 +0000
Received: by ieclw1 with SMTP id lw1so24274804iec.3        for <gcc-patches@gcc.gnu.org>; Tue, 09 Jun 2015 17:28:35 -0700 (PDT)
MIME-Version: 1.0
X-Received: by 10.50.109.138 with SMTP id hs10mr2117820igb.48.1433896115787; Tue, 09 Jun 2015 17:28:35 -0700 (PDT)
Received: by 10.36.108.21 with HTTP; Tue, 9 Jun 2015 17:28:35 -0700 (PDT)
In-Reply-To: <20150609192607.GA1408@ibm-tiger.the-meissners.org>
References: <20150609180048.GA14132@ibm-tiger.the-meissners.org>	<20150609191719.GA22400@gate.crashing.org>	<20150609192607.GA1408@ibm-tiger.the-meissners.org>
Date: Wed, 10 Jun 2015 02:39:00 -0000
Message-ID: <CAGWvnymSsj=EO4POeHkXwtbuqimC-MddORqnmE6dLtOqSjk0rw@mail.gmail.com>
Subject: Re: [PATCH] PR 66474, Document using %x<n> for VSX registers on PowerPC
From: David Edelsohn <dje.gcc@gmail.com>
To: Michael Meissner <meissner@linux.vnet.ibm.com>, 	Segher Boessenkool <segher@kernel.crashing.org>, GCC Patches <gcc-patches@gcc.gnu.org>, 	David Edelsohn <dje.gcc@gmail.com>
Content-Type: text/plain; charset=UTF-8
X-SW-Source: 2015-06/txt/msg00720.txt.bz2

On Tue, Jun 9, 2015 at 3:26 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> On Tue, Jun 09, 2015 at 02:17:19PM -0500, Segher Boessenkool wrote:
>> On Tue, Jun 09, 2015 at 02:00:48PM -0400, Michael Meissner wrote:
>> > +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3));
>>
>> A colon went missing?       ^^^
>
> Yes, I will correct it when I check it in.  Thanks.

Mike,

VSX registers are a superset of Altivec registers, so the statement
about an Altivec register used where a VSX register is expected is a
little confusing.  How about:

Otherwise the register number output in the assembly file will be
incorrect if an Altivec register is an operand of a VSX instruction
that expects VSX register numbering.

Thanks, David