From: Kirill Yukhin <kirill.yukhin@gmail.com>
To: Uros Bizjak <ubizjak@gmail.com>, "H.J. Lu" <hjl.tools@gmail.com>,
gcc-patches List <gcc-patches@gcc.gnu.org>
Subject: [PATCH, i386, PR50766] Fix incorrect mem/reg operands order
Date: Wed, 19 Oct 2011 13:50:00 -0000 [thread overview]
Message-ID: <CAGs3RfsRA3sKRUNhj2ABqvPm+HTXGga9rA=ZfgXL3YWaPVF+Gw@mail.gmail.com> (raw)
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Hi,
Here is (almost obvous) patch, which fixes PR50766.
ChangeLog entry:
2011-10-19 Kirill Yukhin <kirill.yukhin@intel.com>
* config/i386/i386.md (bmi_bextr_<mode>): Update register/
memory operand order.
(bmi2_bzhi_<mode>3): Ditto.
(bmi2_pdep_<mode>3): Ditto.
(bmi2_pext_<mode>3): Ditto.
Bootstrapped, test (from bug) passing.
Could you please have a look?
Thanks, K
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diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 9c9508d..866fb05 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12099,8 +12099,8 @@
(define_insn "bmi_bextr_<mode>"
[(set (match_operand:SWI48 0 "register_operand" "=r")
- (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm")
- (match_operand:SWI48 2 "register_operand" "r")]
+ (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
+ (match_operand:SWI48 2 "nonimmediate_operand" "rm")]
UNSPEC_BEXTR))
(clobber (reg:CC FLAGS_REG))]
"TARGET_BMI"
@@ -12149,9 +12149,9 @@
;; BMI2 instructions.
(define_insn "bmi2_bzhi_<mode>3"
[(set (match_operand:SWI48 0 "register_operand" "=r")
- (and:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm")
+ (and:SWI48 (match_operand:SWI48 1 "register_operand" "r")
(lshiftrt:SWI48 (const_int -1)
- (match_operand:SWI48 2 "register_operand" "r"))))
+ (match_operand:SWI48 2 "nonimmediate_operand" "rm"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_BMI2"
"bzhi\t{%2, %1, %0|%0, %1, %2}"
@@ -12161,8 +12161,8 @@
(define_insn "bmi2_pdep_<mode>3"
[(set (match_operand:SWI48 0 "register_operand" "=r")
- (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm")
- (match_operand:SWI48 2 "register_operand" "r")]
+ (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
+ (match_operand:SWI48 2 "nonimmediate_operand" "rm")]
UNSPEC_PDEP))]
"TARGET_BMI2"
"pdep\t{%2, %1, %0|%0, %1, %2}"
@@ -12172,8 +12172,8 @@
(define_insn "bmi2_pext_<mode>3"
[(set (match_operand:SWI48 0 "register_operand" "=r")
- (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm")
- (match_operand:SWI48 2 "register_operand" "r")]
+ (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
+ (match_operand:SWI48 2 "nonimmediate_operand" "rm")]
UNSPEC_PEXT))]
"TARGET_BMI2"
"pext\t{%2, %1, %0|%0, %1, %2}"
next reply other threads:[~2011-10-19 13:08 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-19 13:50 Kirill Yukhin [this message]
2011-10-19 14:38 ` Uros Bizjak
2011-10-19 16:34 ` H.J. Lu
2011-10-20 7:36 ` Kirill Yukhin
2011-10-20 7:43 ` Uros Bizjak
2011-10-20 8:36 ` Kirill Yukhin
2011-10-20 21:04 ` H.J. Lu
2011-10-21 5:53 ` Kirill Yukhin
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