From: Yufeng Zhang <yufengzhangdev@gmail.com>
To: Tejas Belagod <tbelagod@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Marc Glisse <marc.glisse@inria.fr>,
Marcus Shawcroft <Marcus.Shawcroft@arm.com>
Subject: Re: [Patch, AArch64] Restructure arm_neon.h vector types' implementation.
Date: Fri, 27 Jun 2014 16:01:00 -0000 [thread overview]
Message-ID: <CAHkEkXqV8BM_8rpYieA6DkvJefH6a2_YMADoq0oNdGumyZPUkw@mail.gmail.com> (raw)
In-Reply-To: <53AD8E83.8020201@arm.com>
On 27 June 2014 16:32, Tejas Belagod <tbelagod@arm.com> wrote:
>>>
>>> 2014-06-23 Tejas Belagod <tejas.belagod@arm.com>
> diff --git a/gcc/config/aarch64/aarch64-simd-builtin-types.def
> b/gcc/config/aarch64/aarch64-simd-builtin-types.def
> new file mode 100644
> index 0000000..aa6a84e
> --- /dev/null
> +++ b/gcc/config/aarch64/aarch64-simd-builtin-types.def
> @@ -0,0 +1,50 @@
> +/* Builtin AdvSIMD types.
> + Copyright (C) 2014 Free Software Foundation, Inc.
> + Contributed by ARM Ltd.
> +
> + This file is part of GCC.
> +
> + GCC is free software; you can redistribute it and/or modify it
> + under the terms of the GNU General Public License as published by
> + the Free Software Foundation; either version 3, or (at your option)
> + any later version.
> +
> + GCC is distributed in the hope that it will be useful, but
> + WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + General Public License for more details.
> +
> + You should have received a copy of the GNU General Public License
> + along with GCC; see the file COPYING3. If not see
> + <http://www.gnu.org/licenses/>. */
> +
> + ENTRY (Int8x8_t, V8QI, none, 10)
> + ENTRY (Int8x16_t, V16QI, none, 11)
> + ENTRY (Int16x4_t, V4HI, none, 11)
> + ENTRY (Int16x8_t, V8HI, none, 11)
> + ENTRY (Int32x2_t, V2SI, none, 11)
> + ENTRY (Int32x4_t, V4SI, none, 11)
> + ENTRY (Int64x1_t, DI, none, 11)
> + ENTRY (Int64x2_t, V2DI, none, 11)
> + ENTRY (Uint8x8_t, V8QI, unsigned, 11)
> + ENTRY (Uint8x16_t, V16QI, unsigned, 12)
> + ENTRY (Uint16x4_t, V4HI, unsigned, 12)
> + ENTRY (Uint16x8_t, V8HI, unsigned, 12)
> + ENTRY (Uint32x2_t, V2SI, unsigned, 12)
> + ENTRY (Uint32x4_t, V4SI, unsigned, 12)
> + ENTRY (Uint64x1_t, DI, unsigned, 12)
> + ENTRY (Uint64x2_t, V2DI, unsigned, 12)
> + ENTRY (Poly8_t, QI, poly, 9)
> + ENTRY (Poly16_t, HI, poly, 10)
> + ENTRY (Poly64_t, DI, poly, 10)
> + ENTRY (Poly128_t, TI, poly, 11)
> + ENTRY (Poly8x8_t, V8QI, poly, 11)
> + ENTRY (Poly8x16_t, V16QI, poly, 12)
> + ENTRY (Poly16x4_t, V4HI, poly, 12)
> + ENTRY (Poly16x8_t, V8HI, poly, 12)
> + ENTRY (Poly64x1_t, DI, poly, 12)
> + ENTRY (Poly64x2_t, V2DI, poly, 12)
> + ENTRY (Float32x2_t, V2SF, none, 13)
> + ENTRY (Float32x4_t, V4SF, none, 13)
> + ENTRY (Float64x1_t, DF, none, 13)
Will this revert Alan Lawrance's commit in 211892, which defines
Float64x1_t to have V1DF mode?
Thanks,
Yufeng
commit cffa849a621eb949bbdc4ce8468c932889450e6d
Author: alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Mon Jun 23 12:46:52 2014 +0000
PR/60825 Make float64x1_t in arm_neon.h a proper vector type
next prev parent reply other threads:[~2014-06-27 16:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-23 15:48 Tejas Belagod
2014-06-25 8:31 ` Yufeng Zhang
2014-06-27 15:32 ` Tejas Belagod
2014-06-27 16:01 ` Yufeng Zhang [this message]
2014-08-22 12:02 ` Tejas Belagod
2014-07-04 14:27 ` James Greenhalgh
2014-08-22 12:07 ` Tejas Belagod
2014-07-08 16:00 ` James Greenhalgh
2014-06-28 10:25 ` Marc Glisse
2014-08-22 11:59 ` Tejas Belagod
2014-08-22 12:54 ` Marc Glisse
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