RISC-V: Replace unspec with bitreverse in riscv_brev8_<mode> insn

RISC-V: Replace unspec with bitreverse in riscv_brev8_<mode> insn

[Jivan Hakobyan]

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This small patch replaces unspec opcode with bitreverse in
riscv_brev8_<mode> insn.

gcc/ChangeLog:
        * config/riscv/crypto.md (UNSPEC_BREV8): Remov.
        (riscv_brev8_<mode>): Use bitreverse opcode.


-- 
With the best regards
Jivan Hakobyan

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diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index e4b7f0190df..d40e108b10d 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -19,7 +19,6 @@
 
 (define_c_enum "unspec" [
     ;; Zbkb unspecs
-    UNSPEC_BREV8
     UNSPEC_ZIP
     UNSPEC_UNZIP
     UNSPEC_PACK
@@ -73,8 +72,7 @@
 ;; ZBKB extension
 (define_insn "riscv_brev8_<mode>"
   [(set (match_operand:X 0 "register_operand" "=r")
-        (unspec:X [(match_operand:X 1 "register_operand" "r")]
-                  UNSPEC_BREV8))]
+        (bitreverse:X (match_operand:X 1 "register_operand" "r")))]
   "TARGET_ZBKB"
   "brev8\t%0,%1"
   [(set_attr "type" "crypto")])

Re: RISC-V: Replace unspec with bitreverse in riscv_brev8_<mode> insn

[Kito Cheng]

My understanding is the semantic is slightly different, brev8 is only
the bit reverse within each byte, but bitreverse means did bit reverse
for the whole content of the mode, e.g. riscv_brev8_si will bit
reserved within 32 bit.

Using RV32 as example:
UNSPEC_BREV8:
rd[0...7]  = rs[7...0]
rd[8...15]  = rs[15...8]
rd[16...23]  = rs[23...16]
rd[16...23]  = rs[31...24]

bitreverse:
rd[0...31] = rs[31...0]

On Wed, Jul 26, 2023 at 3:55 PM Jivan Hakobyan via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> This small patch replaces unspec opcode with bitreverse in
> riscv_brev8_<mode> insn.
>
> gcc/ChangeLog:
>         * config/riscv/crypto.md (UNSPEC_BREV8): Remov.
>         (riscv_brev8_<mode>): Use bitreverse opcode.
>
>
> --
> With the best regards
> Jivan Hakobyan

Re: RISC-V: Replace unspec with bitreverse in riscv_brev8_<mode> insn

[Jeff Law]

On 7/26/23 02:21, Kito Cheng via Gcc-patches wrote:
> My understanding is the semantic is slightly different, brev8 is only
> the bit reverse within each byte, but bitreverse means did bit reverse
> for the whole content of the mode, e.g. riscv_brev8_si will bit
> reserved within 32 bit.
> 
> Using RV32 as example:
> UNSPEC_BREV8:
> rd[0...7]  = rs[7...0]
> rd[8...15]  = rs[15...8]
> rd[16...23]  = rs[23...16]
> rd[16...23]  = rs[31...24]
> 
> bitreverse:
> rd[0...31] = rs[31...0]
Yea, I think you're right Kito.  Goof on our side.

Jivan, I think this explains why it's not working for all of Mariam's 
cases -- odds are the cases where it is working are for the reversed crc8.

Let's drop this since it doesn't match the semantics of GCC's bitreverse.

Mariam's call on whether or not to utilize brev8 for the crc8 cases 
where it's likely faster than other sequences to reverse bits.

jeff