From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30025 invoked by alias); 19 Oct 2012 06:54:03 -0000 Received: (qmail 30017 invoked by uid 22791); 19 Oct 2012 06:54:02 -0000 X-SWARE-Spam-Status: No, hits=-4.6 required=5.0 tests=AWL,BAYES_00,DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,KHOP_RCVD_TRUST,KHOP_THREADED,NML_ADSP_CUSTOM_MED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE X-Spam-Check-By: sourceware.org Received: from mail-ia0-f175.google.com (HELO mail-ia0-f175.google.com) (209.85.210.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 19 Oct 2012 06:53:58 +0000 Received: by mail-ia0-f175.google.com with SMTP id b35so100721iac.20 for ; Thu, 18 Oct 2012 23:53:58 -0700 (PDT) MIME-Version: 1.0 Received: by 10.42.210.12 with SMTP id gi12mr238038icb.22.1350629637870; Thu, 18 Oct 2012 23:53:57 -0700 (PDT) Received: by 10.64.96.199 with HTTP; Thu, 18 Oct 2012 23:53:57 -0700 (PDT) Reply-To: ramrad01@arm.com In-Reply-To: References: Date: Fri, 19 Oct 2012 08:13:00 -0000 Message-ID: Subject: Re: [PATCH, ARM] Fix PR target/54892 - [4.7/4.8 Regression], ICE in extract_insn, at recog.c:2123 From: Ramana Radhakrishnan To: Zhenqiang Chen Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-10/txt/msg01777.txt.bz2 On Fri, Oct 19, 2012 at 7:46 AM, Zhenqiang Chen wrote: > Hi, > > In function arm_expand_compare_and_swap, oldval is converted to SImode > when its "mode" is QImode/HImode. After "FALLTHRU" to "case SImode", > we should use "SImode", other than "mode" (which is QImode/HImode). > And INSN atomic_compare_and_swap_1 expects the operand in > SImode. > > No make check regression. > > Is it OK for 4.7 and trunk? Makes sense , OK for both. Thanks, Ramana > > Thanks! > -Zhenqiang > > ChangeLog: > 2012-10-19 Zhenqiang Chen > > PR target/54892 > * config/arm/arm.c (arm_expand_compare_and_swap): Use SImode to make > sure the mode is correct when falling through from above cases. > > testsuite/ChangeLog: > 2012-10-19 Zhenqiang Chen > > PR target/54892 > * gcc.target/arm/pr54892.c: New. > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index fc3a508..265e1cb 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -25437,8 +25437,8 @@ arm_expand_compare_and_swap (rtx operands[]) > case SImode: > /* Force the value into a register if needed. We waited until after > the zero-extension above to do this properly. */ > - if (!arm_add_operand (oldval, mode)) > - oldval = force_reg (mode, oldval); > + if (!arm_add_operand (oldval, SImode)) > + oldval = force_reg (SImode, oldval); > break; > > case DImode: