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From: Ramana Radhakrishnan <ramana.gcc@googlemail.com>
To: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: "bschmidt@redhat.com" <bschmidt@redhat.com>,
		"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
		Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,
	nd <nd@arm.com>, 	Richard Biener <richard.guenther@gmail.com>,
		"ebotcazou@adacore.com" <ebotcazou@adacore.com>,
	"dje.gcc@gmail.com" <dje.gcc@gmail.com>,
		"law@redhat.com" <law@redhat.com>,
	"segher@kernel.crashing.org" <segher@kernel.crashing.org>
Subject: Re: Enabling -frename-registers?
Date: Thu, 05 May 2016 07:42:00 -0000	[thread overview]
Message-ID: <CAJA7tRazVJ6NAZ26B5sZshKVbxvPyDG2o3mrUGK1STpx2vdG6A@mail.gmail.com> (raw)
In-Reply-To: <AM3PR08MB00884B492D88A3EC1F636971837B0@AM3PR08MB0088.eurprd08.prod.outlook.com>

On Wed, May 4, 2016 at 4:20 PM, Wilco Dijkstra <Wilco.Dijkstra@arm.com> wrote:
> Bernd Schmidt wrote:
>> On 05/04/2016 03:25 PM, Ramana Radhakrishnan wrote:
>>> On ARM / AArch32 I haven't seen any performance data yet - the one place we are concerned
>>> about the impact is on Thumb2 code size as regrename may end up inadvertently putting more
>>> things in high registers.
>>
>> In theory at least arm_preferred_rename_class is designed to make the  opposite happen. Bernd
>
> I do not see that working unfortunately - Thumb-2 codesize increases by a few percent even with -Os.
> This is primarily due to replacing a low register with IP, which often changes a 16-bit instruction like:
>
>     movs    r2, #8
>
> into a 32-bit one:
>
>     mov     ip, #8
>
> This will also affect other targets with multiple instruction sizes. So I think it should check the
> size of the new instruction patterns and only accept a rename if it is not larger (certainly with -Os).

Can you file a bugzilla entry with a testcase that folks can look at please ?

Ramana

>

  parent reply	other threads:[~2016-05-05  7:42 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04 15:20 Wilco Dijkstra
2016-05-04 19:06 ` Eric Botcazou
2016-05-04 22:55 ` Pat Haugen
2016-05-05  7:42 ` Ramana Radhakrishnan [this message]
2016-05-05 13:00   ` Wilco Dijkstra
2016-05-05 16:24     ` Mike Stump
  -- strict thread matches above, loose matches on Subject: below --
2016-05-02 11:12 Uros Bizjak
2016-05-02 11:15 ` Bernd Schmidt
2016-05-02 11:21   ` Uros Bizjak
2016-05-02 11:58     ` Uros Bizjak
2016-05-02 13:20       ` Bernd Schmidt
2016-05-03  5:30         ` Uros Bizjak
2016-04-29 13:02 David Edelsohn
2016-04-29 13:33 ` Bernd Schmidt
2016-04-29 13:42   ` David Edelsohn
2016-04-29 13:44     ` Bernd Schmidt
2016-04-29 13:48       ` David Edelsohn
2016-04-29 14:21         ` Richard Biener
2016-04-30  7:57           ` Andreas Schwab
2016-05-03 21:26           ` David Edelsohn
2016-05-03 22:53             ` Bernd Schmidt
2016-05-03 23:09               ` David Edelsohn
2016-05-04  8:39               ` Richard Biener
2016-05-04  9:05               ` Alan Modra
2016-05-04  9:08                 ` Bernd Schmidt
2016-05-04  9:38                   ` Alan Modra
2016-05-04 10:03             ` Eric Botcazou
2016-05-04 10:11               ` Bernd Schmidt
2016-05-04 10:26                 ` Eric Botcazou
2016-05-04 13:25                   ` Ramana Radhakrishnan
2016-05-04 13:37                     ` Bernd Schmidt
2016-05-04 13:39                       ` Ramana Radhakrishnan
2016-05-04 12:54                 ` David Edelsohn
2016-05-04 17:50                 ` Segher Boessenkool
2016-04-30  2:14   ` Segher Boessenkool
2016-05-02 13:32   ` Jeff Law
2016-05-11  4:07     ` Jeff Law
     [not found] <56AB9759.407@t-online.de>
2016-01-29 17:34 ` Bernd Schmidt
2016-01-29 18:50   ` Richard Biener
2016-04-17 21:24   ` Jeff Law
2016-04-26 12:44     ` Bernd Schmidt
2016-04-27  7:11       ` Eric Botcazou
2016-04-27  9:58         ` Bernd Schmidt
2016-04-27 10:36           ` Eric Botcazou

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