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From: Ramana Radhakrishnan <ramana.gcc@googlemail.com>
To: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>, nd <nd@arm.com>
Subject: Re: [PATCH][ARM] Fix ldrd offsets
Date: Tue, 08 Nov 2016 14:08:00 -0000	[thread overview]
Message-ID: <CAJA7tRb57-deZ0nW=yZwSrmQ-NmOZQA7pzV3QowR93zVKUTYgg@mail.gmail.com> (raw)
In-Reply-To: <AM5PR0802MB2610C0616A19887E6FA5928E83A30@AM5PR0802MB2610.eurprd08.prod.outlook.com>

On Thu, Nov 3, 2016 at 12:20 PM, Wilco Dijkstra <Wilco.Dijkstra@arm.com> wrote:
> Fix ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020,
> without -255..4091.  This reduces the number of addressing instructions
> when using DI mode operations (such as in PR77308).
>
> Bootstrap & regress OK.
>
> ChangeLog:
> 2015-11-03  Wilco Dijkstra  <wdijkstr@arm.com>
>
>     gcc/
>         * config/arm/arm.c (arm_legitimate_index_p): Add comment.
>         (thumb2_legitimate_index_p): Use correct range for DI/DF mode.
> --
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 3c4c7042d9c2101619722b5822b3d1ca37d637b9..5d12cf9c46c27d60a278d90584bde36ec86bb3fe 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -7486,6 +7486,8 @@ arm_legitimate_index_p (machine_mode mode, rtx index, RTX_CODE outer,
>         {
>           HOST_WIDE_INT val = INTVAL (index);
>
> +         /* Assume we emit ldrd or 2x ldr if !TARGET_LDRD.
> +            If vldr is selected it uses arm_coproc_mem_operand.  */
>           if (TARGET_LDRD)
>             return val > -256 && val < 256;
>           else
> @@ -7613,11 +7615,13 @@ thumb2_legitimate_index_p (machine_mode mode, rtx index, int strict_p)
>        if (code == CONST_INT)
>         {
>           HOST_WIDE_INT val = INTVAL (index);
> -         /* ??? Can we assume ldrd for thumb2?  */
> -         /* Thumb-2 ldrd only has reg+const addressing modes.  */
> -         /* ldrd supports offsets of +-1020.
> -            However the ldr fallback does not.  */
> -         return val > -256 && val < 256 && (val & 3) == 0;
> +         /* Thumb-2 ldrd only has reg+const addressing modes.
> +            Assume we emit ldrd or 2x ldr if !TARGET_LDRD.
> +            If vldr is selected it uses arm_coproc_mem_operand.  */
> +         if (TARGET_LDRD)

I suspect this should be : if (TARGET_LDRD && !fix_cm3_ldrd)  - I am a
bit worried about this change because of the non-uniformity with ldr
and the fallout with other places where things may break with this.  I
would like a test with -mcpu=cortex-m3/-mthumb as well for an
arm-none-eabi target to see what the fallout of this change is on that
...


Ramana

  reply	other threads:[~2016-11-08 14:08 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-03 12:21 Wilco Dijkstra
2016-11-08 14:08 ` Ramana Radhakrishnan [this message]
2016-11-11 10:59   ` Wilco Dijkstra
2016-12-06 15:13 ` Wilco Dijkstra
2016-12-14 16:41   ` Wilco Dijkstra
2017-01-17 12:12     ` Wilco Dijkstra
2017-02-02 14:45       ` Wilco Dijkstra
2017-02-23 16:57         ` Wilco Dijkstra
2017-04-20 16:07 ` Wilco Dijkstra
2017-06-13 13:59   ` Wilco Dijkstra
2017-06-27 15:39     ` Wilco Dijkstra
2017-09-04 17:00       ` Kyrill Tkachov

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