Hello,
thanks for checking the performance.  The patch is OK.
Honza

On Mon, Oct 31, 2022 at 11:39 AM Joshi, Tejas Sanjay <
TejasSanjay.Joshi@amd.com> wrote:

> [Public]
>
> Hi,
>
> > It is not latency. It is reciprocal throughput. For example, the
> multiplication instruction has
> > latency 3 and reciprocal throughput 1, and the corresponding execution
> unit can accept a new
> > multiplication instruction each cycle. In the .md file we are modeling
> that by saying that
> > multiplication occupies some unit for one cycle (but has latency 3).
>
> We ran spec cpu2017 INT rate with your patch for znver1 and znver3 with O2
> and Ofast. Found no performance differences from the base one.
> The patch looks good.
>
> Thanks and Regards,
> Tejas
>