From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2088 invoked by alias); 29 Dec 2012 05:26:30 -0000 Received: (qmail 2054 invoked by uid 22791); 29 Dec 2012 05:26:29 -0000 X-SWARE-Spam-Status: No, hits=-4.1 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,KHOP_RCVD_TRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE,TW_AV,TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-vc0-f180.google.com (HELO mail-vc0-f180.google.com) (209.85.220.180) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 29 Dec 2012 05:26:24 +0000 Received: by mail-vc0-f180.google.com with SMTP id p16so11215300vcq.25 for ; Fri, 28 Dec 2012 21:26:23 -0800 (PST) MIME-Version: 1.0 Received: by 10.220.238.148 with SMTP id ks20mr54701694vcb.5.1356758783125; Fri, 28 Dec 2012 21:26:23 -0800 (PST) Received: by 10.58.237.202 with HTTP; Fri, 28 Dec 2012 21:26:22 -0800 (PST) In-Reply-To: References: Date: Sat, 29 Dec 2012 05:26:00 -0000 Message-ID: Subject: Re: [RFC, x86] Changes for AVX and AVX2 processors From: Vladimir Yakovlev To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-12/txt/msg01461.txt.bz2 Hello, processor_alias_table contains the same processor type for all "corei7", "corei7-avx", "core-avx-i" and "core-avx2". At least, it has consequence on checking x86_avx256_split_unaligned_load & ix86_tune_mask: for all these processors it results the same. Moreover we cannot turn new features on for AVX/AVX2 using initial_ix86_tune_features. . 2012/12/28 Uros Bizjak : > Hello! > >> New processors core-avx and core-avx2 are added. It was done to have >> possibilities to turn new features on for these processors. Please review. > > I don't think this is a good approach, you are mixing an architecture > with an ISA extension in the name. We already have > processor_alias_table, where processor architecture and features > (extensions) can be activated, depending on the name. > > Uros.