From: Siarhei Volkau <lis8215@gmail.com>
To: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [RFC PATCH] ARM: thumb1: Use LDMIA/STMIA for DI/DF loads/stores
Date: Tue, 18 Jun 2024 15:24:40 +0300 [thread overview]
Message-ID: <CAKNVLfYc=UOan7pt6ebp0o86KYas__PQQxVrza-g8HYfGj-8QQ@mail.gmail.com> (raw)
In-Reply-To: <81be95ed-12ce-4463-b79c-d32bd39c8f04@arm.com>
пн, 17 июн. 2024 г. в 15:43, Richard Earnshaw (lists)
<Richard.Earnshaw@arm.com>:
> I like the idea behind this patch, but I think I'd try first doing this as a peephole2 rule to rewrite the address in this case. That has the additional advantage that we then estimate the size of the instruction more accurately.
Indeed, I tried it and it seems to work, although sometimes it does
odd things that I can't explain, e.g:
define_insn patch define_peephole2 patch
... ...
ldmia r0!, {r4, r5} movs r3, r0
ldmia r1!, {r2, r3} ldmia r3!, {r4, r5}
movs r0, r7 movs r0, r7
... ldr r2, [r1, #0]
ldr r3, [r1, #4]
# r1 unused later on
...
But in general it finds a little bit more cases where ldmia/stmia can
be applied.
> > 2. Might it be profitable for thumb2?
> I think it would then be easy to extend this to thumb2 as well if it looks like a win (perhaps only for -Os in the thumb2 case).
Sounds good, I'll look at it later.
> For testing, I'd start with something like gcc/testsuite/gcc.target/arm/thumb-andsi.c as a template and adapt that for your specific case. Matching something like "ldmia\tr[0-7]!," should be enough.
I'll send the v2 patch with test case(s) soon.
BR, Siarhei
prev parent reply other threads:[~2024-06-18 12:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-16 8:51 Siarhei Volkau
2024-06-17 12:43 ` Richard Earnshaw (lists)
2024-06-18 12:24 ` Siarhei Volkau [this message]
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