From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) by sourceware.org (Postfix) with ESMTPS id 19A31385701B for ; Fri, 16 Jun 2023 07:53:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 19A31385701B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=debian.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-1b521cc07c8so3658385ad.0 for ; Fri, 16 Jun 2023 00:53:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686902011; x=1689494011; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wP99pnWRoCH//WVhQXd3rDryEHK/HENlPSCeLA1vfU4=; b=k8ra2609l7CRpW68Fz8eeF4ye3cO8SuEnIkHEpxEx/CAgygcHRPp0/9lyVU+ZPwPG4 qr9tREbnXncMkPc7C4Xx5Nx6VGvjeY7xYoxs5o/Qs6QnGtlHYvSJxc9XkEmS5scVtCR1 hXHX19iuZ3d9wbcNH1DkX4Bj3oqf/5tEyXml0MauEqoZ0pPGpnxg3a2hNGiAXx9tPbxa 1cNLJoVexHNDMNfiewEkMfuzkerZn+fQ/NMDS3fzXUnrIYz5/UL5tXCRazLHoNi4fz8K sgAc+9GRhxiU7y4UoaythbBDRCIAGrty/8XNDreZPzhjKIGb+3qhNe9pKTTGL7BDUrfj /Irg== X-Gm-Message-State: AC+VfDxzZTWgvCp/OkLaWctmc6l0XZx+BmwZyO0MxBBSRt9xGbY7f+ql 0FCLud61hycoNEHP54RA/s78NzdJ2UT1rxztGLE= X-Google-Smtp-Source: ACHHUZ61ZMaeaKxsono5KRAvjHs48uvjZsdMMCQENaIfwDAKTkpB17JVpdWnV8GEahDjzHo2lveDvHv38hlrEih37UU= X-Received: by 2002:a17:903:248:b0:1af:beae:c0b with SMTP id j8-20020a170903024800b001afbeae0c0bmr1225197plh.22.1686902010507; Fri, 16 Jun 2023 00:53:30 -0700 (PDT) MIME-Version: 1.0 References: <20230601042658.2128162-1-yunqiang.su@cipunited.com> In-Reply-To: From: YunQiang Su Date: Fri, 16 Jun 2023 15:53:18 +0800 Message-ID: Subject: Re: [PATCH v5] MIPS: Add speculation_barrier support To: "Richard Earnshaw (lists)" Cc: YunQiang Su , gcc-patches@gcc.gnu.org, macro@orcam.me.uk, jiaxun.yang@flygoat.com, richard.sandiford@arm.com, jeffreyalaw@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,BODY_8BITS,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,GIT_PATCH_0,HEADER_FROM_DIFFERENT_DOMAINS,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Richard Earnshaw (lists) via Gcc-patches =E4=BA=8E2023=E5=B9=B46=E6=9C=888=E6=97=A5=E5=91=A8=E5=9B=9B 20:36=E5=86=99= =E9=81=93=EF=BC=9A > > > On 01/06/2023 05:26, YunQiang Su wrote: > > speculation_barrier for MIPS needs sync+jr.hb (r2+), > > so we implement __speculation_barrier in libgcc, like arm32 does. > > > > gcc/ChangeLog: > > * config/mips/mips-protos.h (mips_emit_speculation_barrier): New > > prototype. > > * config/mips/mips.cc (speculation_barrier_libfunc): New static > > variable. > > (mips_init_libfuncs): Initialize it. > > (mips_emit_speculation_barrier): New function. > > * config/mips/mips.md (speculation_barrier): Call > > mips_emit_speculation_barrier. > > > > libgcc/ChangeLog: > > * config/mips/lib1funcs.S: New file. > > define __speculation_barrier and include mips16.S. > > * config/mips/t-mips: define LIB1ASMSRC as mips/lib1funcs.S. > > define LIB1ASMFUNCS as _speculation_barrier. > > set version info for __speculation_barrier. > > * config/mips/libgcc-mips.ver: New file. > > * config/mips/t-mips16: don't define LIB1ASMSRC as mips16.S > > included in lib1funcs.S now. > > --- > > Please remember to cite PR86793 when committing this fix. > Ohh, sorry. I forget it. I commented there. I have no permission to close this bug report. Can you help to close it? > R. > > > gcc/config/mips/mips-protos.h | 2 + > > gcc/config/mips/mips.cc | 12 ++++++ > > gcc/config/mips/mips.md | 12 ++++++ > > libgcc/config/mips/lib1funcs.S | 65 +++++++++++++++++++++++++++++= + > > libgcc/config/mips/libgcc-mips.ver | 21 ++++++++++ > > libgcc/config/mips/t-mips | 7 ++++ > > libgcc/config/mips/t-mips16 | 3 +- > > 7 files changed, 120 insertions(+), 2 deletions(-) > > create mode 100644 libgcc/config/mips/lib1funcs.S > > create mode 100644 libgcc/config/mips/libgcc-mips.ver > > > > diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-proto= s.h > > index 20483469105..da7902c235b 100644 > > --- a/gcc/config/mips/mips-protos.h > > +++ b/gcc/config/mips/mips-protos.h > > @@ -388,4 +388,6 @@ extern void mips_register_frame_header_opt (void); > > extern void mips_expand_vec_cond_expr (machine_mode, machine_mode, rt= x *); > > extern void mips_expand_vec_cmp_expr (rtx *); > > > > +extern void mips_emit_speculation_barrier_function (void); > > + > > #endif /* ! GCC_MIPS_PROTOS_H */ > > diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc > > index ca491b981a3..c1d1691306e 100644 > > --- a/gcc/config/mips/mips.cc > > +++ b/gcc/config/mips/mips.cc > > @@ -13611,6 +13611,9 @@ mips_autovectorize_vector_modes (vector_modes *= modes, bool) > > return 0; > > } > > > > + > > +static GTY (()) rtx speculation_barrier_libfunc; > > + > > /* Implement TARGET_INIT_LIBFUNCS. */ > > > > static void > > @@ -13680,6 +13683,7 @@ mips_init_libfuncs (void) > > synchronize_libfunc =3D init_one_libfunc ("__sync_synchronize")= ; > > init_sync_libfuncs (UNITS_PER_WORD); > > } > > + speculation_barrier_libfunc =3D init_one_libfunc ("__speculation_bar= rier"); > > } > > > > /* Build up a multi-insn sequence that loads label TARGET into $AT. = */ > > @@ -19092,6 +19096,14 @@ mips_avoid_hazard (rtx_insn *after, rtx_insn *= insn, int *hilo_delay, > > } > > } > > > > +/* Emit a speculation barrier. > > + JR.HB is needed, so we put speculation_barrier_libfunc in libgcc. = */ > > +void > > +mips_emit_speculation_barrier_function () > > +{ > > + emit_library_call (speculation_barrier_libfunc, LCT_NORMAL, VOIDmode= ); > > +} > > + > > /* A SEQUENCE is breakable iff the branch inside it has a compact for= m > > and the target has compact branches. */ > > > > diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md > > index ac1d77afc7d..5d04ac566dd 100644 > > --- a/gcc/config/mips/mips.md > > +++ b/gcc/config/mips/mips.md > > @@ -160,6 +160,8 @@ > > ;; The `.insn' pseudo-op. > > UNSPEC_INSN_PSEUDO > > UNSPEC_JRHB > > + > > + VUNSPEC_SPECULATION_BARRIER > > ]) > > > > (define_constants > > @@ -7455,6 +7457,16 @@ > > mips_expand_conditional_move (operands); > > DONE; > > }) > > + > > +(define_expand "speculation_barrier" > > + [(unspec_volatile [(const_int 0)] VUNSPEC_SPECULATION_BARRIER)] > > + "" > > + " > > + mips_emit_speculation_barrier_function (); > > + DONE; > > + " > > +) > > + > > > > ;; > > ;; .................... > > diff --git a/libgcc/config/mips/lib1funcs.S b/libgcc/config/mips/lib1fu= ncs.S > > new file mode 100644 > > index 00000000000..97a3655e8ab > > --- /dev/null > > +++ b/libgcc/config/mips/lib1funcs.S > > @@ -0,0 +1,65 @@ > > +/* Copyright (C) 2023 Free Software Foundation, Inc. > > + > > +This file is free software; you can redistribute it and/or modify it > > +under the terms of the GNU General Public License as published by the > > +Free Software Foundation; either version 3, or (at your option) any > > +later version. > > + > > +This file is distributed in the hope that it will be useful, but > > +WITHOUT ANY WARRANTY; without even the implied warranty of > > +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > > +General Public License for more details. > > + > > +Under Section 7 of GPL version 3, you are granted additional > > +permissions described in the GCC Runtime Library Exception, version > > +3.1, as published by the Free Software Foundation. > > + > > +You should have received a copy of the GNU General Public License and > > +a copy of the GCC Runtime Library Exception along with this program; > > +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > > +. */ > > + > > +//#include "mips16.S" > > + > > +#ifdef L_speculation_barrier > > + > > +/* MIPS16e1 has no sync/jr.hb instructions, and MIPS16e2 lacks of jr.h= b. > > + So, we use normal MIPS code here, just like what we do for __sync_*= . */ > > + .set nomips16 > > + > > + .set noreorder > > + .globl __speculation_barrier > > + .ent __speculation_barrier > > + > > +__speculation_barrier: > > + .set push > > +#if __mips >=3D 2 > > + sync /* complementation barrier for memory. */ > > +#elif defined (__linux) > > + /* MIPS1 has no sync, while Linux can trap&emu sync. */ > > + /* FIXME: Will somebody use linux/gcc for MIPS1/baremetal? */ > > + .word 0x0000000f > > +#endif > > + > > + > > +#if __mips_isa_rev >=3D 1 > > + /* Binutils claims that JR in R1 can do same as jr.hb. > > + R6 changes the encoding of jr.hb. */ > > + jr.hb $ra /* Jump with instruction hazard barrier. */ > > +#else > > + /* ssnop is actually available since R5500, > > + and it will be decoded as nop on earlier processors. > > + gas can only recognize it with -march=3Dmips1 since 2.21. > > + MIPS1 to MIPSr1: R10000 have 7 stage pipeline, > > + so 8 ssnop is sufficient to block all speculation on all CPUs.= */ > > + .rept 8 > > + .word 0x00000040 /* The encoding of ssnop. */ > > + .endr > > + /* jr.hb will be decoded as jr on earlier processors. */ > > + .word 0x03e00408 /* The encoding of jr.hb $ra. */ > > +#endif > > + .set pop > > + .end __speculation_barrier > > + > > + .set reorder > > +#endif > > diff --git a/libgcc/config/mips/libgcc-mips.ver b/libgcc/config/mips/li= bgcc-mips.ver > > new file mode 100644 > > index 00000000000..68f8d2bbd51 > > --- /dev/null > > +++ b/libgcc/config/mips/libgcc-mips.ver > > @@ -0,0 +1,21 @@ > > +# Copyright (C) 2023 Free Software Foundation, Inc. > > +# > > +# This file is part of GCC. > > +# > > +# GCC is free software; you can redistribute it and/or modify > > +# it under the terms of the GNU General Public License as published by > > +# the Free Software Foundation; either version 3, or (at your option) > > +# any later version. > > +# > > +# GCC is distributed in the hope that it will be useful, > > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > +# GNU General Public License for more details. > > +# > > +# You should have received a copy of the GNU General Public License > > +# along with GCC; see the file COPYING3. If not see > > +# . > > + > > +GCC_14.0 { > > + __speculation_barrier > > +} > > diff --git a/libgcc/config/mips/t-mips b/libgcc/config/mips/t-mips > > index 4fb8e136217..d05ef7cbf74 100644 > > --- a/libgcc/config/mips/t-mips > > +++ b/libgcc/config/mips/t-mips > > @@ -7,3 +7,10 @@ softfp_truncations :=3D > > softfp_exclude_libgcc2 :=3D n > > > > LIB2ADD_ST +=3D $(srcdir)/config/mips/lib2funcs.c > > + > > + > > +LIB1ASMSRC =3D mips/lib1funcs.S > > +LIB1ASMFUNCS =3D _speculation_barrier > > + > > +# Version these symbols if building libgcc.so. > > +SHLIB_MAPFILES +=3D $(srcdir)/config/mips/libgcc-mips.ver > > diff --git a/libgcc/config/mips/t-mips16 b/libgcc/config/mips/t-mips16 > > index 2bad5119d51..5fd9d60d7a3 100644 > > --- a/libgcc/config/mips/t-mips16 > > +++ b/libgcc/config/mips/t-mips16 > > @@ -16,8 +16,7 @@ > > # along with GCC; see the file COPYING3. If not see > > # . > > > > -LIB1ASMSRC =3D mips/mips16.S > > -LIB1ASMFUNCS =3D _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \ > > +LIB1ASMFUNCS +=3D _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \ > > _m16eqsf2 _m16nesf2 _m16gtsf2 _m16gesf2 _m16lesf2 _m16ltsf2 \ > > _m16unordsf2 \ > > _m16fltsisf _m16fix_truncsfsi _m16fltunsisf \ >