Re: [Patch ARM-AArch64/testsuite Neon intrinsics 00/20] Executable tests

[Christophe Lyon <christophe.lyon@linaro.org>]

On 16 June 2015 at 12:08, James Greenhalgh <james.greenhalgh@arm.com> wrote:
> On Mon, Jun 15, 2015 at 11:11:16PM +0100, Christophe Lyon wrote:
>> Ping?
>>
>>
>> On 27 May 2015 at 22:15, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>> > This patch series is a follow-up to the tests I already contributed,
>> > converted from my original testsuite.
>> >
>> > This series consists in 20 new patches, which can be committed
>> > independently. For vrecpe, I added the setting of the "Flush-to-Zero"
>> > FP flag, to force AArch64 to behave the same as ARM by default.
>> >
>> > This is the final batch, except for the vget_lane tests which I will
>> > submit later. This should cover the subset of AdvSIMD intrinsics
>> > common to ARMv7 and AArch64.
>> >
>> > Tested with qemu on arm*linux, aarch64-linux.
>> >
>> > 2015-05-27  Christophe Lyon  <christophe.lyon@linaro.org>
>> >
>> >         * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
>> >         (_ARM_FPSCR): Add FZ field.
>> >         (clean_results): Force FZ=1 on AArch64.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrecpe.c: New file.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrecps.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrev.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrshr_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vrsra_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vset_lane.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vshl_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vshll_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vshr_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vshrn_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vsra_n.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vtbX.c: Likewise.
>> >         * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Likewise.
>> >
>
> This patch set is OK.
>
> As with the last patch set, please do a quick run through of each patch
> before committing and ensure that the trailing '\' characters line up,
> and look for any fall-out (particularly on aarch64_be) after these are in.
>

I've just re-run the tests on aarch64_be, and the vtbX one is failing
when testing vtlb3.
It does pass on armeb, so I expect the test to be correctly written to
be endianness independant.

As a reminder, there are still several other tests failing on aarch64_be:
vldX_lane
vtrn
vzip
vuzp

we have PR63652 and 63653 for these.

> Thanks,
> James
>