From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 101239 invoked by alias); 26 Sep 2016 19:11:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 101210 invoked by uid 89); 26 Sep 2016 19:11:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy=remotely X-HELO: mail-qk0-f174.google.com Received: from mail-qk0-f174.google.com (HELO mail-qk0-f174.google.com) (209.85.220.174) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 26 Sep 2016 19:11:48 +0000 Received: by mail-qk0-f174.google.com with SMTP id z190so176998837qkc.3 for ; Mon, 26 Sep 2016 12:11:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=gEKDCkKMBnimgJ5FK85gPkhj3p7J44ei4ZCpEGWRQC0=; b=csL9nuS8Fp6Z2rXTEXjLxu++CNYVaKTjBV+u8espljezSpX3wIIySonb7x2qbEPDyT NLWh5nSM12EFxMMnk2EbKyzkKByKPeo4Lm5n+GZILN8N/k6a/eD8p8AWSU6Df9owIB6S jRu2+6HPYelD71P9tEqq+gksjJQl4dKlgYxo1eg1177c9YQIwFkTqKFkc18GcvYZt0XZ COQDQJrC9lcVeppnt+dXZ5HX4rF279Lj+z/9E3le6TAxib7KA37FiofBT5OF/TBFP7A8 Nxd1SxP1KeFAw4YLUSwaWOYPJtS62Fvwtn5Mqk+SuK0E5DG6SYaHStECqYusUgzd4oj/ VhAg== X-Gm-Message-State: AA6/9RmK8aq7rmCkFYg8LBxTUIg/+WcpYq4P8ZAnU5n59b0mk+oQ7Ryi/0snovi3onkwLk2xiqgY910EfrIX49NN X-Received: by 10.55.179.135 with SMTP id c129mr24910066qkf.98.1474917106480; Mon, 26 Sep 2016 12:11:46 -0700 (PDT) MIME-Version: 1.0 Received: by 10.140.21.80 with HTTP; Mon, 26 Sep 2016 12:11:45 -0700 (PDT) In-Reply-To: References: <573B28A3.9030603@foss.arm.com> <573B2B5E.3000206@foss.arm.com> <57E8EDDB.3010008@foss.arm.com> From: Christophe Lyon Date: Mon, 26 Sep 2016 20:02:00 -0000 Message-ID: Subject: Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t. To: Ramana Radhakrishnan Cc: Matthew Wahab , gcc-patches Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2016-09/txt/msg01877.txt.bz2 On 26 September 2016 at 15:19, Christophe Lyon wrote: > On 26 September 2016 at 15:03, Ramana Radhakrishnan > wrote: >> On Mon, Sep 26, 2016 at 1:48 PM, Christophe Lyon >> wrote: >>> On 26 September 2016 at 11:43, Matthew Wahab wrote: >>>> Hello, >>>> >>>> On 25/09/16 14:00, Christophe Lyon wrote: >>>>>>> >>>>>>> >>>>>>> This patch adds the new intrinsics: >>>>>>> vbsl_f16, vbslq_f16, vdup_n_f16, vdupq_n_f16, vdup_lane_f16, >>>>>>> vdupq_lane_f16, vext_f16, vextq_f16, vmov_n_f16, vmovq_n_f16, >>>>>>> vrev64_f16, vrev64q_f16, vtrn_f16, vtrnq_f16, vuzp_f16, vuzpq_f16, >>>>>>> vzip_f16, vzipq_f16. >>>>>>> >>>>>>> This patch also updates the advsimd-intrinsics testsuite to test the f16 >>>>>>> variants for ARM targets. These intrinsics are only implemented in the >>>>>>> ARM target so the tests are disabled for AArch64 using an extra >>>>>>> condition on a new convenience macro FP16_SUPPORTED. This patch also >>>>>>> disables, for the ARM target, the testsuite defined macro vdup_n_f16 as >>>>>>> it is no longer needed. >>>>> >>>>> >>>>> Since you committed this patch, I've noticed that libgcc fails to build >>>>> when GCC is configured: >>>>> --target arm-none-eabi and default cpu >>>>> /tmp/9649048_29.tmpdir/ccuBwQJJ.s: Assembler messages: >>>>> /tmp/9649048_29.tmpdir/ccuBwQJJ.s:64: Error: selected processor does >>>>> not support ARM mode `movwlt r0,32768' >>>>> /tmp/9649048_29.tmpdir/ccuBwQJJ.s:65: Error: selected processor does >>>>> not support ARM mode `movwge r0,32767' >>>>> make[4]: *** [_ssaddHQ.o] Error 1 >>>>> make[4]: Leaving directory >>>>> >>>>> `/tmp/9649048_29.tmpdir/aci-gcc-fsf/builds/gcc-fsf-gccsrc/obj-arm-none-eabi/gcc1/arm-none-eabi/fpu/libgcc' >>>>> >>>> >>>> >>>> I can't reproduce the failure, could you send the configure arguments for >>>> the build. >>>> >>> >>> If I'm not mistaken, that is: >>> --target=arm-none-eabi --disable-nls --disable-libgomp >>> --disable-libmudflap --disable-libcilkrts --enable-checking >>> --enable-languages=c,c++ --with-newlib >>> >>> Maybe you've disabled multilibs? >> >> >> I'm pretty sure I built this as part of reviewing all these patches >> with --with-mutlib-list=aprofile and didnt' see any failures. Not sure >> what's going on here. >> > > I'm not using very recent binutils, (can't remember if that's 2.25 or 2.26, > and I can't easily check remotely). Maybe something changed in > the assembler? > I checked, and I am still using 2.25. Was there a change in gas in this area since then? Christophe >> Ramana >>> >>>> I've tried assembling the string 'movw r0, 32768' and get the error when >>>> -march=armv6kz or earlier. I suspect the new movhi and/or movhf patterns >>>> added earlier in the series need the architecture level added as a >>>> precondition but I'll need to look into it. >>>> >>>> Matthew >>> >>> Thanks, >>> >>> Christophe