On 16 January 2015 at 17:30, Christophe Lyon wrote: > On 16 January 2015 at 17:07, Tejas Belagod wrote: >> On 13/01/15 15:18, Christophe Lyon wrote: >>> >>> >>> * gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc: New file. >>> * gcc.target/aarch64/advsimd-intrinsics/vraddhn.c: New file. >>> * gcc.target/aarch64/advsimd-intrinsics/vrsubhn.c: New file. >>> * gcc.target/aarch64/advsimd-intrinsics/vsubhn.c: New file. >>> * gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Use code from >>> vXXXhn.inc. >>> >>> diff --git >>> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc >>> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc >>> new file mode 100644 >>> index 0000000..0dbcc92 >>> --- /dev/null >>> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc >>> @@ -0,0 +1,50 @@ >>> +#define FNNAME1(NAME) exec_ ## NAME >>> +#define FNNAME(NAME) FNNAME1(NAME) >>> + >>> +void FNNAME (INSN_NAME) (void) >>> +{ >>> + /* Basic test: vec64=vaddhn(vec128_a, vec128_b), then store the result. >>> */ >>> +#define TEST_VADDHN1(INSN, T1, T2, W, W2, N) \ >>> + VECT_VAR(vector64, T1, W2, N) = INSN##_##T2##W(VECT_VAR(vector1, T1, W, >>> N), \ >>> + VECT_VAR(vector2, T1, W, >>> N)); \ >>> + vst1_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector64, T1, W2, >>> N)) >>> + >>> +#define TEST_VADDHN(INSN, T1, T2, W, W2, N) \ >>> + TEST_VADDHN1(INSN, T1, T2, W, W2, N) >>> + >> >> >> Minor nit. If this is a template file, maybe you should name this macro >> TEST_ADDHN as TEST_XXHN? Just that a template having an INSN name is >> confusing. > Agreed. > >>> +VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33, >>> + 0x33, 0x33, 0x33, 0x33 }; >>> +VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 >>> }; >> >> >> Though never used, poly seems to have sneaked in here too. > Indeed, sorry for that. > I rushed to have as many tests as possible ready before stage 4, but > obviously I missed a few cleanups. > Here is an updated version, where I have removed a few more useless variables than you noticed: the [u]int64x1 as well as the 128 bits ones. Christophe. >> Otherwise, LGTM. >> >> Thanks, >> Tejas. >>