From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by sourceware.org (Postfix) with ESMTPS id EE86E384BC3C for ; Mon, 2 Nov 2020 10:25:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org EE86E384BC3C Received: by mail-ot1-x335.google.com with SMTP id b2so12124084ots.5 for ; Mon, 02 Nov 2020 02:25:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=GNhzs0WopjS2s3o6KQpek+1t0+z4c3gUoSG1jyEUGvo=; b=WyTtYgAHWWU3CGXV9Y67kc3Ls4tLOXB6Az14dgVBIWuoYYdzhr7griiEUx53O87cjb Fy6syTwh4HrEt9V0FA8n9w0zQz5MPYpTDfjsoOb/sb/p8aszTDBzXdnPJawnC8jhFbRI CZZV2QWv57fK7xThmp5JZ1uaGRF9jybSMAAK2EhaSUb8B3pSuAYnpx7FCDbP1YXGvkkb Ggm8gkCBZetkNnyFZpk4aG/27lp0gYLTFwOmMwF1s1fbLh/eA3ujEuNA30MbOa8n6+ip kY5q1mcD9CCBkOnA98+zKcGgZqXcP++ApChX3tZOYQOTr3fuYskDrcla1pR/eP6yXLAM y8Yg== X-Gm-Message-State: AOAM530pJ1H1maBvkkXcek9CferdBPpF8DnCnWO+6eHmf+GFtspUZg1s c+G7GxbakDJC4hHeWcSpQGhtJ33exSTrK2F3yV3GEukOrz0= X-Google-Smtp-Source: ABdhPJzYL602y6n9LzMywb/uMQWHOW5VmKM2ACPPJBzH6gvE9KTInG/s86OFQfUZgg/Vtft7268qlyQQGTqYcA03/PA= X-Received: by 2002:a9d:4b14:: with SMTP id q20mr1439373otf.269.1604312707568; Mon, 02 Nov 2020 02:25:07 -0800 (PST) MIME-Version: 1.0 References: <1601409053-17310-1-git-send-email-christophe.lyon@linaro.org> <106645a8-8542-6095-6dd6-4454a878d98f@foss.arm.com> <11736e3f-6e4b-7a42-e034-10e77473cfcc@foss.arm.com> <643448ae-7797-5883-ec7c-75eff98d0db0@foss.arm.com> <4604bc17-3ceb-6324-4286-402d2d9da174@foss.arm.com> <9cf6f7e4-2ba6-51fd-115a-8c9b6d9ef772@foss.arm.com> <1813e83b-c3a0-00ed-2224-c5fc6a9c399c@foss.arm.com> In-Reply-To: From: Christophe Lyon Date: Mon, 2 Nov 2020 11:24:55 +0100 Message-ID: Subject: Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code To: Richard Earnshaw Cc: gcc Patches Content-Type: multipart/mixed; boundary="0000000000000b740505b31d29e2" X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_ASCII_DIVIDERS, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Nov 2020 10:25:32 -0000 --0000000000000b740505b31d29e2 Content-Type: text/plain; charset="UTF-8" Hi, On Fri, 30 Oct 2020 at 13:49, Richard Earnshaw wrote: > > On 29/10/2020 19:18, Richard Earnshaw via Gcc-patches wrote: > > On 28/10/2020 18:10, Christophe Lyon via Gcc-patches wrote: > >> On Wed, 28 Oct 2020 at 18:44, Richard Earnshaw > >> wrote: > >>> > >>> On 27/10/2020 15:42, Richard Earnshaw via Gcc-patches wrote: > >>>> On 26/10/2020 10:52, Christophe Lyon via Gcc-patches wrote: > >>>>> On Thu, 22 Oct 2020 at 17:22, Richard Earnshaw > >>>>> wrote: > >>>>>> > >>>>>> On 22/10/2020 09:45, Christophe Lyon via Gcc-patches wrote: > >>>>>>> On Wed, 21 Oct 2020 at 19:36, Richard Earnshaw > >>>>>>> wrote: > >>>>>>>> > >>>>>>>> On 21/10/2020 17:11, Christophe Lyon via Gcc-patches wrote: > >>>>>>>>> On Wed, 21 Oct 2020 at 18:07, Richard Earnshaw > >>>>>>>>> wrote: > >>>>>>>>>> > >>>>>>>>>> On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: > >>>>>>>>>>> On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw > >>>>>>>>>>> wrote: > >>>>>>>>>>>> > >>>>>>>>>>>> On 20/10/2020 12:22, Richard Earnshaw wrote: > >>>>>>>>>>>>> On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wrote: > >>>>>>>>>>>>>> On Mon, 19 Oct 2020 at 16:39, Richard Earnshaw > >>>>>>>>>>>>>> wrote: > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> On 12/10/2020 08:59, Christophe Lyon via Gcc-patches wrote: > >>>>>>>>>>>>>>>> On Thu, 8 Oct 2020 at 11:58, Richard Earnshaw > >>>>>>>>>>>>>>>> wrote: > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> On 08/10/2020 10:07, Christophe Lyon via Gcc-patches wrote: > >>>>>>>>>>>>>>>>>> On Tue, 6 Oct 2020 at 18:02, Richard Earnshaw > >>>>>>>>>>>>>>>>>> wrote: > >>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> On 29/09/2020 20:50, Christophe Lyon via Gcc-patches wrote: > >>>>>>>>>>>>>>>>>>>> When mi_delta is > 255 and -mpure-code is used, we cannot load delta > >>>>>>>>>>>>>>>>>>>> from code memory (like we do without -mpure-code). > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> This patch builds the value of mi_delta into r3 with a series of > >>>>>>>>>>>>>>>>>>>> movs/adds/lsls. > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> We also do some cleanup by not emitting the function address and delta > >>>>>>>>>>>>>>>>>>>> via .word directives at the end of the thunk since we don't use them > >>>>>>>>>>>>>>>>>>>> with -mpure-code. > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> No need for new testcases, this bug was already identified by > >>>>>>>>>>>>>>>>>>>> eg. pr46287-3.C > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> 2020-09-29 Christophe Lyon > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> gcc/ > >>>>>>>>>>>>>>>>>>>> * config/arm/arm.c (arm_thumb1_mi_thunk): Build mi_delta in r3 and > >>>>>>>>>>>>>>>>>>>> do not emit function address and delta when -mpure-code is used. > >>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> Hi Richard, > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> Thanks for your comments. > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> There are some optimizations you can make to this code. > >>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> Firstly, for values between 256 and 510 (inclusive), it would be better > >>>>>>>>>>>>>>>>>>> to just expand a mov of 255 followed by an add. > >>>>>>>>>>>>>>>>>> I now see the splitted for the "Pe" constraint which I hadn't noticed > >>>>>>>>>>>>>>>>>> before, so I can write something similar indeed. > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> However, I'm note quite sure to understand the benefit in the split > >>>>>>>>>>>>>>>>>> when -mpure-code is NOT used. > >>>>>>>>>>>>>>>>>> Consider: > >>>>>>>>>>>>>>>>>> int f3_1 (void) { return 510; } > >>>>>>>>>>>>>>>>>> int f3_2 (void) { return 511; } > >>>>>>>>>>>>>>>>>> Compile with -O2 -mcpu=cortex-m0: > >>>>>>>>>>>>>>>>>> f3_1: > >>>>>>>>>>>>>>>>>> movs r0, #255 > >>>>>>>>>>>>>>>>>> lsls r0, r0, #1 > >>>>>>>>>>>>>>>>>> bx lr > >>>>>>>>>>>>>>>>>> f3_2: > >>>>>>>>>>>>>>>>>> ldr r0, .L4 > >>>>>>>>>>>>>>>>>> bx lr > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> The splitter makes the code bigger, does it "compensate" for this by > >>>>>>>>>>>>>>>>>> not having to load the constant? > >>>>>>>>>>>>>>>>>> Actually the constant uses 4 more bytes, which should be taken into > >>>>>>>>>>>>>>>>>> account when comparing code size, > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> Yes, the size of the literal pool entry needs to be taken into account. > >>>>>>>>>>>>>>>>> It might happen that the entry could be shared with another use of that > >>>>>>>>>>>>>>>>> literal, but in general that's rare. > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> so f3_1 uses 6 bytes, and f3_2 uses 8, so as you say below three > >>>>>>>>>>>>>>>>>> thumb1 instructions would be equivalent in size compared to loading > >>>>>>>>>>>>>>>>>> from the literal pool. Should the 256-510 range be extended? > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> It's a bit borderline at three instructions when literal pools are not > >>>>>>>>>>>>>>>>> expensive to use, but in thumb1 literal pools tend to be quite small due > >>>>>>>>>>>>>>>>> to the limited pc offsets we can use. I think on balance we probably > >>>>>>>>>>>>>>>>> want to use the instruction sequence unless optimizing for size. > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> This is also true for > >>>>>>>>>>>>>>>>>>> the literal pools alternative as well, so should be handled before all > >>>>>>>>>>>>>>>>>>> this. > >>>>>>>>>>>>>>>>>> I am not sure what you mean: with -mpure-code, the above sample is compiled as: > >>>>>>>>>>>>>>>>>> f3_1: > >>>>>>>>>>>>>>>>>> movs r0, #255 > >>>>>>>>>>>>>>>>>> lsls r0, r0, #1 > >>>>>>>>>>>>>>>>>> bx lr > >>>>>>>>>>>>>>>>>> f3_2: > >>>>>>>>>>>>>>>>>> movs r0, #1 > >>>>>>>>>>>>>>>>>> lsls r0, r0, #8 > >>>>>>>>>>>>>>>>>> adds r0, r0, #255 > >>>>>>>>>>>>>>>>>> bx lr > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> so the "return 510" case is already handled as without -mpure-code. > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> I was thinking specifically of the thunk sequence where you seem to be > >>>>>>>>>>>>>>>>> emitting instructions directly rather than generating RTL. The examples > >>>>>>>>>>>>>>>>> you show here are not thunks. > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> OK thanks for the clarification. > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Here is an updated version, split into 3 patches to hopefully make > >>>>>>>>>>>>>>>> review easier. > >>>>>>>>>>>>>>>> They apply on top of my other mpure-code patches for PR96967 and PR96770: > >>>>>>>>>>>>>>>> https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554956.html > >>>>>>>>>>>>>>>> https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554957.html > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> I kept it this way to make incremental changes easier to understand. > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Patch 1: With the hope to avoid confusion and make maintenance easier, > >>>>>>>>>>>>>>>> I have updated thumb1_gen_const_int() so that it can generate either RTL or > >>>>>>>>>>>>>>>> asm. This way, all the code used to build thumb-1 constants is in the > >>>>>>>>>>>>>>>> same place, > >>>>>>>>>>>>>>>> in case we need to improve/fix it later. We now generate shorter sequences in > >>>>>>>>>>>>>>>> several cases matching your comments. > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Patch 2: Removes the equivalent loop from thumb1_movsi_insn pattern and > >>>>>>>>>>>>>>>> calls thumb1_gen_const_int. > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Patch 3: Update of the original patch in this thread, now calls > >>>>>>>>>>>>>>>> thumb1_gen_const_int. > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> Yuk! Those changes to thumb1_gen_const_int are horrible. > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> I think we should be able to leverage the fact that the compiler can use > >>>>>>>>>>>>>>> C++ now to do much better than that, for example by making that function > >>>>>>>>>>>>>>> a template. For example (and this is just a sketch): > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>> > >>>>>>>>>>>>>> Indeed! I didn't think about it since there is no other use of > >>>>>>>>>>>>>> templates in arm.c yet. > >>>>>>>>>>>>>> I'll send an update soon. > >>>>>>>>>>>>>> > >>>>>>>>>>>>>> Other than that, does the approach look OK to you? > >>>>>>>>>>>>>> > >>>>>>>>>>>>> > >>>>>>>>>>>>> Yes, I think this is heading in the right direction. Bringing the two > >>>>>>>>>>>>> immediate generating operations into a single function can only be a > >>>>>>>>>>>>> good thing. > >>>>>>>>>>>>> > >>>>>>>>>>>>> Looking again at your example constant sequences, I see: > >>>>>>>>>>>>> > >>>>>>>>>>>>> 0x1000010: > >>>>>>>>>>>>> movs r3, #16 > >>>>>>>>>>>>> lsls r3, #16 > >>>>>>>>>>>>> adds r3, #1 > >>>>>>>>>>>>> lsls r3, #4 > >>>>>>>>>>>>> 0x1000011: > >>>>>>>>>>>>> movs r3, #1 > >>>>>>>>>>>>> lsls r3, #24 > >>>>>>>>>>>>> adds r3, #17 > >>>>>>>>>>>>> > >>>>>>>>>>>>> The first of these looks odd, given the second sequence. Why doesn't > >>>>>>>>>>>>> the first expand to > >>>>>>>>>>>>> > >>>>>>>>>>>>> 0x1000010: > >>>>>>>>>>>>> movs r3, #16 > >>>>>>>>>>>>> lsls r3, #16 > >>>>>>>>>>>>> adds r3, #16 > >>>>>>>>>>>>> > >>>>>>>>>>>> Err, I mean to: > >>>>>>>>>>>> > >>>>>>>>>>>> > >>>>>>>>>>>> 0x1000010: > >>>>>>>>>>>> movs r3, #1 > >>>>>>>>>>>> lsls r3, #24 > >>>>>>>>>>>> adds r3, #16 > >>>>>>>>>>>> > >>>>>>>>>>>> ? > >>>>>>>>>>> > >>>>>>>>>>> Because I first try to right-shift the constant, hoping to reduce its > >>>>>>>>>>> range and need less instructions to build the higher part, then > >>>>>>>>>>> left-shift back. > >>>>>>>>>>> > >>>>>>>>>>> In this particular case, we'd need to realize that there are many > >>>>>>>>>>> zeros "inside" the constant. > >>>>>>>>>>> > >>>>>>>>>>> If I remove the part that tries to reduce the range, I do get that > >>>>>>>>>>> sequence, but for 764 I now generate > >>>>>>>>>>> movs r3, #2 > >>>>>>>>>>> lsls r3, #8 > >>>>>>>>>>> adds r3, #252 > >>>>>>>>>>> instead of > >>>>>>>>>>> movs r3, #191 > >>>>>>>>>>> lsls r3, #2 > >>>>>>>>>>> > >>>>>>>>>>> A possibility would be to try both approaches and keep the shortest one. > >>>>>>>>>> > >>>>>>>>>> Lets leave that for now, it's not important to fixing the main issue; > >>>>>>>>>> but we should remember we need to come back to it at some point. > >>>>>>>>>> > >>>>>>>>> Thanks, that's what I was thinking too. > >>>>>>>>> > >>>>>>>>>> There are other tricks as well, such as > >>>>>>>>>> > >>>>>>>>>> 0xffffff > >>>>>>>>>> > >>>>>>>>>> can be done as > >>>>>>>>>> > >>>>>>>>>> 0x1000000 - 1 > >>>>>>>>>> > >>>>>>>>>> and > >>>>>>>>>> > >>>>>>>>>> 0xfffffd > >>>>>>>>>> > >>>>>>>>>> as > >>>>>>>>>> > >>>>>>>>>> 0x1000000 - 3 > >>>>>>>>>> > >>>>>>>>>> but these can wait as well. > >>>>>>>>>> > >>>>>>>>> > >>>>>>>>> Didn't we already need to handle such tricks? I'm surprised this > >>>>>>>>> wasn't needed earlier. > >>>>>>>>> > >>>>>>>> > >>>>>>>> I don't think we ever worried about them. Most of them need at least 3 > >>>>>>>> instructions so aren't a code size saving over using a literal pool entry. > >>>>>>>> > >>>>>>> OK, this will also help when using -mslow-flash-data. > >>>>>>> > >>>>>>> Here are updated patches, now using a template as you suggested. > >>>>>> > >>>>>> Looking better, but when I try to apply this to my local tree patch 2 > >>>>>> fails (I'm not exactly sure why, what was your baseline for these > >>>>>> patches?) > >>>>> I have the tree patches in this thread on top of these other two: > >>>>> https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556768.html > >>>>> https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556769.html > >>>>> > >>>>> They have gradual improvements to thumb1_movsi_insn. > >>>>> > >>>>>> -- that patch looks suspicious anyway, you're replacing code > >>>>>> that prints out assembly with code that generates RTL. > >>>>> Right! I took me a while to understand how I could miss this, sorry. > >>>>> That was caused by improper testing, as this part of the code > >>>>> isn't used when targetting cortex-m0. I have added a testcase > >>>>> for cortex-m23 which crashes with the previous version of patch 2, > >>>>> and succeeds now. > >>>>> > >>>>>> Could you also rename t1_print and t1_rtl to thumb1_const_print and > >>>>>> thumb1_const_rtl. I think the names as they stand are likely to be too > >>>>>> generic. > >>>>> OK, done. > >>>>> > >>>>> How about this new version? > >>>>> I'm not yet sure about the most appropriate naming for: > >>>>> thumb1_gen_const_int > >>>>> thumb1_gen_const_int_asm > >>>>> should they be > >>>>> thumb1_gen_const_int_rtl > >>>>> thumb1_gen_const_int_print > >>>>> to be consistent with the new classes? > >>>> > >>>> It would probably be better, yes. > >>>> > >>>> More detailed comments below. > >>>> > >>>> R. > >>>> > >>>>> > >>>>> Thanks, > >>>>> > >>>>> Christophe > >>>>> > >>>>>> R. > >>>>>> > >>>>>>> > >>>>>>> Thanks, > >>>>>>> > >>>>>>> Christophe > >>>>>>> > >>>>>>>> R. > >>>>>>>> > >>>>>>>>> > >>>>>>>>>> > >>>>>>>>>> R. > >>>>>>>>>> > >>>>>>>>>>> > >>>>>>>>>>> > >>>>>>>>>>>>> > >>>>>>>>>>>>> R. > >>>>>>>>>>>>> > >>>>>>>>>>>>>> Thanks, > >>>>>>>>>>>>>> > >>>>>>>>>>>>>> Christophe > >>>>>>>>>>>>>> > >>>>>>>>>>>>>>> class t1_rtl > >>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>> public: > >>>>>>>>>>>>>>> void ashift(int a) { gen_rtx_ASHIFT(a); } > >>>>>>>>>>>>>>> void rshift(int b) { gen_rtx_SHIFTRT(b); } > >>>>>>>>>>>>>>> }; > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> class t1_print > >>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>> public: > >>>>>>>>>>>>>>> t1_print (FILE *f) : t_file(f) {} > >>>>>>>>>>>>>>> void ashift (int a) { fprintf (t_file, "a shift %d\n", a); } > >>>>>>>>>>>>>>> void rshift (int b) { fprintf (t_file, "r shift %d\n", b); } > >>>>>>>>>>>>>>> private: > >>>>>>>>>>>>>>> FILE *t_file; > >>>>>>>>>>>>>>> }; > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> template > >>>>>>>>>>>>>>> void thumb1_gen_const_int(T t, int f) > >>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>> // Expansion of thumb1_gen_const_int ... > >>>>>>>>>>>>>>> t.ashift(f); > >>>>>>>>>>>>>>> } > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> // Usage... > >>>>>>>>>>>>>>> void f1() > >>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>> // Use the RTL expander > >>>>>>>>>>>>>>> t1_rtl g; > >>>>>>>>>>>>>>> thumb1_gen_const_int (g, 3); > >>>>>>>>>>>>>>> } > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> void f2() > >>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>> // Use the printf expander writing to stdout > >>>>>>>>>>>>>>> t1_print g(stdout); > >>>>>>>>>>>>>>> thumb1_gen_const_int (g, 3); > >>>>>>>>>>>>>>> } > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> With this you can write thumb1_gen_const_int without having to worry > >>>>>>>>>>>>>>> about which expander is being used in each instance and the template > >>>>>>>>>>>>>>> expansion will use the right version. > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> R. > >>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> I also suspect (but haven't check) that the base adjustment will > >>>>>>>>>>>>>>>>>>> most commonly be a multiple of the machine word size (ie 4). If that is > >>>>>>>>>>>>>>>>>>> the case then you could generate n/4 and then shift it left by 2 for an > >>>>>>>>>>>>>>>>>>> even greater range of literals. > >>>>>>>>>>>>>>>>>> I can see there is provision for this in the !TARGET_THUMB1_ONLY case, > >>>>>>>>>>>>>>>>>> I'll update my patch. > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> More generally, any sequence of up to > >>>>>>>>>>>>>>>>>>> three thumb1 instructions will be no larger, and probably as fast as the > >>>>>>>>>>>>>>>>>>> existing literal pool fall back. > >>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> Secondly, if the value is, for example, 65536 (0x10000), your code will > >>>>>>>>>>>>>>>>>>> emit a mov followed by two shift-by-8 instructions; the two shifts could > >>>>>>>>>>>>>>>>>>> be merged into a single shift-by-16. > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> Right, I'll try to make use of thumb_shiftable_const. > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> Finally, I'd really like to see some executable tests for this, if at > >>>>>>>>>>>>>>>>>>> all possible. > >>>>>>>>>>>>>>>>>> I mentioned pr46287-3.C, but that's not the only existing testcase > >>>>>>>>>>>>>>>>>> that showed the problem. There are also: > >>>>>>>>>>>>>>>>>> g++.dg/opt/thunk1.C > >>>>>>>>>>>>>>>>>> g++.dg/ipa/pr46984.C > >>>>>>>>>>>>>>>>>> g++.dg/torture/pr46287.C > >>>>>>>>>>>>>>>>>> g++.dg/torture/pr45699.C > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> Do you want that I copy one of these in the arm subdir and add > >>>>>>>>>>>>>>>>>> -mpure-code in dg-options? > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> On reflection, probably not - that just makes things more complicated > >>>>>>>>>>>>>>>>> with all the dg-options mess (I'm worried about interactions with other > >>>>>>>>>>>>>>>>> sets of options on the command line and the fall-out from that). If > >>>>>>>>>>>>>>>>> someone cares about pure-code they should be doing full testsuite runs > >>>>>>>>>>>>>>>>> with it enabled and that should be sufficient. > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Yes, that's what I am doing manually, it's a bit tricky, and I use a > >>>>>>>>>>>>>>>> modified simulator. > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Thanks, > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>> Christophe > >>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> R. > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> Thanks, > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>> Christophe > >>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> R. > >>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> k# (use "git pull" to merge the remote branch into yours) > >>>>>>>>>>>>>>>>>>>> --- > >>>>>>>>>>>>>>>>>>>> gcc/config/arm/arm.c | 91 +++++++++++++++++++++++++++++++++++++--------------- > >>>>>>>>>>>>>>>>>>>> 1 file changed, 66 insertions(+), 25 deletions(-) > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > >>>>>>>>>>>>>>>>>>>> index ceeb91f..62abeb5 100644 > >>>>>>>>>>>>>>>>>>>> --- a/gcc/config/arm/arm.c > >>>>>>>>>>>>>>>>>>>> +++ b/gcc/config/arm/arm.c > >>>>>>>>>>>>>>>>>>>> @@ -28342,9 +28342,43 @@ arm_thumb1_mi_thunk (FILE *file, tree, HOST_WIDE_INT delta, > >>>>>>>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>>>>>>> if (mi_delta > 255) > >>>>>>>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>>>>>>> - fputs ("\tldr\tr3, ", file); > >>>>>>>>>>>>>>>>>>>> - assemble_name (file, label); > >>>>>>>>>>>>>>>>>>>> - fputs ("+4\n", file); > >>>>>>>>>>>>>>>>>>>> + /* With -mpure-code, we cannot load delta from the constant > >>>>>>>>>>>>>>>>>>>> + pool: we build it explicitly. */ > >>>>>>>>>>>>>>>>>>>> + if (target_pure_code) > >>>>>>>>>>>>>>>>>>>> + { > >>>>>>>>>>>>>>>>>>>> + bool mov_done_p = false; > >>>>>>>>>>>>>>>>>>>> + int i; > >>>>>>>>>>>>>>>>>>>> + > >>>>>>>>>>>>>>>>>>>> + /* Emit upper 3 bytes if needed. */ > >>>>>>>>>>>>>>>>>>>> + for (i = 0; i < 3; i++) > >>>>>>>>>>>>>>>>>>>> + { > >>>>>>>>>>>>>>>>>>>> + int byte = (mi_delta >> (8 * (3 - i))) & 0xff; > >>>>>>>>>>>>>>>>>>>> + > >>>>>>>>>>>>>>>>>>>> + if (byte) > >>>>>>>>>>>>>>>>>>>> + { > >>>>>>>>>>>>>>>>>>>> + if (mov_done_p) > >>>>>>>>>>>>>>>>>>>> + asm_fprintf (file, "\tadds\tr3, #%d\n", byte); > >>>>>>>>>>>>>>>>>>>> + else > >>>>>>>>>>>>>>>>>>>> + asm_fprintf (file, "\tmovs\tr3, #%d\n", byte); > >>>>>>>>>>>>>>>>>>>> + mov_done_p = true; > >>>>>>>>>>>>>>>>>>>> + } > >>>>>>>>>>>>>>>>>>>> + > >>>>>>>>>>>>>>>>>>>> + if (mov_done_p) > >>>>>>>>>>>>>>>>>>>> + asm_fprintf (file, "\tlsls\tr3, #8\n"); > >>>>>>>>>>>>>>>>>>>> + } > >>>>>>>>>>>>>>>>>>>> + > >>>>>>>>>>>>>>>>>>>> + /* Emit lower byte if needed. */ > >>>>>>>>>>>>>>>>>>>> + if (!mov_done_p) > >>>>>>>>>>>>>>>>>>>> + asm_fprintf (file, "\tmovs\tr3, #%d\n", mi_delta & 0xff); > >>>>>>>>>>>>>>>>>>>> + else if (mi_delta & 0xff) > >>>>>>>>>>>>>>>>>>>> + asm_fprintf (file, "\tadds\tr3, #%d\n", mi_delta & 0xff); > >>>>>>>>>>>>>>>>>>>> + } > >>>>>>>>>>>>>>>>>>>> + else > >>>>>>>>>>>>>>>>>>>> + { > >>>>>>>>>>>>>>>>>>>> + fputs ("\tldr\tr3, ", file); > >>>>>>>>>>>>>>>>>>>> + assemble_name (file, label); > >>>>>>>>>>>>>>>>>>>> + fputs ("+4\n", file); > >>>>>>>>>>>>>>>>>>>> + } > >>>>>>>>>>>>>>>>>>>> asm_fprintf (file, "\t%ss\t%r, %r, r3\n", > >>>>>>>>>>>>>>>>>>>> mi_op, this_regno, this_regno); > >>>>>>>>>>>>>>>>>>>> } > >>>>>>>>>>>>>>>>>>>> @@ -28380,30 +28414,37 @@ arm_thumb1_mi_thunk (FILE *file, tree, HOST_WIDE_INT delta, > >>>>>>>>>>>>>>>>>>>> fputs ("\tpop\t{r3}\n", file); > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> fprintf (file, "\tbx\tr12\n"); > >>>>>>>>>>>>>>>>>>>> - ASM_OUTPUT_ALIGN (file, 2); > >>>>>>>>>>>>>>>>>>>> - assemble_name (file, label); > >>>>>>>>>>>>>>>>>>>> - fputs (":\n", file); > >>>>>>>>>>>>>>>>>>>> - if (flag_pic) > >>>>>>>>>>>>>>>>>>>> + > >>>>>>>>>>>>>>>>>>>> + /* With -mpure-code, we don't need to emit literals for the > >>>>>>>>>>>>>>>>>>>> + function address and delta since we emitted code to build > >>>>>>>>>>>>>>>>>>>> + them. */ > >>>>>>>>>>>>>>>>>>>> + if (!target_pure_code) > >>>>>>>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>>>>>>> - /* Output ".word .LTHUNKn-[3,7]-.LTHUNKPCn". */ > >>>>>>>>>>>>>>>>>>>> - rtx tem = XEXP (DECL_RTL (function), 0); > >>>>>>>>>>>>>>>>>>>> - /* For TARGET_THUMB1_ONLY the thunk is in Thumb mode, so the PC > >>>>>>>>>>>>>>>>>>>> - pipeline offset is four rather than eight. Adjust the offset > >>>>>>>>>>>>>>>>>>>> - accordingly. */ > >>>>>>>>>>>>>>>>>>>> - tem = plus_constant (GET_MODE (tem), tem, > >>>>>>>>>>>>>>>>>>>> - TARGET_THUMB1_ONLY ? -3 : -7); > >>>>>>>>>>>>>>>>>>>> - tem = gen_rtx_MINUS (GET_MODE (tem), > >>>>>>>>>>>>>>>>>>>> - tem, > >>>>>>>>>>>>>>>>>>>> - gen_rtx_SYMBOL_REF (Pmode, > >>>>>>>>>>>>>>>>>>>> - ggc_strdup (labelpc))); > >>>>>>>>>>>>>>>>>>>> - assemble_integer (tem, 4, BITS_PER_WORD, 1); > >>>>>>>>>>>>>>>>>>>> - } > >>>>>>>>>>>>>>>>>>>> - else > >>>>>>>>>>>>>>>>>>>> - /* Output ".word .LTHUNKn". */ > >>>>>>>>>>>>>>>>>>>> - assemble_integer (XEXP (DECL_RTL (function), 0), 4, BITS_PER_WORD, 1); > >>>>>>>>>>>>>>>>>>>> + ASM_OUTPUT_ALIGN (file, 2); > >>>>>>>>>>>>>>>>>>>> + assemble_name (file, label); > >>>>>>>>>>>>>>>>>>>> + fputs (":\n", file); > >>>>>>>>>>>>>>>>>>>> + if (flag_pic) > >>>>>>>>>>>>>>>>>>>> + { > >>>>>>>>>>>>>>>>>>>> + /* Output ".word .LTHUNKn-[3,7]-.LTHUNKPCn". */ > >>>>>>>>>>>>>>>>>>>> + rtx tem = XEXP (DECL_RTL (function), 0); > >>>>>>>>>>>>>>>>>>>> + /* For TARGET_THUMB1_ONLY the thunk is in Thumb mode, so the PC > >>>>>>>>>>>>>>>>>>>> + pipeline offset is four rather than eight. Adjust the offset > >>>>>>>>>>>>>>>>>>>> + accordingly. */ > >>>>>>>>>>>>>>>>>>>> + tem = plus_constant (GET_MODE (tem), tem, > >>>>>>>>>>>>>>>>>>>> + TARGET_THUMB1_ONLY ? -3 : -7); > >>>>>>>>>>>>>>>>>>>> + tem = gen_rtx_MINUS (GET_MODE (tem), > >>>>>>>>>>>>>>>>>>>> + tem, > >>>>>>>>>>>>>>>>>>>> + gen_rtx_SYMBOL_REF (Pmode, > >>>>>>>>>>>>>>>>>>>> + ggc_strdup (labelpc))); > >>>>>>>>>>>>>>>>>>>> + assemble_integer (tem, 4, BITS_PER_WORD, 1); > >>>>>>>>>>>>>>>>>>>> + } > >>>>>>>>>>>>>>>>>>>> + else > >>>>>>>>>>>>>>>>>>>> + /* Output ".word .LTHUNKn". */ > >>>>>>>>>>>>>>>>>>>> + assemble_integer (XEXP (DECL_RTL (function), 0), 4, BITS_PER_WORD, 1); > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>>> - if (TARGET_THUMB1_ONLY && mi_delta > 255) > >>>>>>>>>>>>>>>>>>>> - assemble_integer (GEN_INT(mi_delta), 4, BITS_PER_WORD, 1); > >>>>>>>>>>>>>>>>>>>> + if (TARGET_THUMB1_ONLY && mi_delta > 255) > >>>>>>>>>>>>>>>>>>>> + assemble_integer (GEN_INT(mi_delta), 4, BITS_PER_WORD, 1); > >>>>>>>>>>>>>>>>>>>> + } > >>>>>>>>>>>>>>>>>>>> } > >>>>>>>>>>>>>>>>>>>> else > >>>>>>>>>>>>>>>>>>>> { > >>>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>>>> > >>>>>>>>>>>>>>> > >>>>>>>>>>>>> > >>>>>>>>>>>> > >>>>>>>>>> > >>>>>>>> > >>>>>> > >>>> > >>>> +class thumb1_const_rtl > >>>> ... > >>>> + void mov (int val) > >>>> > >>>> This should take a HOST_WIDE_INT. Similarly for add and shift. The > >>>> same applies to the asm version as well. > >>>> > >>>> + asm_fprintf (t_file, "\tmovs\tr%d, #%d\n", dst_regno, val); > >>>> > >>>> Should be using reg_names[dst_regno] in all cases. In fact, you might > >>>> want to move that lookup to the constructor and just save a pointer to > >>>> the string there. You'll need to use HOST_WIDE_INT_PRINT_UNSIGNED > >>> > >>> Correction, for a (signed) HOST_WIDE_INT, this should be > >>> HOST_WIDE_INT_PRINT_DEC. > >>> > >> > >> Right, but if "val" is unsigned HOST_WIDE_INT, all the methods in the > >> two classes > >> can have unsigned HOST_WIDE_INT parameters, and thus use > >> HOST_WIDE_INT_PRINT_UNSIGNED? > >> > > > > It's generally safer to print it as a signed value. We probably won't > > have cases where the top bit of a 32-bit word are set here; but if you > > do, and the value is unsigned, you end up with 16 digit hex numbers > > rather than the 8 you'd expect on a 32-bit target because HOST_WIDE_INT > > is at least 64 bits in size. > > > > I don't mean hex numbers, of course, just very large decimal numbers. > But the point is still the same. > Here is an updated version, which hopefully addresses your comments, and adds testcases for cortex-m0 and cortex-m23. Christophe > R. > > > R. > > > >> > >>>> rather than "%d" for the immediate. > >>>> > >>>> +template > >>>> +void > >>>> +thumb1_gen_const_int_1 (T dst, HOST_WIDE_INT op1) > >>>> +{ > >>>> + bool mov_done_p = false; > >>>> + int val = op1; > >>>> > >>>> This potentially silently loses precision. In fact, I think you really > >>>> want to use "unsigned HOST_WIDE_INT" throughout the following code, so > >>>> that the right shifts aren't undefined if dealing with negative numbers. > >>>> > >>>> For safety, you should also have an assertion in here that > >>>> > >>>> op1 == trunc_int_for_mode (op1, SImode) > >>>> > >>>> + int shift = 0; > >>>> + int i; > >>>> + > >>>> + if (val == 0) > >>>> > >>>> You can short-circuit 0..255 here for a quick exit. > >>>> > >>>> + { > >>>> + dst.mov (val); > >>>> + return; > >>>> + } > >>>> > >>>> Another trick: if the top nine bits of the 32-bit value are all set, > >>>> you're probably going to be better off (and certainly not worse off) by > >>>> generating -op1 and then negating the result in a final step - you can > >>>> do that via recursion. > >>>> > >>>> + > >>>> + /* In the general case, we need 7 instructions to build > >>>> + a 32 bits constant (1 movs, 3 lsls, 3 adds). We can > >>>> + do better if VAL is small enough, or > >>>> + right-shiftable by a suitable amount. If the > >>>> + right-shift enables to encode at least one less byte, > >>>> + it's worth it: we save a adds and a lsls at the > >>>> + expense of a final lsls. */ > >>>> + int final_shift = number_of_first_bit_set (val); > >>>> + > >>>> + int leading_zeroes = clz_hwi (val); > >>>> + int number_of_bytes_needed > >>>> + = ((HOST_BITS_PER_WIDE_INT - 1 - leading_zeroes) > >>>> + / BITS_PER_UNIT) + 1; > >>>> + int number_of_bytes_needed2 > >>>> + = ((HOST_BITS_PER_WIDE_INT - 1 - leading_zeroes - final_shift) > >>>> + / BITS_PER_UNIT) + 1; > >>>> + > >>>> + if (number_of_bytes_needed2 < number_of_bytes_needed) > >>>> + val >>= final_shift; > >>>> + else > >>>> + final_shift = 0; > >>>> + > >>>> + /* If we are in a very small range, we can use either a single movs > >>>> + or movs+adds. */ > >>>> + if ((val >= 0) && (val <= 510)) > >>>> > >>>> if val is made unsigned HWI as I suggest, the lower bounds test is not > >>>> needed. > >>>> > >>>> + { > >>>> + if (val > 255) > >>>> + { > >>>> + int high = val - 255; > >>>> > >>>> Again, watch your types. > >>>> > >>>> + > >>>> + dst.mov (high); > >>>> + dst.add (255); > >>>> + } > >>>> + else > >>>> + dst.mov (val); > >>>> + > >>>> + if (final_shift > 0) > >>>> + dst.ashift (final_shift); > >>>> + } > >>>> + else > >>>> + { > >>>> + /* General case, emit upper 3 bytes as needed. */ > >>>> + for (i = 0; i < 3; i++) > >>>> + { > >>>> + int byte = (val >> (8 * (3 - i))) & 0xff; > >>>> > >>>> and here. > >>>> > >>>> + > >>>> + if (byte) > >>>> + { > >>>> + /* We are about to emit new bits, stop accumulating a > >>>> + shift amount, and left-shift only if we have already > >>>> + emitted some upper bits. */ > >>>> + if (mov_done_p) > >>>> + { > >>>> + dst.ashift (shift); > >>>> + dst.add (byte); > >>>> + } > >>>> + else > >>>> + dst.mov (byte); > >>>> + > >>>> + /* Stop accumulating shift amount since we've just > >>>> + emitted some bits. */ > >>>> + shift = 0; > >>>> + > >>>> + mov_done_p = true; > >>>> + } > >>>> + > >>>> + if (mov_done_p) > >>>> + shift += 8; > >>>> + } > >>>> + > >>>> + /* Emit lower byte. */ > >>>> + if (!mov_done_p) > >>>> + dst.mov (val & 0xff); > >>>> + else > >>>> + { > >>>> + dst.ashift (shift); > >>>> + if (val & 0xff) > >>>> + dst.add (val & 0xff); > >>>> + } > >>>> + > >>>> + if (final_shift > 0) > >>>> + dst.ashift (final_shift); > >>>> + } > >>>> +} > >>>> + > >>>> > >>> > > > --0000000000000b740505b31d29e2 Content-Type: text/x-patch; charset="US-ASCII"; name="0001-arm-Improve-thumb1_gen_const_int.patch" Content-Disposition: attachment; filename="0001-arm-Improve-thumb1_gen_const_int.patch" Content-Transfer-Encoding: base64 Content-ID: X-Attachment-Id: f_kh0ecrzw0 RnJvbSA4ZTQyOThiNGQ0NmI2ZDI1NTVjNzBhYTZjZTk1ZDlhZmRhNGRmYTY5IE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBDaHJpc3RvcGhlIEx5b24gPGNocmlzdG9waGUubHlvbkBsaW5h cm8ub3JnPgpEYXRlOiBGcmksIDkgT2N0IDIwMjAgMTI6NDI6MzkgKzAwMDAKU3ViamVjdDogW1BB VENIIDEvM10gYXJtOiBJbXByb3ZlIHRodW1iMV9nZW5fY29uc3RfaW50CgpFbmFibGUgdGh1bWIx X2dlbl9jb25zdF9pbnQgdG8gZ2VuZXJhdGUgUlRMIG9yIGFzbSBkZXBlbmRpbmcgb24gdGhlCmNv bnRleHQsIHNvIHRoYXQgd2UgYXZvaWQgZHVwbGljYXRpbmcgY29kZSB0byBoYW5kbGUgY29uc3Rh bnRzIGluClRodW1iLTEgd2l0aCAtbXB1cmUtY29kZS4KClVzZSBhIHRlbXBsYXRlIHNvIHRoYXQg dGhlIGFsZ29yaXRobSBpcyBlZmZlY3RpdmVseSBzaGFyZWQsIGFuZApyZWx5IG9uIHR3byBjbGFz c2VzIHRvIGhhbmRsZSB0aGUgYWN0dWFsIGVtaXNzaW9uIGFzIFJUTCBvciBhc20uCgpUaGUgZ2Vu ZXJhdGVkIHNlcXVlbmNlIGlzIGltcHJvdmVkIHRvIGhhbmRsZSByaWdodC1zaGlmdGFibGUgYW5k IHNtYWxsCnZhbHVlcyB3aXRoIGxlc3MgaW5zdHJ1Y3Rpb25zLiBXZSBub3cgZ2VuZXJhdGU6Cgox Mjg6CiAgICAgICAgbW92cyAgICByMCwgcjAsICMxMjgKMjY0OgogICAgICAgIG1vdnMgICAgcjMs ICMzMwogICAgICAgIGxzbHMgICAgcjMsICMzCjUxMDoKICAgICAgICBtb3ZzICAgIHIzLCAjMjU1 CiAgICAgICAgbHNscyAgICByMywgIzEKNTEyOgogICAgICAgIG1vdnMgICAgcjMsICMxCiAgICAg ICAgbHNscyAgICByMywgIzkKNzY0OgogICAgICAgIG1vdnMgICAgcjMsICMxOTEKICAgICAgICBs c2xzICAgIHIzLCAjMgo2NTUzNjoKICAgICAgICBtb3ZzICAgIHIzLCAjMQogICAgICAgIGxzbHMg ICAgcjMsICMxNgoweDEyMzQ1NjoKICAgICAgICBtb3ZzICAgIHIzLCAjMTggOzB4MTIKICAgICAg ICBsc2xzICAgIHIzLCAjOAogICAgICAgIGFkZHMgICAgcjMsICM1MiA7MHgzNAogICAgICAgIGxz bHMgICAgcjMsICM4CiAgICAgICAgYWRkcyAgICByMywgIzg2IDsweDU2CjB4MTEyMzQ1NjoKICAg ICAgICBtb3ZzICAgIHIzLCAjMTM3IDsweDg5CiAgICAgICAgbHNscyAgICByMywgIzgKICAgICAg ICBhZGRzICAgIHIzLCAjMjYgOzB4MWEKICAgICAgICBsc2xzICAgIHIzLCAjOAogICAgICAgIGFk ZHMgICAgcjMsICM0MyA7MHgyYgogICAgICAgIGxzbHMgICAgcjMsICMxCjB4MTAwMDAxMDoKICAg ICAgICBtb3ZzICAgIHIzLCAjMTYKICAgICAgICBsc2xzICAgIHIzLCAjMTYKICAgICAgICBhZGRz ICAgIHIzLCAjMQogICAgICAgIGxzbHMgICAgcjMsICM0CjB4MTAwMDAxMToKICAgICAgICBtb3Zz ICAgIHIzLCAjMQogICAgICAgIGxzbHMgICAgcjMsICMyNAogICAgICAgIGFkZHMgICAgcjMsICMx NwotODE5MjoKCW1vdnMJcjMsICMxCglsc2xzCXIzLCAjMTMKCXJzYnMJcjMsICMwCgpUaGUgcGF0 Y2ggYWRkcyBhIHRlc3RjYXNlIHdoaWNoIGRvZXMgbm90IGZ1bGx5IGV4ZXJjaXNlCnRodW1iMV9n ZW5fY29uc3RfaW50LCBhcyBvdGhlciBleGlzdGluZyBwYXR0ZXJucyBhbHJlYWR5IGNhdGNoIHNt YWxsCmNvbnN0YW50cy4gIFRoZXNlIHBhcnRzIG9mIHRodW1iMV9nZW5fY29uc3RfaW50IGFyZSB1 c2VkIGJ5CmFybV90aHVtYjFfbWlfdGh1bmsuCgoyMDIwLTExLTAyICBDaHJpc3RvcGhlIEx5b24g IDxjaHJpc3RvcGhlLmx5b25AbGluYXJvLm9yZz4KCglnY2MvCgkqIGNvbmZpZy9hcm0vYXJtLmMg KHRodW1iMV9jb25zdF9ydGwsIHRodW1iMV9jb25zdF9wcmludCk6IE5ldwoJY2xhc3Nlcy4KCSh0 aHVtYjFfZ2VuX2NvbnN0X2ludCk6IFJlbmFtZSB0byAuLi4KCSh0aHVtYjFfZ2VuX2NvbnN0X2lu dF8xKTogLi4uIE5ldyBoZWxwZXIgZnVuY3Rpb24uIEFkZCBjYXBhYmlsaXR5Cgl0byBlbWl0IGVp dGhlciBSVEwgb3IgYXNtLCBpbXByb3ZlIGdlbmVyYXRlZCBjb2RlLgoJKHRodW1iMV9nZW5fY29u c3RfaW50X3J0bCk6IE5ldyBmdW5jdGlvbi4KCSogZ2NjL2NvbmZpZy9hcm0vYXJtLXByb3Rvcy5o ICh0aHVtYjFfZ2VuX2NvbnN0X2ludCk6IFJlbmFtZSB0bwoJdGh1bWIxX2dlbl9jb25zdF9pbnRf cnRsLgoJKiBnY2MvY29uZmlnL2FybS90aHVtYjEubWQ6IENhbGwgdGh1bWIxX2dlbl9jb25zdF9p bnRfcnRsIGluc3RlYWQKCW9mIHRodW1iMV9nZW5fY29uc3RfaW50LgoKCWdjYy90ZXN0c3VpdGUv CgkqIGdjYy50YXJnZXQvYXJtL3B1cmUtY29kZS9uby1saXRlcmFsLXBvb2wtbTAuYzogTmV3Lgot LS0KIGdjYy9jb25maWcvYXJtL2FybS1wcm90b3MuaCAgICAgICAgICAgICAgICAgICAgICAgIHwg ICAyICstCiBnY2MvY29uZmlnL2FybS9hcm0uYyAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICB8IDIyNCArKysrKysrKysrKysrKysrKystLS0KIGdjYy9jb25maWcvYXJtL3RodW1iMS5tZCAg ICAgICAgICAgICAgICAgICAgICAgICAgIHwgICAyICstCiAuLi4vZ2NjLnRhcmdldC9hcm0vcHVy ZS1jb2RlL25vLWxpdGVyYWwtcG9vbC1tMC5jICB8IDE3NSArKysrKysrKysrKysrKysrCiA0IGZp bGVzIGNoYW5nZWQsIDM2OSBpbnNlcnRpb25zKCspLCAzNCBkZWxldGlvbnMoLSkKIGNyZWF0ZSBt b2RlIDEwMDY0NCBnY2MvdGVzdHN1aXRlL2djYy50YXJnZXQvYXJtL3B1cmUtY29kZS9uby1saXRl cmFsLXBvb2wtbTAuYwoKZGlmZiAtLWdpdCBhL2djYy9jb25maWcvYXJtL2FybS1wcm90b3MuaCBi L2djYy9jb25maWcvYXJtL2FybS1wcm90b3MuaAppbmRleCAwY2MwYWU3Li4yM2IzMjlkIDEwMDY0 NAotLS0gYS9nY2MvY29uZmlnL2FybS9hcm0tcHJvdG9zLmgKKysrIGIvZ2NjL2NvbmZpZy9hcm0v YXJtLXByb3Rvcy5oCkBAIC03NCw3ICs3NCw3IEBAIGV4dGVybiBib29sIGFybV9zbWFsbF9yZWdp c3Rlcl9jbGFzc2VzX2Zvcl9tb2RlX3AgKG1hY2hpbmVfbW9kZSk7CiBleHRlcm4gaW50IGNvbnN0 X29rX2Zvcl9hcm0gKEhPU1RfV0lERV9JTlQpOwogZXh0ZXJuIGludCBjb25zdF9va19mb3Jfb3Ag KEhPU1RfV0lERV9JTlQsIGVudW0gcnR4X2NvZGUpOwogZXh0ZXJuIGludCBjb25zdF9va19mb3Jf ZGltb2RlX29wIChIT1NUX1dJREVfSU5ULCBlbnVtIHJ0eF9jb2RlKTsKLWV4dGVybiB2b2lkIHRo dW1iMV9nZW5fY29uc3RfaW50IChydHgsIEhPU1RfV0lERV9JTlQpOworZXh0ZXJuIHZvaWQgdGh1 bWIxX2dlbl9jb25zdF9pbnRfcnRsIChydHgsIEhPU1RfV0lERV9JTlQpOwogZXh0ZXJuIGludCBh cm1fc3BsaXRfY29uc3RhbnQgKFJUWF9DT0RFLCBtYWNoaW5lX21vZGUsIHJ0eCwKIAkJCSAgICAg ICBIT1NUX1dJREVfSU5ULCBydHgsIHJ0eCwgaW50KTsKIGV4dGVybiBpbnQgbGVnaXRpbWF0ZV9w aWNfb3BlcmFuZF9wIChydHgpOwpkaWZmIC0tZ2l0IGEvZ2NjL2NvbmZpZy9hcm0vYXJtLmMgYi9n Y2MvY29uZmlnL2FybS9hcm0uYwppbmRleCBjZWViOTFmLi4yOWZhNTM2IDEwMDY0NAotLS0gYS9n Y2MvY29uZmlnL2FybS9hcm0uYworKysgYi9nY2MvY29uZmlnL2FybS9hcm0uYwpAQCAtNDUxMywz OCArNDUxMyw2IEBAIGNvbnN0X29rX2Zvcl9kaW1vZGVfb3AgKEhPU1RfV0lERV9JTlQgaSwgZW51 bSBydHhfY29kZSBjb2RlKQogICAgIH0KIH0KIAotLyogRW1pdCBhIHNlcXVlbmNlIG9mIG1vdnMv YWRkcy9zaGlmdCB0byBwcm9kdWNlIGEgMzItYml0IGNvbnN0YW50LgotICAgQXZvaWQgZ2VuZXJh dGluZyB1c2VsZXNzIGNvZGUgd2hlbiBvbmUgb2YgdGhlIGJ5dGVzIGlzIHplcm8uICAqLwotdm9p ZAotdGh1bWIxX2dlbl9jb25zdF9pbnQgKHJ0eCBvcDAsIEhPU1RfV0lERV9JTlQgb3AxKQotewot ICBib29sIG1vdl9kb25lX3AgPSBmYWxzZTsKLSAgaW50IGk7Ci0KLSAgLyogRW1pdCB1cHBlciAz IGJ5dGVzIGlmIG5lZWRlZC4gICovCi0gIGZvciAoaSA9IDA7IGkgPCAzOyBpKyspCi0gICAgewot ICAgICAgaW50IGJ5dGUgPSAob3AxID4+ICg4ICogKDMgLSBpKSkpICYgMHhmZjsKLQotICAgICAg aWYgKGJ5dGUpCi0JewotCSAgZW1pdF9zZXRfaW5zbiAob3AwLCBtb3ZfZG9uZV9wCi0JCQkgPyBn ZW5fcnR4X1BMVVMgKFNJbW9kZSxvcDAsIEdFTl9JTlQgKGJ5dGUpKQotCQkJIDogR0VOX0lOVCAo Ynl0ZSkpOwotCSAgbW92X2RvbmVfcCA9IHRydWU7Ci0JfQotCi0gICAgICBpZiAobW92X2RvbmVf cCkKLQllbWl0X3NldF9pbnNuIChvcDAsIGdlbl9ydHhfQVNISUZUIChTSW1vZGUsIG9wMCwgR0VO X0lOVCAoOCkpKTsKLSAgICB9Ci0KLSAgLyogRW1pdCBsb3dlciBieXRlIGlmIG5lZWRlZC4gICov Ci0gIGlmICghbW92X2RvbmVfcCkKLSAgICBlbWl0X3NldF9pbnNuIChvcDAsIEdFTl9JTlQgKG9w MSAmIDB4ZmYpKTsKLSAgZWxzZSBpZiAob3AxICYgMHhmZikKLSAgICBlbWl0X3NldF9pbnNuIChv cDAsIGdlbl9ydHhfUExVUyAoU0ltb2RlLCBvcDAsIEdFTl9JTlQgKG9wMSAmIDB4ZmYpKSk7Ci19 Ci0KIC8qIEVtaXQgYSBzZXF1ZW5jZSBvZiBpbnNucyB0byBoYW5kbGUgYSBsYXJnZSBjb25zdGFu dC4KICAgIENPREUgaXMgdGhlIGNvZGUgb2YgdGhlIG9wZXJhdGlvbiByZXF1aXJlZCwgaXQgY2Fu IGJlIGFueSBvZiBTRVQsIFBMVVMsCiAgICBJT1IsIEFORCwgWE9SLCBNSU5VUzsKQEAgLTI4MjQ0 LDYgKzI4MjEyLDE5OCBAQCBhcm1faW50ZXJuYWxfbGFiZWwgKEZJTEUgKnN0cmVhbSwgY29uc3Qg Y2hhciAqcHJlZml4LCB1bnNpZ25lZCBsb25nIGxhYmVsbm8pCiAgIGRlZmF1bHRfaW50ZXJuYWxf bGFiZWwgKHN0cmVhbSwgcHJlZml4LCBsYWJlbG5vKTsKIH0KIAorLyogRGVmaW5lIGNsYXNzZXMg dG8gZ2VuZXJhdGUgY29kZSBhcyBSVEwgb3Igb3V0cHV0IGFzbSB0byBhIGZpbGUuCisgICBVc2lu ZyB0ZW1wbGF0ZXMgdGhlbiBhbGxvd3MgdG8gdXNlIHRoZSBzYW1lIGNvZGUgdG8gb3V0cHV0IGNv ZGUKKyAgIHNlcXVlbmNlcyBpbiB0aGUgdHdvIGZvcm1hdHMuICAqLworY2xhc3MgdGh1bWIxX2Nv bnN0X3J0bAoreworIHB1YmxpYzoKKyAgdGh1bWIxX2NvbnN0X3J0bCAocnR4IGRzdCkgOiBkc3Qg KGRzdCkge30KKworICB2b2lkIG1vdiAoSE9TVF9XSURFX0lOVCB2YWwpCisgIHsKKyAgICBlbWl0 X3NldF9pbnNuIChkc3QsIEdFTl9JTlQgKHZhbCkpOworICB9CisKKyAgdm9pZCBhZGQgKEhPU1Rf V0lERV9JTlQgdmFsKQorICB7CisgICAgZW1pdF9zZXRfaW5zbiAoZHN0LCBnZW5fcnR4X1BMVVMg KFNJbW9kZSwgZHN0LCBHRU5fSU5UICh2YWwpKSk7CisgIH0KKworICB2b2lkIGFzaGlmdCAoSE9T VF9XSURFX0lOVCBzaGlmdCkKKyAgeworICAgIGVtaXRfc2V0X2luc24gKGRzdCwgZ2VuX3J0eF9B U0hJRlQgKFNJbW9kZSwgZHN0LCBHRU5fSU5UIChzaGlmdCkpKTsKKyAgfQorCisgIHZvaWQgbmVn ICgpCisgIHsKKyAgICBlbWl0X3NldF9pbnNuIChkc3QsIGdlbl9ydHhfTkVHIChTSW1vZGUsIGRz dCkpOworICB9CisKKyBwcml2YXRlOgorICBydHggZHN0OworfTsKKworY2xhc3MgdGh1bWIxX2Nv bnN0X3ByaW50Cit7CisgcHVibGljOgorICB0aHVtYjFfY29uc3RfcHJpbnQgKEZJTEUgKmYsIGlu dCByZWdubykKKyAgeworICAgIHRfZmlsZSA9IGY7CisgICAgZHN0X3JlZ25hbWUgPSByZWdfbmFt ZXNbcmVnbm9dOworICB9CisKKyAgdm9pZCBtb3YgKEhPU1RfV0lERV9JTlQgdmFsKQorICB7Cisg ICAgYXNtX2ZwcmludGYgKHRfZmlsZSwgIlx0bW92c1x0JXMsICMiIEhPU1RfV0lERV9JTlRfUFJJ TlRfREVDICJcbiIsCisJCSBkc3RfcmVnbmFtZSwgdmFsKTsKKyAgfQorCisgIHZvaWQgYWRkIChI T1NUX1dJREVfSU5UIHZhbCkKKyAgeworICAgIGFzbV9mcHJpbnRmICh0X2ZpbGUsICJcdGFkZHNc dCVzLCAjIiBIT1NUX1dJREVfSU5UX1BSSU5UX0RFQyAiXG4iLAorCQkgZHN0X3JlZ25hbWUsIHZh bCk7CisgIH0KKworICB2b2lkIGFzaGlmdCAoSE9TVF9XSURFX0lOVCBzaGlmdCkKKyAgeworICAg IGFzbV9mcHJpbnRmICh0X2ZpbGUsICJcdGxzbHNcdCVzLCAjIiBIT1NUX1dJREVfSU5UX1BSSU5U X0RFQyAiXG4iLAorCQkgZHN0X3JlZ25hbWUsIHNoaWZ0KTsKKyAgfQorCisgIHZvaWQgbmVnICgp CisgIHsKKyAgICBhc21fZnByaW50ZiAodF9maWxlLCAiXHRyc2JzXHQlcywgIzBcbiIsIGRzdF9y ZWduYW1lKTsKKyAgfQorCisgcHJpdmF0ZToKKyAgRklMRSAqdF9maWxlOworICBjb25zdCBjaGFy ICpkc3RfcmVnbmFtZTsKK307CisKKy8qIEVtaXQgYSBzZXF1ZW5jZSBvZiBtb3ZzL2FkZHMvc2hp ZnQgdG8gcHJvZHVjZSBhIDMyLWJpdCBjb25zdGFudC4KKyAgIEF2b2lkIGdlbmVyYXRpbmcgdXNl bGVzcyBjb2RlIHdoZW4gb25lIG9mIHRoZSBieXRlcyBpcyB6ZXJvLiAgKi8KK3RlbXBsYXRlIDxj bGFzcyBUPgordm9pZAordGh1bWIxX2dlbl9jb25zdF9pbnRfMSAoVCBkc3QsIEhPU1RfV0lERV9J TlQgb3AxKQoreworICBib29sIG1vdl9kb25lX3AgPSBmYWxzZTsKKyAgdW5zaWduZWQgSE9TVF9X SURFX0lOVCB2YWwgPSBvcDE7CisgIGludCBzaGlmdCA9IDA7CisgIGludCBpOworCisgIGdjY19h c3NlcnQgKG9wMSA9PSB0cnVuY19pbnRfZm9yX21vZGUgKG9wMSwgU0ltb2RlKSk7CisKKyAgaWYg KHZhbCA8PSAyNTUpCisgICAgeworICAgICAgZHN0Lm1vdiAodmFsKTsKKyAgICAgIHJldHVybjsK KyAgICB9CisKKyAgLyogRm9yIG5lZ2F0aXZlIG51bWJlcnMgd2l0aCB0aGUgZmlyc3QgbmluZSBi aXRzIHNldCwgYnVpbGQgdGhlCisgICAgIG9wcG9zaXRlIG9mIE9QMSwgdGhlbiBuZWdhdGUgaXQs IGl0J3MgZ2VuZXJhbGx5IHNob3J0ZXIgYW5kIG5vdAorICAgICBsb25nZXIuICAqLworICBpZiAo KHZhbCAmIDB4RkY4MDAwMDApID09IDB4RkY4MDAwMDApCisgICAgeworICAgICAgdGh1bWIxX2dl bl9jb25zdF9pbnRfMSAoZHN0LCAtb3AxKTsKKyAgICAgIGRzdC5uZWcgKCk7CisgICAgICByZXR1 cm47CisgICAgfQorCisgIC8qIEluIHRoZSBnZW5lcmFsIGNhc2UsIHdlIG5lZWQgNyBpbnN0cnVj dGlvbnMgdG8gYnVpbGQKKyAgICAgYSAzMiBiaXRzIGNvbnN0YW50ICgxIG1vdnMsIDMgbHNscywg MyBhZGRzKS4gV2UgY2FuCisgICAgIGRvIGJldHRlciBpZiBWQUwgaXMgc21hbGwgZW5vdWdoLCBv cgorICAgICByaWdodC1zaGlmdGFibGUgYnkgYSBzdWl0YWJsZSBhbW91bnQuICBJZiB0aGUKKyAg ICAgcmlnaHQtc2hpZnQgZW5hYmxlcyB0byBlbmNvZGUgYXQgbGVhc3Qgb25lIGxlc3MgYnl0ZSwK KyAgICAgaXQncyB3b3J0aCBpdDogd2Ugc2F2ZSBhIGFkZHMgYW5kIGEgbHNscyBhdCB0aGUKKyAg ICAgZXhwZW5zZSBvZiBhIGZpbmFsIGxzbHMuICAqLworICBpbnQgZmluYWxfc2hpZnQgPSBudW1i ZXJfb2ZfZmlyc3RfYml0X3NldCAodmFsKTsKKworICBpbnQgbGVhZGluZ196ZXJvZXMgPSBjbHpf aHdpICh2YWwpOworICBpbnQgbnVtYmVyX29mX2J5dGVzX25lZWRlZAorICAgID0gKChIT1NUX0JJ VFNfUEVSX1dJREVfSU5UIC0gMSAtIGxlYWRpbmdfemVyb2VzKQorICAgICAgIC8gQklUU19QRVJf VU5JVCkgKyAxOworICBpbnQgbnVtYmVyX29mX2J5dGVzX25lZWRlZDIKKyAgICA9ICgoSE9TVF9C SVRTX1BFUl9XSURFX0lOVCAtIDEgLSBsZWFkaW5nX3plcm9lcyAtIGZpbmFsX3NoaWZ0KQorICAg ICAgIC8gQklUU19QRVJfVU5JVCkgKyAxOworCisgIGlmIChudW1iZXJfb2ZfYnl0ZXNfbmVlZGVk MiA8IG51bWJlcl9vZl9ieXRlc19uZWVkZWQpCisgICAgdmFsID4+PSBmaW5hbF9zaGlmdDsKKyAg ZWxzZQorICAgIGZpbmFsX3NoaWZ0ID0gMDsKKworICAvKiBJZiB3ZSBhcmUgaW4gYSB2ZXJ5IHNt YWxsIHJhbmdlLCB3ZSBjYW4gdXNlIGVpdGhlciBhIHNpbmdsZSBtb3ZzCisgICAgIG9yIG1vdnMr YWRkcy4gICovCisgIGlmICh2YWwgPD0gNTEwKQorICAgIHsKKyAgICAgIGlmICh2YWwgPiAyNTUp CisJeworCSAgdW5zaWduZWQgSE9TVF9XSURFX0lOVCBoaWdoID0gdmFsIC0gMjU1OworCisJICBk c3QubW92IChoaWdoKTsKKwkgIGRzdC5hZGQgKDI1NSk7CisJfQorICAgICAgZWxzZQorCWRzdC5t b3YgKHZhbCk7CisKKyAgICAgIGlmIChmaW5hbF9zaGlmdCA+IDApCisJZHN0LmFzaGlmdCAoZmlu YWxfc2hpZnQpOworICAgIH0KKyAgZWxzZQorICAgIHsKKyAgICAgIC8qIEdlbmVyYWwgY2FzZSwg ZW1pdCB1cHBlciAzIGJ5dGVzIGFzIG5lZWRlZC4gICovCisgICAgICBmb3IgKGkgPSAwOyBpIDwg MzsgaSsrKQorCXsKKwkgIHVuc2lnbmVkIEhPU1RfV0lERV9JTlQgYnl0ZSA9ICh2YWwgPj4gKDgg KiAoMyAtIGkpKSkgJiAweGZmOworCisJICBpZiAoYnl0ZSkKKwkgICAgeworCSAgICAgIC8qIFdl IGFyZSBhYm91dCB0byBlbWl0IG5ldyBiaXRzLCBzdG9wIGFjY3VtdWxhdGluZyBhCisJCSBzaGlm dCBhbW91bnQsIGFuZCBsZWZ0LXNoaWZ0IG9ubHkgaWYgd2UgaGF2ZSBhbHJlYWR5CisJCSBlbWl0 dGVkIHNvbWUgdXBwZXIgYml0cy4gICovCisJICAgICAgaWYgKG1vdl9kb25lX3ApCisJCXsKKwkJ ICBkc3QuYXNoaWZ0IChzaGlmdCk7CisJCSAgZHN0LmFkZCAoYnl0ZSk7CisJCX0KKwkgICAgICBl bHNlCisJCWRzdC5tb3YgKGJ5dGUpOworCisJICAgICAgLyogU3RvcCBhY2N1bXVsYXRpbmcgc2hp ZnQgYW1vdW50IHNpbmNlIHdlJ3ZlIGp1c3QKKwkJIGVtaXR0ZWQgc29tZSBiaXRzLiAgKi8KKwkg ICAgICBzaGlmdCA9IDA7CisKKwkgICAgICBtb3ZfZG9uZV9wID0gdHJ1ZTsKKwkgICAgfQorCisJ ICBpZiAobW92X2RvbmVfcCkKKwkgICAgc2hpZnQgKz0gODsKKwl9CisKKyAgICAgIC8qIEVtaXQg bG93ZXIgYnl0ZS4gICovCisgICAgICBpZiAoIW1vdl9kb25lX3ApCisJZHN0Lm1vdiAodmFsICYg MHhmZik7CisgICAgICBlbHNlCisJeworCSAgZHN0LmFzaGlmdCAoc2hpZnQpOworCSAgaWYgKHZh bCAmIDB4ZmYpCisJICAgIGRzdC5hZGQgKHZhbCAmIDB4ZmYpOworCX0KKworICAgICAgaWYgKGZp bmFsX3NoaWZ0ID4gMCkKKwlkc3QuYXNoaWZ0IChmaW5hbF9zaGlmdCk7CisgICAgfQorfQorCisv KiBQcm94eSBmb3IgdGh1bWIxLm1kLCBzaW5jZSB0aGUgdGh1bWIxX2NvbnN0X3ByaW50IGFuZAor ICAgdGh1bWIxX2NvbnN0X3J0bCBjbGFzc2VzIGFyZSBub3QgZXhwb3J0ZWQuICAqLwordm9pZAor dGh1bWIxX2dlbl9jb25zdF9pbnRfcnRsIChydHggZHN0LCBIT1NUX1dJREVfSU5UIG9wMSkKK3sK KyAgdGh1bWIxX2NvbnN0X3J0bCB0IChkc3QpOworICB0aHVtYjFfZ2VuX2NvbnN0X2ludF8xICh0 LCBvcDEpOworfQorCiAvKiBPdXRwdXQgY29kZSB0byBhZGQgREVMVEEgdG8gdGhlIGZpcnN0IGFy Z3VtZW50LCBhbmQgdGhlbiBqdW1wCiAgICB0byBGVU5DVElPTi4gIFVzZWQgZm9yIEMrKyBtdWx0 aXBsZSBpbmhlcml0YW5jZS4gICovCiAKZGlmZiAtLWdpdCBhL2djYy9jb25maWcvYXJtL3RodW1i MS5tZCBiL2djYy9jb25maWcvYXJtL3RodW1iMS5tZAppbmRleCAyMjU4YTUyLi5iMzJkZDRmIDEw MDY0NAotLS0gYS9nY2MvY29uZmlnL2FybS90aHVtYjEubWQKKysrIGIvZ2NjL2NvbmZpZy9hcm0v dGh1bWIxLm1kCkBAIC04MjAsNyArODIwLDcgQEAgKGRlZmluZV9zcGxpdAogICAgJiYgIXNhdGlz Zmllc19jb25zdHJhaW50X0sgKG9wZXJhbmRzWzFdKSIKICAgWyhjbG9iYmVyIChjb25zdF9pbnQg MCkpXQogICAiCi0gICAgdGh1bWIxX2dlbl9jb25zdF9pbnQgKG9wZXJhbmRzWzBdLCBJTlRWQUwg KG9wZXJhbmRzWzFdKSk7CisgICAgdGh1bWIxX2dlbl9jb25zdF9pbnRfcnRsIChvcGVyYW5kc1sw XSwgSU5UVkFMIChvcGVyYW5kc1sxXSkpOwogICAgIERPTkU7CiAgICIKICkKZGlmZiAtLWdpdCBh L2djYy90ZXN0c3VpdGUvZ2NjLnRhcmdldC9hcm0vcHVyZS1jb2RlL25vLWxpdGVyYWwtcG9vbC1t MC5jIGIvZ2NjL3Rlc3RzdWl0ZS9nY2MudGFyZ2V0L2FybS9wdXJlLWNvZGUvbm8tbGl0ZXJhbC1w b29sLW0wLmMKbmV3IGZpbGUgbW9kZSAxMDA2NDQKaW5kZXggMDAwMDAwMC4uNzg3YTYxYQotLS0g L2Rldi9udWxsCisrKyBiL2djYy90ZXN0c3VpdGUvZ2NjLnRhcmdldC9hcm0vcHVyZS1jb2RlL25v LWxpdGVyYWwtcG9vbC1tMC5jCkBAIC0wLDAgKzEsMTc1IEBACisvKiB7IGRnLWRvIGNvbXBpbGUg fSAqLworLyogeyBkZy1vcHRpb25zICItbXB1cmUtY29kZSAtbWNwdT1jb3J0ZXgtbTAgLW1hcmNo PWFybXY2cy1tIC1tdGh1bWIiIH0gKi8KKy8qIHsgZGctZmluYWwgeyBjaGVjay1mdW5jdGlvbi1i b2RpZXMgIioqIiAiIiB9IH0gKi8KKworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3Rf aW50LgorKiogdGVzdF8wOgorKioJLi4uCisqKgltb3ZzCXJbMC0zXSwgIzAKKyoqCS4uLgorKi8K K2ludAordGVzdF8wICgpCit7CisgIHJldHVybiAwOworfQorCisvKiBEb2VzIG5vdCB1c2UgdGh1 bWIxX2dlbl9jb25zdF9pbnQuCisqKiB0ZXN0XzEyODoKKyoqCS4uLgorKioJbW92cwlyWzAtM10s ICMxMjgKKyoqCS4uLgorKi8KK2ludAordGVzdF8xMjggKCkKK3sKKyAgcmV0dXJuIDEyODsKK30K KworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3RfaW50LgorKiogdGVzdF8yNjQ6Cisq KgkuLi4KKyoqCW1vdnMJclswLTNdLCAjMTMyCisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjMQor KioJLi4uCisqLworaW50Cit0ZXN0XzI2NCAoKQoreworICByZXR1cm4gMjY0OworfQorCisvKiBE b2VzIG5vdCB1c2UgdGh1bWIxX2dlbl9jb25zdF9pbnQuCisqKiB0ZXN0XzUxMDoKKyoqCS4uLgor KioJbW92cwlyWzAtM10sICMyNTUKKyoqCWxzbHMJclswLTNdLCByWzAtM10sICMxCisqKgkuLi4K KyovCitpbnQKK3Rlc3RfNTEwICgpCit7CisgIHJldHVybiA1MTA7Cit9CisKKy8qIERvZXMgbm90 IHVzZSB0aHVtYjFfZ2VuX2NvbnN0X2ludC4KKyoqIHRlc3RfNTEyOgorKioJLi4uCisqKgltb3Zz CXJbMC0zXSwgIzEyOAorKioJbHNscwlyWzAtM10sIHJbMC0zXSwgIzIKKyoqCS4uLgorKi8KK2lu dAordGVzdF81MTIgKCkKK3sKKyAgcmV0dXJuIDUxMjsKK30KKworLyogRG9lcyBub3QgdXNlIHRo dW1iMV9nZW5fY29uc3RfaW50LgorKiogdGVzdF83NjQ6CisqKgkuLi4KKyoqCW1vdnMJclswLTNd LCAjMTkxCisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjMgorKioJLi4uCisqLworaW50Cit0ZXN0 Xzc2NCAoKQoreworICByZXR1cm4gNzY0OworfQorCisvKiBEb2VzIG5vdCB1c2UgdGh1bWIxX2dl bl9jb25zdF9pbnQuCisqKiB0ZXN0XzY1NTM2OgorKioJLi4uCisqKgltb3ZzCXJbMC0zXSwgIzEy OAorKioJbHNscwlyWzAtM10sIHJbMC0zXSwgIzkKKyoqCS4uLgorKi8KK2ludAordGVzdF82NTUz NiAoKQoreworICByZXR1cm4gNjU1MzY7Cit9CisKKy8qCisqKiB0ZXN0XzB4MTIzNDU2OgorKioJ Li4uCisqKgltb3ZzCXJbMC0zXSwgIzE4CisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjOAorKioJ YWRkcwlyWzAtM10sIHJbMC0zXSwgIzUyCisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjOAorKioJ YWRkcwlyWzAtM10sIHJbMC0zXSwgIzg2CisqKgkuLi4KKyovCitpbnQKK3Rlc3RfMHgxMjM0NTYg KCkKK3sKKyAgcmV0dXJuIDB4MTIzNDU2OworfQorCisvKgorKiogdGVzdF8weDExMjM0NTY6Cisq KgkuLi4KKyoqCW1vdnMJclswLTNdLCAjMTM3CisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjOAor KioJYWRkcwlyWzAtM10sIHJbMC0zXSwgIzI2CisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjOAor KioJYWRkcwlyWzAtM10sIHJbMC0zXSwgIzQzCisqKglsc2xzCXJbMC0zXSwgclswLTNdLCAjMQor KioJLi4uCisqLworaW50Cit0ZXN0XzB4MTEyMzQ1NiAoKQoreworICByZXR1cm4gMHgxMTIzNDU2 OworfQorCisvKiBXaXRoIC1Pcywgd2UgZ2VuZXJhdGU6CisgICBtb3ZzIHIwLCAjMTYKKyAgIGxz bHMgcjAsIHIwLCByMAorICAgV2l0aCB0aGUgb3RoZXIgb3B0aW1pemF0aW9uIGxldmVscywgd2Ug Z2VuZXJhdGU6CisgICBtb3ZzIHIwLCAjMTYKKyAgIGxzbHMgcjAsIHIwLCAjMTYKKyAgIGhlbmNl IHRoZSB0d28gYWx0ZXJuYXRpdmVzLiAgKi8KKy8qCisqKiB0ZXN0XzB4MTAwMDAxMDoKKyoqCS4u LgorKioJbW92cwlyWzAtM10sICMxNgorKioJbHNscwlyWzAtM10sIHJbMC0zXSwgKCMxNnxyWzAt M10pCisqKglhZGRzCXJbMC0zXSwgclswLTNdLCAjMQorKioJbHNscwlyWzAtM10sIHJbMC0zXSwg IzQKKyoqCS4uLgorKi8KK2ludAordGVzdF8weDEwMDAwMTAgKCkKK3sKKyAgcmV0dXJuIDB4MTAw MDAxMDsKK30KKworLyoKKyoqIHRlc3RfMHgxMDAwMDExOgorKioJLi4uCisqKgltb3ZzCXJbMC0z XSwgIzEKKyoqCWxzbHMJclswLTNdLCByWzAtM10sICMyNAorKioJYWRkcwlyWzAtM10sIHJbMC0z XSwgIzE3CisqKgkuLi4KKyovCitpbnQKK3Rlc3RfMHgxMDAwMDExICgpCit7CisgIHJldHVybiAw eDEwMDAwMTE7Cit9CisKKy8qCisqKiB0ZXN0X204MTkyOgorKioJLi4uCisqKgltb3ZzCXJbMC0z XSwgIzEKKyoqCWxzbHMJclswLTNdLCByWzAtM10sICMxMworKioJcnNicwlyWzAtM10sIHJbMC0z XSwgIzAKKyoqCS4uLgorKi8KK2ludAordGVzdF9tODE5MiAoKQoreworICByZXR1cm4gLTgxOTI7 Cit9Ci0tIAoyLjcuNAoK --0000000000000b740505b31d29e2 Content-Type: text/x-patch; charset="US-ASCII"; name="0002-arm-Call-thumb1_gen_const_int-from-thumb1_movsi_insn.patch" Content-Disposition: attachment; filename="0002-arm-Call-thumb1_gen_const_int-from-thumb1_movsi_insn.patch" Content-Transfer-Encoding: base64 Content-ID: X-Attachment-Id: f_kh0ecs0c1 RnJvbSA0ZTkxYTA5ODYwMTQ0NDYwNzFhMDMxZTI5ZWEwZWZiYzkwZGRhNDA3IE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBDaHJpc3RvcGhlIEx5b24gPGNocmlzdG9waGUubHlvbkBsaW5h cm8ub3JnPgpEYXRlOiBUdWUsIDI3IE9jdCAyMDIwIDE2OjE2OjA4ICswMDAwClN1YmplY3Q6IFtQ QVRDSCAyLzNdIGFybTogQ2FsbCB0aHVtYjFfZ2VuX2NvbnN0X2ludCBmcm9tIHRodW1iMV9tb3Zz aV9pbnNuCgp0aHVtYjFfbW92c2lfaW5zbiB1c2VkIHRoZSBzYW1lIGFsZ29yaXRobSB0byBidWls ZCBhIGNvbnN0YW50IGluIGFzbQp0aGFuIHRodW1iMV9nZW5fY29uc3RfaW50XzEgZG9lcyBpbiBS VEwuIFNpbmNlIHRoZSBwcmV2aW91cyBwYXRjaCBhZGRlZApzdXBwb3J0IGZvciBhc20gZ2VuZXJh dGlvbiBpbiB0aHVtYjFfZ2VuX2NvbnN0X2ludF8xLCB0aGlzIHBhdGNoIGNhbGxzCml0IGZyb20g dGh1bWIxX21vdnNpX2luc24gdG8gYXZvaWQgZHVwbGljYXRpb24uCgpXZSBuZWVkIHRvIGludHJv ZHVjZSBhIG5ldyBwcm94eSBmdW5jdGlvbiwgdGh1bWIxX2dlbl9jb25zdF9pbnRfcHJpbnQKdG8g c2VsZWN0IHRoZSByaWdodCB0ZW1wbGF0ZS4KClRoaXMgcGF0Y2ggYWxzbyBhZGRzIGEgbmV3IHRl c3RjYXNlIGFzIHRoZSB1cGRhdGVkIGFsdGVybmF0aXZlIGlzIG9ubHkKdXNlZCBieSB0aHVtYi0x IHByb2Nlc3NvcnMgdGhhdCBhbHNvIHN1cHBvcnQgbW92dC9tb3Z3LgoKMjAyMC0xMS0wMiAgQ2hy aXN0b3BoZSBMeW9uICA8Y2hyaXN0b3BoZS5seW9uQGxpbmFyby5vcmc+CgoJZ2NjLwoJKiBjb25m aWcvYXJtL3RodW1iMS5tZCAodGh1bWIxX21vdnNpX2luc24pOiBDYWxsCgl0aHVtYjFfZ2VuX2Nv bnN0X2ludF9wcmludC4KCSogY29uZmlnL2FybS9hcm0tcHJvdG9zLmggKHRodW1iMV9nZW5fY29u c3RfaW50X3ByaW50KTogQWRkCglwcm90b3R5cGUuCgkqIGNvbmZpZy9hcm0vYXJtLmMgKHRodW1i MV9nZW5fY29uc3RfaW50X3ByaW50KTogTmV3LgoKCWdjYy90ZXN0c3VpdGUvCgkqIGdjYy50YXJn ZXQvYXJtL3B1cmUtY29kZS9uby1saXRlcmFsLXBvb2wtbTIzLmM6IE5ldy4KLS0tCiBnY2MvY29u ZmlnL2FybS9hcm0tcHJvdG9zLmggICAgICAgICAgICAgICAgICAgICAgICB8ICAgMSArCiBnY2Mv Y29uZmlnL2FybS9hcm0uYyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICB8ICAgOSArLQog Z2NjL2NvbmZpZy9hcm0vdGh1bWIxLm1kICAgICAgICAgICAgICAgICAgICAgICAgICAgfCAgMzcg Ky0tLS0KIC4uLi9nY2MudGFyZ2V0L2FybS9wdXJlLWNvZGUvbm8tbGl0ZXJhbC1wb29sLW0yMy5j IHwgMTcxICsrKysrKysrKysrKysrKysrKysrKwogNCBmaWxlcyBjaGFuZ2VkLCAxODQgaW5zZXJ0 aW9ucygrKSwgMzQgZGVsZXRpb25zKC0pCiBjcmVhdGUgbW9kZSAxMDA2NDQgZ2NjL3Rlc3RzdWl0 ZS9nY2MudGFyZ2V0L2FybS9wdXJlLWNvZGUvbm8tbGl0ZXJhbC1wb29sLW0yMy5jCgpkaWZmIC0t Z2l0IGEvZ2NjL2NvbmZpZy9hcm0vYXJtLXByb3Rvcy5oIGIvZ2NjL2NvbmZpZy9hcm0vYXJtLXBy b3Rvcy5oCmluZGV4IDIzYjMyOWQuLmQwOWU2YTIgMTAwNjQ0Ci0tLSBhL2djYy9jb25maWcvYXJt L2FybS1wcm90b3MuaAorKysgYi9nY2MvY29uZmlnL2FybS9hcm0tcHJvdG9zLmgKQEAgLTc1LDYg Kzc1LDcgQEAgZXh0ZXJuIGludCBjb25zdF9va19mb3JfYXJtIChIT1NUX1dJREVfSU5UKTsKIGV4 dGVybiBpbnQgY29uc3Rfb2tfZm9yX29wIChIT1NUX1dJREVfSU5ULCBlbnVtIHJ0eF9jb2RlKTsK IGV4dGVybiBpbnQgY29uc3Rfb2tfZm9yX2RpbW9kZV9vcCAoSE9TVF9XSURFX0lOVCwgZW51bSBy dHhfY29kZSk7CiBleHRlcm4gdm9pZCB0aHVtYjFfZ2VuX2NvbnN0X2ludF9ydGwgKHJ0eCwgSE9T VF9XSURFX0lOVCk7CitleHRlcm4gdm9pZCB0aHVtYjFfZ2VuX2NvbnN0X2ludF9wcmludCAocnR4 LCBIT1NUX1dJREVfSU5UKTsKIGV4dGVybiBpbnQgYXJtX3NwbGl0X2NvbnN0YW50IChSVFhfQ09E RSwgbWFjaGluZV9tb2RlLCBydHgsCiAJCQkgICAgICAgSE9TVF9XSURFX0lOVCwgcnR4LCBydHgs IGludCk7CiBleHRlcm4gaW50IGxlZ2l0aW1hdGVfcGljX29wZXJhbmRfcCAocnR4KTsKZGlmZiAt LWdpdCBhL2djYy9jb25maWcvYXJtL2FybS5jIGIvZ2NjL2NvbmZpZy9hcm0vYXJtLmMKaW5kZXgg MjlmYTUzNi4uNTg0NzE0YiAxMDA2NDQKLS0tIGEvZ2NjL2NvbmZpZy9hcm0vYXJtLmMKKysrIGIv Z2NjL2NvbmZpZy9hcm0vYXJtLmMKQEAgLTI4Mzk1LDcgKzI4Mzk1LDcgQEAgdGh1bWIxX2dlbl9j b25zdF9pbnRfMSAoVCBkc3QsIEhPU1RfV0lERV9JTlQgb3AxKQogICAgIH0KIH0KIAotLyogUHJv eHkgZm9yIHRodW1iMS5tZCwgc2luY2UgdGhlIHRodW1iMV9jb25zdF9wcmludCBhbmQKKy8qIFBy b3hpZXMgZm9yIHRodW1iMS5tZCwgc2luY2UgdGhlIHRodW1iMV9jb25zdF9wcmludCBhbmQKICAg IHRodW1iMV9jb25zdF9ydGwgY2xhc3NlcyBhcmUgbm90IGV4cG9ydGVkLiAgKi8KIHZvaWQKIHRo dW1iMV9nZW5fY29uc3RfaW50X3J0bCAocnR4IGRzdCwgSE9TVF9XSURFX0lOVCBvcDEpCkBAIC0y ODQwNCw2ICsyODQwNCwxMyBAQCB0aHVtYjFfZ2VuX2NvbnN0X2ludF9ydGwgKHJ0eCBkc3QsIEhP U1RfV0lERV9JTlQgb3AxKQogICB0aHVtYjFfZ2VuX2NvbnN0X2ludF8xICh0LCBvcDEpOwogfQog Cit2b2lkCit0aHVtYjFfZ2VuX2NvbnN0X2ludF9wcmludCAocnR4IGRzdCwgSE9TVF9XSURFX0lO VCBvcDEpCit7CisgIHRodW1iMV9jb25zdF9wcmludCB0IChhc21fb3V0X2ZpbGUsIFJFR05PIChk c3QpKTsKKyAgdGh1bWIxX2dlbl9jb25zdF9pbnRfMSAodCwgb3AxKTsKK30KKwogLyogT3V0cHV0 IGNvZGUgdG8gYWRkIERFTFRBIHRvIHRoZSBmaXJzdCBhcmd1bWVudCwgYW5kIHRoZW4ganVtcAog ICAgdG8gRlVOQ1RJT04uICBVc2VkIGZvciBDKysgbXVsdGlwbGUgaW5oZXJpdGFuY2UuICAqLwog CmRpZmYgLS1naXQgYS9nY2MvY29uZmlnL2FybS90aHVtYjEubWQgYi9nY2MvY29uZmlnL2FybS90 aHVtYjEubWQKaW5kZXggYjMyZGQ0Zi4uNTI0NjhkYSAxMDA2NDQKLS0tIGEvZ2NjL2NvbmZpZy9h cm0vdGh1bWIxLm1kCisrKyBiL2djYy9jb25maWcvYXJtL3RodW1iMS5tZApAQCAtNjg4LDQwICs2 ODgsMTEgQEAgKGRlZmluZV9pbnNuICIqdGh1bWIxX21vdnNpX2luc24iCiAJICB9CiAJZWxzZSBp ZiAoR0VUX0NPREUgKG9wZXJhbmRzWzFdKSA9PSBDT05TVF9JTlQpCiAJICB7Ci0JICAgIGludCBp OwotCSAgICBIT1NUX1dJREVfSU5UIG9wMSA9IElOVFZBTCAob3BlcmFuZHNbMV0pOwotCSAgICBi b29sIG1vdl9kb25lX3AgPSBmYWxzZTsKLQkgICAgcnR4IG9wc1syXTsKLQkgICAgb3BzWzBdID0g b3BlcmFuZHNbMF07Ci0KLQkgICAgLyogRW1pdCB1cHBlciAzIGJ5dGVzIGlmIG5lZWRlZC4gICov Ci0JICAgIGZvciAoaSA9IDA7IGkgPCAzOyBpKyspCi0JICAgICAgewotCQlpbnQgYnl0ZSA9IChv cDEgPj4gKDggKiAoMyAtIGkpKSkgJiAweGZmOwotCi0JCWlmIChieXRlKQotCQkgIHsKLQkJICAg IG9wc1sxXSA9IEdFTl9JTlQgKGJ5dGUpOwotCQkgICAgaWYgKG1vdl9kb25lX3ApCi0JCSAgICAg IG91dHB1dF9hc21faW5zbiAoImFkZHNcdCUwLCAlMSIsIG9wcyk7Ci0JCSAgICBlbHNlCi0JCSAg ICAgIG91dHB1dF9hc21faW5zbiAoIm1vdnNcdCUwLCAlMSIsIG9wcyk7Ci0JCSAgICBtb3ZfZG9u ZV9wID0gdHJ1ZTsKLQkJICB9Ci0KLQkJaWYgKG1vdl9kb25lX3ApCi0JCSAgb3V0cHV0X2FzbV9p bnNuICgibHNsc1x0JTAsICM4Iiwgb3BzKTsKLQkgICAgICB9Ci0KLQkgICAgLyogRW1pdCBsb3dl ciBieXRlIGlmIG5lZWRlZC4gICovCi0JICAgIG9wc1sxXSA9IEdFTl9JTlQgKG9wMSAmIDB4ZmYp OwotCSAgICBpZiAoIW1vdl9kb25lX3ApCi0JICAgICAgb3V0cHV0X2FzbV9pbnNuICgibW92c1x0 JTAsICUxIiwgb3BzKTsKLQkgICAgZWxzZSBpZiAob3AxICYgMHhmZikKLQkgICAgICBvdXRwdXRf YXNtX2luc24gKCJhZGRzXHQlMCwgJTEiLCBvcHMpOwotCSAgICByZXR1cm4gIiI7CisJICAgIHRo dW1iMV9nZW5fY29uc3RfaW50X3ByaW50IChvcGVyYW5kc1swXSwgSU5UVkFMIChvcGVyYW5kc1sx XSkpOworCSAgICByZXR1cm4gXCJcIjsKIAkgIH0KLQkgIGdjY191bnJlYWNoYWJsZSAoKTsKKwor CWdjY191bnJlYWNoYWJsZSAoKTsKIAogICAgICAgY2FzZSA4OiByZXR1cm4gImxkclx0JTAsICUx IjsKICAgICAgIGNhc2UgOTogcmV0dXJuICJzdHJcdCUxLCAlMCI7CmRpZmYgLS1naXQgYS9nY2Mv dGVzdHN1aXRlL2djYy50YXJnZXQvYXJtL3B1cmUtY29kZS9uby1saXRlcmFsLXBvb2wtbTIzLmMg Yi9nY2MvdGVzdHN1aXRlL2djYy50YXJnZXQvYXJtL3B1cmUtY29kZS9uby1saXRlcmFsLXBvb2wt bTIzLmMKbmV3IGZpbGUgbW9kZSAxMDA2NDQKaW5kZXggMDAwMDAwMC4uNjdkNjNkMgotLS0gL2Rl di9udWxsCisrKyBiL2djYy90ZXN0c3VpdGUvZ2NjLnRhcmdldC9hcm0vcHVyZS1jb2RlL25vLWxp dGVyYWwtcG9vbC1tMjMuYwpAQCAtMCwwICsxLDE3MSBAQAorLyogeyBkZy1kbyBjb21waWxlIH0g Ki8KKy8qIHsgZGctb3B0aW9ucyAiLW1wdXJlLWNvZGUgLW1jcHU9Y29ydGV4LW0yMyAtbWFyY2g9 YXJtdjgtbS5iYXNlIC1tdGh1bWIiIH0gKi8KKy8qIHsgZGctZmluYWwgeyBjaGVjay1mdW5jdGlv bi1ib2RpZXMgIioqIiAiIiB9IH0gKi8KKworLyoKKyoqIHRlc3RpOgorKioJLi4uCisqKgltb3Zz CXJbMC0zXSwgIzEKKyoqCWxzbHMJclswLTNdLCAjMTMKKyoqCXJzYnMJclswLTNdLCAjMAorKioJ Li4uCisqLworaW50Cit0ZXN0aSAoaW50ICpwKQoreworICBpZiAoKnAgPiAweDEyMzQ1Njc4KQor ICAgIHJldHVybiAqcC04MTkyOworICBlbHNlCisgICAgcmV0dXJuICpwKzgxOTI7Cit9CisKKy8q IERvZXMgbm90IHVzZSB0aHVtYjFfZ2VuX2NvbnN0X2ludC4KKyoqIHRlc3RfMDoKKyoqCS4uLgor KioJbW92cwlyWzAtM10sICMwCisqKgkuLi4KKyovCitpbnQKK3Rlc3RfMCAoKQoreworICByZXR1 cm4gMDsKK30KKworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3RfaW50LgorKiogdGVz dF8xMjg6CisqKgkuLi4KKyoqCW1vdnMJclswLTNdLCAjMTI4CisqKgkuLi4KKyovCitpbnQKK3Rl c3RfMTI4ICgpCit7CisgIHJldHVybiAxMjg7Cit9CisKKy8qIERvZXMgbm90IHVzZSB0aHVtYjFf Z2VuX2NvbnN0X2ludC4KKyoqIHRlc3RfMjY0OgorKioJLi4uCisqKgltb3Z3CXJbMC0zXSwgIzI2 NAorKioJLi4uCisqLworaW50Cit0ZXN0XzI2NCAoKQoreworICByZXR1cm4gMjY0OworfQorCisv KiBEb2VzIG5vdCB1c2UgdGh1bWIxX2dlbl9jb25zdF9pbnQuCisqKiB0ZXN0XzUxMDoKKyoqCS4u LgorKioJbW92dwlyWzAtM10sICM1MTAKKyoqCS4uLgorKi8KK2ludAordGVzdF81MTAgKCkKK3sK KyAgcmV0dXJuIDUxMDsKK30KKworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3RfaW50 LgorKiogdGVzdF81MTI6CisqKgkuLi4KKyoqCW1vdncJclswLTNdLCAjNTEyCisqKgkuLi4KKyov CitpbnQKK3Rlc3RfNTEyICgpCit7CisgIHJldHVybiA1MTI7Cit9CisKKy8qIERvZXMgbm90IHVz ZSB0aHVtYjFfZ2VuX2NvbnN0X2ludC4KKyoqIHRlc3RfNzY0OgorKioJLi4uCisqKgltb3Z3CXJb MC0zXSwgIzc2NAorKioJLi4uCisqLworaW50Cit0ZXN0Xzc2NCAoKQoreworICByZXR1cm4gNzY0 OworfQorCisvKiBEb2VzIG5vdCB1c2UgdGh1bWIxX2dlbl9jb25zdF9pbnQuCisqKiB0ZXN0XzY1 NTM2OgorKioJLi4uCisqKgltb3ZzCXJbMC0zXSwgIzEyOAorKioJbHNscwlyWzAtM10sIHJbMC0z XSwgIzkKKyoqCS4uLgorKi8KK2ludAordGVzdF82NTUzNiAoKQoreworICByZXR1cm4gNjU1MzY7 Cit9CisKKy8qIERvZXMgbm90IHVzZSB0aHVtYjFfZ2VuX2NvbnN0X2ludC4KKyoqIHRlc3RfMHgx MjM0NTY6CisqKgkuLi4KKyoqCW1vdncJclswLTNdLCAjMTMzOTgKKyoqCW1vdnQJclswLTNdLCAx OAorKioJLi4uCisqLworaW50Cit0ZXN0XzB4MTIzNDU2ICgpCit7CisgIHJldHVybiAweDEyMzQ1 NjsKK30KKworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3RfaW50LgorKiogdGVzdF8w eDExMjM0NTY6CisqKgkuLi4KKyoqCW1vdncJclswLTNdLCAjMTMzOTgKKyoqCW1vdnQJclswLTNd LCAyNzQKKyoqCS4uLgorKi8KK2ludAordGVzdF8weDExMjM0NTYgKCkKK3sKKyAgcmV0dXJuIDB4 MTEyMzQ1NjsKK30KKworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3RfaW50LgorKiog dGVzdF8weDEwMDAwMTA6CisqKgkuLi4KKyoqCW1vdnMJclswLTNdLCAjMTYKKyoqCW1vdnQJclsw LTNdLCAyNTYKKyoqCS4uLgorKi8KK2ludAordGVzdF8weDEwMDAwMTAgKCkKK3sKKyAgcmV0dXJu IDB4MTAwMDAxMDsKK30KKworLyogRG9lcyBub3QgdXNlIHRodW1iMV9nZW5fY29uc3RfaW50Lgor KiogdGVzdF8weDEwMDAwMTE6CisqKgkuLi4KKyoqCW1vdnMJclswLTNdLCAjMTcKKyoqCW1vdnQJ clswLTNdLCAyNTYKKyoqCS4uLgorKi8KK2ludAordGVzdF8weDEwMDAwMTEgKCkKK3sKKyAgcmV0 dXJuIDB4MTAwMDAxMTsKK30KKworLyoKKyoqIHRlc3RfbTgxOTI6CisqKgkuLi4KKyoqCW1vdnMJ clswLTNdLCAjMQorKioJbHNscwlyWzAtM10sICMxMworKioJcnNicwlyWzAtM10sICMwCisqKgku Li4KKyovCitpbnQKK3Rlc3RfbTgxOTIgKCkKK3sKKyAgcmV0dXJuIC04MTkyOworfQotLSAKMi43 LjQKCg== --0000000000000b740505b31d29e2 Content-Type: text/x-patch; charset="US-ASCII"; name="0003-arm-Fix-multiple-inheritance-thunks-for-thumb-1-with.patch" Content-Disposition: attachment; filename="0003-arm-Fix-multiple-inheritance-thunks-for-thumb-1-with.patch" Content-Transfer-Encoding: base64 Content-ID: X-Attachment-Id: f_kh0ecs0d2 RnJvbSA2OTZkNTZlZDQ4YjZiN2FjMzI5MzIxMjExOGQzZjE1N2U4ZjI1NDc3IE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBDaHJpc3RvcGhlIEx5b24gPGNocmlzdG9waGUubHlvbkBsaW5h cm8ub3JnPgpEYXRlOiBUdWUsIDI5IFNlcCAyMDIwIDE5OjQwOjM5ICswMDAwClN1YmplY3Q6IFtQ QVRDSCAzLzNdIGFybTogRml4IG11bHRpcGxlIGluaGVyaXRhbmNlIHRodW5rcyBmb3IgdGh1bWIt MSB3aXRoCiAtbXB1cmUtY29kZQoKV2hlbiAtbXB1cmUtY29kZSBpcyB1c2VkLCB3ZSBjYW5ub3Qg bG9hZCBkZWx0YSBmcm9tIGNvZGUgbWVtb3J5IChsaWtlCndlIGRvIHdpdGhvdXQgLW1wdXJlLWNv ZGUpLgoKVGhpcyBwYXRjaCBidWlsZHMgdGhlIHZhbHVlIG9mIG1pX2RlbHRhIGludG8gcjMgd2l0 aCBhIHNlcmllcyBvZgptb3ZzL2FkZHMvbHNscy4KCldlIGFsc28gZG8gc29tZSBjbGVhbnVwIGJ5 IG5vdCBlbWl0dGluZyB0aGUgZnVuY3Rpb24gYWRkcmVzcyBhbmQgZGVsdGEKdmlhIC53b3JkIGRp cmVjdGl2ZXMgYXQgdGhlIGVuZCBvZiB0aGUgdGh1bmsgc2luY2Ugd2UgZG9uJ3QgdXNlIHRoZW0K d2l0aCAtbXB1cmUtY29kZS4KCk5vIG5lZWQgZm9yIG5ldyB0ZXN0Y2FzZXMsIHRoaXMgYnVnIHdh cyBhbHJlYWR5IGlkZW50aWZpZWQgYnk6CmcrKy5kZy9pcGEvcHI0NjI4Ny0zLkMKZysrLmRnL2lw YS9wcjQ2OTg0LkMKZysrLmRnL29wdC90aHVuazEuQwpnKysuZGcvdG9ydHVyZS9wcjQ2Mjg3LkMK ZysrLmRnL3RvcnR1cmUvcHI0NTY5OS5DCgoyMDIwLTExLTAyICBDaHJpc3RvcGhlIEx5b24gIDxj aHJpc3RvcGhlLmx5b25AbGluYXJvLm9yZz4KCglnY2MvCgkqIGNvbmZpZy9hcm0vYXJtLmMgKGFy bV90aHVtYjFfbWlfdGh1bmspOiBCdWlsZCBtaV9kZWx0YSBpbiByMyBhbmQKCWRvIG5vdCBlbWl0 IGZ1bmN0aW9uIGFkZHJlc3MgYW5kIGRlbHRhIHdoZW4gLW1wdXJlLWNvZGUgaXMgdXNlZC4KLS0t CiBnY2MvY29uZmlnL2FybS9hcm0uYyB8IDY3ICsrKysrKysrKysrKysrKysrKysrKysrKysrKysr KysrLS0tLS0tLS0tLS0tLS0tLS0tLS0KIDEgZmlsZSBjaGFuZ2VkLCA0MiBpbnNlcnRpb25zKCsp LCAyNSBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS9nY2MvY29uZmlnL2FybS9hcm0uYyBiL2dj Yy9jb25maWcvYXJtL2FybS5jCmluZGV4IDU4NDcxNGIuLmZjODgwNzEgMTAwNjQ0Ci0tLSBhL2dj Yy9jb25maWcvYXJtL2FybS5jCisrKyBiL2djYy9jb25maWcvYXJtL2FybS5jCkBAIC0yODUwOSw5 ICsyODUwOSwxOSBAQCBhcm1fdGh1bWIxX21pX3RodW5rIChGSUxFICpmaWxlLCB0cmVlLCBIT1NU X1dJREVfSU5UIGRlbHRhLAogICAgIHsKICAgICAgIGlmIChtaV9kZWx0YSA+IDI1NSkKIAl7Ci0J ICBmcHV0cyAoIlx0bGRyXHRyMywgIiwgZmlsZSk7Ci0JICBhc3NlbWJsZV9uYW1lIChmaWxlLCBs YWJlbCk7Ci0JICBmcHV0cyAoIis0XG4iLCBmaWxlKTsKKwkgIC8qIFdpdGggLW1wdXJlLWNvZGUs IHdlIGNhbm5vdCBsb2FkIE1JX0RFTFRBIGZyb20gdGhlCisJICAgICBjb25zdGFudCBwb29sOiB3 ZSBidWlsZCBpdCBleHBsaWNpdGx5LiAgKi8KKwkgIGlmICh0YXJnZXRfcHVyZV9jb2RlKQorCSAg ICB7CisJICAgICAgdGh1bWIxX2NvbnN0X3ByaW50IHIzIChmaWxlLCAzKTsKKwkgICAgICB0aHVt YjFfZ2VuX2NvbnN0X2ludF8xIChyMywgbWlfZGVsdGEpOworCSAgICB9CisJICBlbHNlCisJICAg IHsKKwkgICAgICBmcHV0cyAoIlx0bGRyXHRyMywgIiwgZmlsZSk7CisJICAgICAgYXNzZW1ibGVf bmFtZSAoZmlsZSwgbGFiZWwpOworCSAgICAgIGZwdXRzICgiKzRcbiIsIGZpbGUpOworCSAgICB9 CiAJICBhc21fZnByaW50ZiAoZmlsZSwgIlx0JXNzXHQlciwgJXIsIHIzXG4iLAogCQkgICAgICAg bWlfb3AsIHRoaXNfcmVnbm8sIHRoaXNfcmVnbm8pOwogCX0KQEAgLTI4NTQ3LDMwICsyODU1Nywz NyBAQCBhcm1fdGh1bWIxX21pX3RodW5rIChGSUxFICpmaWxlLCB0cmVlLCBIT1NUX1dJREVfSU5U IGRlbHRhLAogCWZwdXRzICgiXHRwb3BcdHtyM31cbiIsIGZpbGUpOwogCiAgICAgICBmcHJpbnRm IChmaWxlLCAiXHRieFx0cjEyXG4iKTsKLSAgICAgIEFTTV9PVVRQVVRfQUxJR04gKGZpbGUsIDIp OwotICAgICAgYXNzZW1ibGVfbmFtZSAoZmlsZSwgbGFiZWwpOwotICAgICAgZnB1dHMgKCI6XG4i LCBmaWxlKTsKLSAgICAgIGlmIChmbGFnX3BpYykKKworICAgICAgLyogV2l0aCAtbXB1cmUtY29k ZSwgd2UgZG9uJ3QgbmVlZCB0byBlbWl0IGxpdGVyYWxzIGZvciB0aGUKKwkgZnVuY3Rpb24gYWRk cmVzcyBhbmQgZGVsdGEgc2luY2Ugd2UgZW1pdHRlZCBjb2RlIHRvIGJ1aWxkCisJIHRoZW0uICAq LworICAgICAgaWYgKCF0YXJnZXRfcHVyZV9jb2RlKQogCXsKLQkgIC8qIE91dHB1dCAiLndvcmQg LkxUSFVOS24tWzMsN10tLkxUSFVOS1BDbiIuICAqLwotCSAgcnR4IHRlbSA9IFhFWFAgKERFQ0xf UlRMIChmdW5jdGlvbiksIDApOwotCSAgLyogRm9yIFRBUkdFVF9USFVNQjFfT05MWSB0aGUgdGh1 bmsgaXMgaW4gVGh1bWIgbW9kZSwgc28gdGhlIFBDCi0JICAgICBwaXBlbGluZSBvZmZzZXQgaXMg Zm91ciByYXRoZXIgdGhhbiBlaWdodC4gIEFkanVzdCB0aGUgb2Zmc2V0Ci0JICAgICBhY2NvcmRp bmdseS4gICovCi0JICB0ZW0gPSBwbHVzX2NvbnN0YW50IChHRVRfTU9ERSAodGVtKSwgdGVtLAot CQkJICAgICAgIFRBUkdFVF9USFVNQjFfT05MWSA/IC0zIDogLTcpOwotCSAgdGVtID0gZ2VuX3J0 eF9NSU5VUyAoR0VUX01PREUgKHRlbSksCi0JCQkgICAgICAgdGVtLAotCQkJICAgICAgIGdlbl9y dHhfU1lNQk9MX1JFRiAoUG1vZGUsCi0JCQkJCQkgICBnZ2Nfc3RyZHVwIChsYWJlbHBjKSkpOwot CSAgYXNzZW1ibGVfaW50ZWdlciAodGVtLCA0LCBCSVRTX1BFUl9XT1JELCAxKTsKLQl9Ci0gICAg ICBlbHNlCi0JLyogT3V0cHV0ICIud29yZCAuTFRIVU5LbiIuICAqLwotCWFzc2VtYmxlX2ludGVn ZXIgKFhFWFAgKERFQ0xfUlRMIChmdW5jdGlvbiksIDApLCA0LCBCSVRTX1BFUl9XT1JELCAxKTsK KwkgIEFTTV9PVVRQVVRfQUxJR04gKGZpbGUsIDIpOworCSAgYXNzZW1ibGVfbmFtZSAoZmlsZSwg bGFiZWwpOworCSAgZnB1dHMgKCI6XG4iLCBmaWxlKTsKKwkgIGlmIChmbGFnX3BpYykKKwkgICAg eworCSAgICAgIC8qIE91dHB1dCAiLndvcmQgLkxUSFVOS24tWzMsN10tLkxUSFVOS1BDbiIuICAq LworCSAgICAgIHJ0eCB0ZW0gPSBYRVhQIChERUNMX1JUTCAoZnVuY3Rpb24pLCAwKTsKKwkgICAg ICAvKiBGb3IgVEFSR0VUX1RIVU1CMV9PTkxZIHRoZSB0aHVuayBpcyBpbiBUaHVtYiBtb2RlLCBz byB0aGUgUEMKKwkJIHBpcGVsaW5lIG9mZnNldCBpcyBmb3VyIHJhdGhlciB0aGFuIGVpZ2h0LiAg QWRqdXN0IHRoZSBvZmZzZXQKKwkJIGFjY29yZGluZ2x5LiAgKi8KKwkgICAgICB0ZW0gPSBwbHVz X2NvbnN0YW50IChHRVRfTU9ERSAodGVtKSwgdGVtLAorCQkJCSAgIFRBUkdFVF9USFVNQjFfT05M WSA/IC0zIDogLTcpOworCSAgICAgIHRlbSA9IGdlbl9ydHhfTUlOVVMgKEdFVF9NT0RFICh0ZW0p LAorCQkJCSAgIHRlbSwKKwkJCQkgICBnZW5fcnR4X1NZTUJPTF9SRUYgKFBtb2RlLAorCQkJCQkJ ICAgICAgIGdnY19zdHJkdXAgKGxhYmVscGMpKSk7CisJICAgICAgYXNzZW1ibGVfaW50ZWdlciAo dGVtLCA0LCBCSVRTX1BFUl9XT1JELCAxKTsKKwkgICAgfQorCSAgZWxzZQorCSAgICAvKiBPdXRw dXQgIi53b3JkIC5MVEhVTktuIi4gICovCisJICAgIGFzc2VtYmxlX2ludGVnZXIgKFhFWFAgKERF Q0xfUlRMIChmdW5jdGlvbiksIDApLCA0LCBCSVRTX1BFUl9XT1JELCAxKTsKIAotICAgICAgaWYg KFRBUkdFVF9USFVNQjFfT05MWSAmJiBtaV9kZWx0YSA+IDI1NSkKLQlhc3NlbWJsZV9pbnRlZ2Vy IChHRU5fSU5UKG1pX2RlbHRhKSwgNCwgQklUU19QRVJfV09SRCwgMSk7CisJICBpZiAoVEFSR0VU X1RIVU1CMV9PTkxZICYmIG1pX2RlbHRhID4gMjU1KQorCSAgICBhc3NlbWJsZV9pbnRlZ2VyIChH RU5fSU5UIChtaV9kZWx0YSksIDQsIEJJVFNfUEVSX1dPUkQsIDEpOworCX0KICAgICB9CiAgIGVs c2UKICAgICB7Ci0tIAoyLjcuNAoK --0000000000000b740505b31d29e2--