Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)

[Christophe Lyon <christophe.lyon@linaro.org>]

On 16 January 2015 at 11:54, Marcus Shawcroft
<marcus.shawcroft@gmail.com> wrote:
> On 15 January 2015 at 18:18, Richard Henderson <rth@redhat.com> wrote:
>> On 12/15/2014 12:41 AM, Zhenqiang Chen wrote:
>>> +(define_expand "cmp<mode>"
>>> +  [(set (match_operand 0 "cc_register" "")
>>> +        (match_operator:CC 1 "aarch64_comparison_operator"
>>> +         [(match_operand:GPI 2 "register_operand" "")
>>> +          (match_operand:GPI 3 "aarch64_plus_operand" "")]))]
>>> +  ""
>>> +  "
>>> +  operands[1] = gen_rtx_fmt_ee (COMPARE, SELECT_CC_MODE (GET_CODE (operands[1]),
>>> +                                                      operands[2],
>>> +                                                      operands[3]),
>>> +                              operands[2], operands[3]);
>>> +  "
>>> +)
>>
>> Use { } not "" for the C portion.
>>
>> Otherwise ok.
>
> Jiong... this is fine with me. /Marcus

Jiong,

I have noticed regressions on aarch64 after this patch:

See: http://abe.tcwglab.linaro.org/logs/validations/cross-validation/gcc/trunk/219723/report-build-info.html
Passed now fails          [PASS => FAIL]:
  gcc.target/aarch64/test_frame_1.c scan-assembler-times ldr\tx30,
\\[sp\\], [0-9]+ 3
  gcc.target/aarch64/test_frame_2.c scan-assembler-times ldp\tx19,
x30, \\[sp\\], [0-9]+ 2
  gcc.target/aarch64/test_frame_4.c scan-assembler-times ldp\tx19,
x30, \\[sp\\], [0-9]+ 2
  gcc.target/aarch64/test_frame_6.c scan-assembler-times ldr\tx30,
\\[sp\\], [0-9]+ 3
  gcc.target/aarch64/test_frame_7.c scan-assembler-times ldp\tx19,
x30, \\[sp\\], [0-9]+ 2

Is this expected?

Thanks,

Christophe.