From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x241.google.com (mail-oi1-x241.google.com [IPv6:2607:f8b0:4864:20::241]) by sourceware.org (Postfix) with ESMTPS id 5079F386102D for ; Mon, 28 Sep 2020 19:57:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 5079F386102D Received: by mail-oi1-x241.google.com with SMTP id n2so2734140oij.1 for ; Mon, 28 Sep 2020 12:57:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=BLTq+egqsV9aQBmsFz7IVzWNFN3nvlsGNwywmMyh3qM=; b=SegmLr5n32qBjrC955PFtCiiNhToDRRYD2Twl5ZbDVhoJ5FgTr2fjEa3FNkVs6A6r5 kdF/2WZ8u02DDo2r0ID+nheeczEOMhjFbj6+3Ouo+augsxop6SeN3TfjaqZY8pJdFUgq 1LNv7bBfc25nGlvwREDapk6tmeBMGKRlh5KJH6fU8GUPcWgCrW+6X2zpwwz4kktJv4zl j+3T3OKOFeVuk2lchQStnKA4XhXbvPFws0zYVsiPca4toP4JucfuFEOHGGuvqh+SoJHN e1X9ux93Ny0ToJuEnbH6EtQByVXF6d5+aU3i1tfTl6ZnhoTysfP5GrS2EOYDEkl9XcrW fDcw== X-Gm-Message-State: AOAM531SVh8Q9xKfdZcvsna2B73CpEIjXooSxRK8PCgypHX3flpK5tL8 Qz7NU8wSsWEKCQ3u6SLN6Qb/VFNF6cKlVWuQBbMZPTeHA6/cGQ== X-Google-Smtp-Source: ABdhPJzN7sYNyYG23HRqI2YmtGV8k++AoNJ3bVWP7EtWotI4oj7r5B2gmw3xQ8GuIF/mRclAJpu9xOywbnnl+30EHrg= X-Received: by 2002:aca:3d03:: with SMTP id k3mr331601oia.114.1601323045345; Mon, 28 Sep 2020 12:57:25 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Christophe Lyon Date: Mon, 28 Sep 2020 21:57:14 +0200 Message-ID: Subject: Re: [PATCH] arm: Add a couple of extra stack-protector tests To: gcc Patches , nick clifton , Richard Earnshaw , Ramana Radhakrishnan , Kyrylo Tkachov , Richard Sandiford Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Sep 2020 19:57:28 -0000 On Wed, 23 Sep 2020 at 20:33, Richard Sandiford wrote: > > These tests were inspired by the corresponding aarch64 ones that I just > committed. They already pass. > > Tested on arm-linux-gnueabi, arm-linux-gnueabihf and armeb-eabi. > OK for trunk? > > Richard > > > gcc/testsuite/ > * gcc.target/arm/stack-protector-5.c: New test. > * gcc.target/arm/stack-protector-6.c: Likewise. > --- Hi Richard, These new tests fail when compiling for cortex-a15 and cortex-a57... There are 2 "str" instructions generated, the code is much longer than for cortex-a9 for instance. They pass with cortex-a9, cortex-a5 and arm10tdmi. Christophe > .../gcc.target/arm/stack-protector-5.c | 21 +++++++++++++++++++ > .../gcc.target/arm/stack-protector-6.c | 8 +++++++ > 2 files changed, 29 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/arm/stack-protector-5.c > create mode 100644 gcc/testsuite/gcc.target/arm/stack-protector-6.c > > diff --git a/gcc/testsuite/gcc.target/arm/stack-protector-5.c b/gcc/testsuite/gcc.target/arm/stack-protector-5.c > new file mode 100644 > index 00000000000..b808b11aa3d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/stack-protector-5.c > @@ -0,0 +1,21 @@ > +/* { dg-do compile } */ > +/* { dg-options "-fstack-protector-all -O2" } */ > + > +void __attribute__ ((noipa)) > +f (void) > +{ > + volatile int x; > + asm volatile ("" ::: > + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", > + "r8", "r9", "r10", "r11", "r12", "r14"); > +} > + > +/* The register clobbers above should not generate any single LDRs or STRs; > + all registers should be pushed and popped using register lists. The only > + STRs should therefore be those associated with the stack protector tests > + themselves. > + > + Make sure the address of the canary is not spilled and reloaded, > + since that would give the attacker an opportunity to change the > + canary value. */ > +/* { dg-final { scan-assembler-times {\tstr\t} 1 } } */ > diff --git a/gcc/testsuite/gcc.target/arm/stack-protector-6.c b/gcc/testsuite/gcc.target/arm/stack-protector-6.c > new file mode 100644 > index 00000000000..f8eec878bd6 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/stack-protector-6.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target fpic } */ > +/* { dg-options "-fstack-protector-all -O2 -fpic" } */ > + > +#include "stack-protector-5.c" > + > +/* See the comment in stack-protector-5.c. */ > +/* { dg-final { scan-assembler-times {\tstr\t} 1 } } */