From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by sourceware.org (Postfix) with ESMTPS id 57485383801C for ; Mon, 17 May 2021 09:55:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 57485383801C Received: by mail-pl1-x633.google.com with SMTP id h7so2851575plt.1 for ; Mon, 17 May 2021 02:55:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=7VZ1E6FcGbjqFqgRHGKpYtyZI76yqVsQwjL8ciMizJU=; b=rPhKlsrTc+bfvArjNfNBLohzC/+vda+BNAR93/QcbTnyFCOJ5wPftZviMh4MIhGwuD 2puehO7JV7/tYlDYJwgaceFKI5UZqgT+unzvMyTjC8Mci2hI1DSlkcCeHux1Lkc7uAzt wqXFVkIc1MsDPvAcgGjC8k3013S6zBK642Y2g8Uu0HMvNpLwtumMKL/Hx1bQ34Ee965x ggiM41eX5EuD9KubT7E3fEC8FCtk9yt8BG1S7+cA8jyBouD0/wU6O7OFaFIaolUxEBJK iq6wvdG89qlT8NlBvywvfteNpZ3Wn2SGYUr0BAnamyCQNedJl7eYHOblgkGhBistXznO IQ4A== X-Gm-Message-State: AOAM530poO2fmbsRkaClPWLZF5GEflCXHOP9nIrZk8TU5i4vtOD3fJAU pYUAyL8ociwo7eWZpYGhL2FTclE3XoDZ2Ft8UXOrwW0ovFMYVQ== X-Google-Smtp-Source: ABdhPJxWNw71o/t/AU6fYuAUPxPNHvjvbh+jc3+TrZw7MJ6lAG7qpjT+EezAn0163x9DhcSTZxahYQDPb1xurtzBV00= X-Received: by 2002:a17:90a:6289:: with SMTP id d9mr67088600pjj.84.1621245316132; Mon, 17 May 2021 02:55:16 -0700 (PDT) MIME-Version: 1.0 References: <1619791790-628-1-git-send-email-christophe.lyon@linaro.org> <1619791790-628-8-git-send-email-christophe.lyon@linaro.org> In-Reply-To: <1619791790-628-8-git-send-email-christophe.lyon@linaro.org> From: Christophe Lyon Date: Mon, 17 May 2021 11:55:05 +0200 Message-ID: Subject: Re: [PATCH 8/9] arm: Auto-vectorization for MVE: vld2/vst2 To: gcc Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 May 2021 09:55:19 -0000 ping? On Fri, 30 Apr 2021 at 16:09, Christophe Lyon wrote: > > This patch enables MVE vld2/vst2 instructions for auto-vectorization. > We move the existing expanders from neon.md and enable them for MVE, > calling the respective emitter. > > 2021-03-12 Christophe Lyon > > gcc/ > * config/arm/neon.md (vec_load_lanesoi) > (vec_store_lanesoi): Move ... > * config/arm/vec-common.md: here. > > gcc/testsuite/ > * gcc.target/arm/simd/mve-vld2.c: New test, derived from > slp-perm-2.c > --- > gcc/config/arm/neon.md | 14 ---- > gcc/config/arm/vec-common.md | 27 ++++++++ > gcc/testsuite/gcc.target/arm/simd/mve-vld2.c | 96 ++++++++++++++++++++++++++++ > 3 files changed, 123 insertions(+), 14 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vld2.c > > diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md > index 6660846..bc8775c 100644 > --- a/gcc/config/arm/neon.md > +++ b/gcc/config/arm/neon.md > @@ -5063,13 +5063,6 @@ (define_insn "neon_vld2" > (const_string "neon_load2_2reg")))] > ) > > -(define_expand "vec_load_lanesoi" > - [(set (match_operand:OI 0 "s_register_operand") > - (unspec:OI [(match_operand:OI 1 "neon_struct_operand") > - (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] > - UNSPEC_VLD2))] > - "TARGET_NEON") > - > (define_insn "neon_vld2" > [(set (match_operand:OI 0 "s_register_operand" "=w") > (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") > @@ -5197,13 +5190,6 @@ (define_insn "neon_vst2" > (const_string "neon_store2_one_lane")))] > ) > > -(define_expand "vec_store_lanesoi" > - [(set (match_operand:OI 0 "neon_struct_operand") > - (unspec:OI [(match_operand:OI 1 "s_register_operand") > - (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] > - UNSPEC_VST2))] > - "TARGET_NEON") > - > (define_insn "neon_vst2" > [(set (match_operand:OI 0 "neon_struct_operand" "=Um") > (unspec:OI [(match_operand:OI 1 "s_register_operand" "w") > diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md > index 3fd341c..7abefea 100644 > --- a/gcc/config/arm/vec-common.md > +++ b/gcc/config/arm/vec-common.md > @@ -482,6 +482,33 @@ (define_expand "vcond_mask_" > } > else > gcc_unreachable (); > + DONE; > +}) > > +(define_expand "vec_load_lanesoi" > + [(set (match_operand:OI 0 "s_register_operand") > + (unspec:OI [(match_operand:OI 1 "neon_struct_operand") > + (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] > + UNSPEC_VLD2))] > + "TARGET_NEON || TARGET_HAVE_MVE" > +{ > + if (TARGET_NEON) > + emit_insn (gen_neon_vld2 (operands[0], operands[1])); > + else > + emit_insn (gen_mve_vld2q (operands[0], operands[1])); > + DONE; > +}) > + > +(define_expand "vec_store_lanesoi" > + [(set (match_operand:OI 0 "neon_struct_operand") > + (unspec:OI [(match_operand:OI 1 "s_register_operand") > + (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] > + UNSPEC_VST2))] > + "TARGET_NEON || TARGET_HAVE_MVE" > +{ > + if (TARGET_NEON) > + emit_insn (gen_neon_vst2 (operands[0], operands[1])); > + else > + emit_insn (gen_mve_vst2q (operands[0], operands[1])); > DONE; > }) > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vld2.c b/gcc/testsuite/gcc.target/arm/simd/mve-vld2.c > new file mode 100644 > index 0000000..9c7c3f5 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vld2.c > @@ -0,0 +1,96 @@ > +/* { dg-do assemble } */ > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > +/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-additional-options "-O3" } */ > + > +#include > + > +#define M00 100 > +#define M10 216 > +#define M01 1322 > +#define M11 13 > + > +#define N 128 > + > + > +/* Integer tests. */ > +#define FUNC(SIGN, TYPE, BITS) \ > + void foo_##SIGN##BITS##x (TYPE##BITS##_t *__restrict__ pInput, \ > + TYPE##BITS##_t *__restrict__ pOutput) \ > + { \ > + unsigned int i; \ > + TYPE##BITS##_t a, b; \ > + \ > + for (i = 0; i < N / BITS; i++) \ > + { \ > + a = *pInput++; \ > + b = *pInput++; \ > + \ > + *pOutput++ = M00 * a + M01 * b; \ > + *pOutput++ = M10 * a + M11 * b; \ > + } \ > + } > + > +FUNC(s, int, 8) > +FUNC(u, uint, 8) > +FUNC(s, int, 16) > +FUNC(u, uint, 16) > +FUNC(s, int, 32) > +FUNC(u, uint, 32) > + > +/* float test, keep the macro because it's similar to the above, but does not > + need the ##BITS##_t. */ > +#define FUNC_FLOAT(SIGN, TYPE, BITS) \ > + void foo_##SIGN##BITS##x (TYPE *__restrict__ pInput, \ > + TYPE *__restrict__ pOutput) \ > + { \ > + unsigned int i; \ > + TYPE a, b; \ > + \ > + for (i = 0; i < N / BITS; i++) \ > + { \ > + a = *pInput++; \ > + b = *pInput++; \ > + \ > + *pOutput++ = M00 * a + M01 * b; \ > + *pOutput++ = M10 * a + M11 * b; \ > + } \ > + } > + > +FUNC_FLOAT(f, float, 32) > + > +/* __fp16 test, needs explicit casts to avoid conversions to floating-point and > + failure to vectorize. */ > +__fp16 M00_fp16 = 100.0f16; > +__fp16 M10_fp16 = 216.0f16; > +__fp16 M01_fp16 = 1322.0f16; > +__fp16 M11_fp16 = 13.0f16; > + > +#define FUNC_FLOAT_FP16(SIGN, TYPE, BITS) \ > + void foo_##SIGN##BITS##x (TYPE *__restrict__ pInput, \ > + TYPE *__restrict__ pOutput) \ > + { \ > + unsigned int i; \ > + TYPE a, b; \ > + \ > + for (i = 0; i < N / BITS; i++) \ > + { \ > + a = *pInput++; \ > + b = *pInput++; \ > + \ > + *pOutput++ = (__fp16)(M00_fp16 * a) + (__fp16)(M01_fp16 * b); \ > + *pOutput++ = (__fp16)(M10_fp16 * a) + (__fp16)(M11_fp16 * b); \ > + } \ > + } > + > +FUNC_FLOAT_FP16(f, __fp16, 16) > + > +/* vld2X.8 is used for signed and unsigned chars: 2 pairs. */ > +/* vld2X.16 is used for signed and unsigned shorts and __fp16: 3 pairs. */ > +/* vld2X.32 is used for signed and unsigned ints and float: 3 pairs. */ > +/* { dg-final { scan-assembler-times {vld2[01].8\t.q[0-9]+, q[0-9]+., } 4 } } */ > +/* { dg-final { scan-assembler-times {vld2[01].16\t.q[0-9]+, q[0-9]+., } 6 } } */ > +/* { dg-final { scan-assembler-times {vld2[01].32\t.q[0-9]+, q[0-9]+., } 6 } } */ > +/* { dg-final { scan-assembler-times {vst2[01].8\t.q[0-9]+, q[0-9]+., } 4 } } */ > +/* { dg-final { scan-assembler-times {vst2[01].16\t.q[0-9]+, q[0-9]+., } 6 } } */ > +/* { dg-final { scan-assembler-times {vst2[01].32\t.q[0-9]+, q[0-9]+., } 6 } } */ > -- > 2.7.4 >