From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 105656 invoked by alias); 8 Jul 2019 09:10:49 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 105646 invoked by uid 89); 8 Jul 2019 09:10:49 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-15.4 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_NUMSUBJECT,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=H*RU:209.85.208.194, HX-Spam-Relays-External:209.85.208.194, H*r:ip*209.85.208.194 X-HELO: mail-lj1-f194.google.com Received: from mail-lj1-f194.google.com (HELO mail-lj1-f194.google.com) (209.85.208.194) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 08 Jul 2019 09:10:47 +0000 Received: by mail-lj1-f194.google.com with SMTP id m23so15075419lje.12 for ; Mon, 08 Jul 2019 02:10:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=EF5jUMonI6McQIZ8dk2+XyLmuQQ0OxqCGOidoBN/SMA=; b=JupFcQKQNSGnQ+muAx7rNscJ5kK3OegHt1EhhcFLvukZW0yuruhiNwE9rj1uEW8qCj mKd76FbKYiTQ3w2C4QpYlGvY+omm6eykBlbfVGSOP2s90bkxgqP5CIcCEhvjwSDbALx+ Xorr6RDfZEGSH5YLDBsik1O/4oiHC0K/7MCw7jbV+gTQvbdVmIJMjmJl4ZD2AQ5FzKNU 9eyLxik6WlhQ8jApj462d/Azo2xyDjXOt6NVBhHasoC9VEq0Fpb02ch2ri7lYAX2Guwi M2aapeTfMbRlyexV7Q8uLDHZCaW0K6wiIU4YVRKwOFNh9ynILLfXrKJUYTMEwJbr3DTY oHLw== MIME-Version: 1.0 References: In-Reply-To: From: Christophe Lyon Date: Mon, 08 Jul 2019 09:16:00 -0000 Message-ID: Subject: Re: [PATCH][armeb] PR 91060 gcc.c-torture/execute/scal-to-vec1.c fails since r272843 To: Kyrill Tkachov Cc: gcc Patches , Richard Biener , Richard Sandiford Content-Type: text/plain; charset="UTF-8" X-IsSubscribed: yes X-SW-Source: 2019-07/txt/msg00557.txt.bz2 On Mon, 8 Jul 2019 at 11:06, Kyrill Tkachov wrote: > > Hi Christophe > > On 7/8/19 10:01 AM, Christophe Lyon wrote: > > Hi, > > > > This patch fixes PR 91060 where the lane ordering was no longer the > > right one (GCC's vs architecture's). > > > > OK? > > > > Thanks to both Richards for most of the debugging! > > Thank you to all for tracking this down. > > > > > Christophe > > > pr91060.patch.txt > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index 820502a..4c7b5a8 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -12471,7 +12471,7 @@ neon_expand_vector_init (rtx target, rtx vals) > if (n_var == 1) > { > rtx copy = copy_rtx (vals); > - rtx index = GEN_INT (one_var); > + rtx index = GEN_INT (1 << one_var); > > /* Load constant part of vector, substitute neighboring value for > varying element. */ > @@ -12483,31 +12483,31 @@ neon_expand_vector_init (rtx target, rtx vals) > switch (mode) > { > case E_V8QImode: > - emit_insn (gen_neon_vset_lanev8qi (target, x, target, index)); > + emit_insn (gen_vec_setv8qi_internal (target, x, index, target)); > break; > case E_V16QImode: > - emit_insn (gen_neon_vset_lanev16qi (target, x, target, index)); > + emit_insn (gen_vec_setv16qi_internal (target, x, index, target)); > break; > case E_V4HImode: > - emit_insn (gen_neon_vset_lanev4hi (target, x, target, index)); > + emit_insn (gen_vec_setv4hi_internal (target, x, index, target)); > break; > case E_V8HImode: > - emit_insn (gen_neon_vset_lanev8hi (target, x, target, index)); > + emit_insn (gen_vec_setv8hi_internal (target, x, index, target)); > break; > case E_V2SImode: > - emit_insn (gen_neon_vset_lanev2si (target, x, target, index)); > + emit_insn (gen_vec_setv2si_internal (target, x, index, target)); > break; > case E_V4SImode: > - emit_insn (gen_neon_vset_lanev4si (target, x, target, index)); > + emit_insn (gen_vec_setv4si_internal (target, x, index, target)); > break; > case E_V2SFmode: > - emit_insn (gen_neon_vset_lanev2sf (target, x, target, index)); > + emit_insn (gen_vec_setv2sf_internal (target, x, index, target)); > break; > case E_V4SFmode: > - emit_insn (gen_neon_vset_lanev4sf (target, x, target, index)); > + emit_insn (gen_vec_setv4sf_internal (target, x, index, target)); > break; > case E_V2DImode: > - emit_insn (gen_neon_vset_lanev2di (target, x, target, index)); > + emit_insn (gen_vec_setv2di_internal (target, x, index, target)); > break; > default: > gcc_unreachable (); > > > Can we take the opportunity here to remove that switch statement and use the parametrised names machinery: > https://gcc.gnu.org/onlinedocs/gccint/Parameterized-Names.html#Parameterized-Names > > so that we can instead have one call to gen_vec_setv8hi_internal (mode, target, x, merge_mask, target) or something. Yes, that's what Richard posted in bugzilla, it's much nicer indeed. > Thanks, > Kyrill >