From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 48065 invoked by alias); 15 Jun 2015 22:11:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 48053 invoked by uid 89); 15 Jun 2015 22:11:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-qg0-f42.google.com Received: from mail-qg0-f42.google.com (HELO mail-qg0-f42.google.com) (209.85.192.42) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Mon, 15 Jun 2015 22:11:19 +0000 Received: by qgf75 with SMTP id 75so31893591qgf.1 for ; Mon, 15 Jun 2015 15:11:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:content-type; bh=35cJyVen0rBvkFkN5Gu/ZXh9oSh7OkOvR9PFWkb/zp8=; b=M/9gz07Zclre1zIu7OLIl5m7Sy5SinBV5tHEa1eSqZ5+AtoIrxL7XNUAOIvWJLr/KF 6iOZEreb8j+kx1rSxInZ47mUFp4OPUdpUG8h2m4FMRIpHyOtSZwhBGnqXIBqQ/PJV4W+ JkSmFbiTH2R5G31BOu0p+yHnTZsYg6+2lAscB79acDS6x4Z7yxkyaj6WjiEg5KB4914e rXRCaT0/Mp5+WaqgegO/Fq+AUe5JLG5DUYa0MMiL65RbDY8gey5TUdqDH3TP/6d2lvdV 6W7GeIyd0goOe6HaEVTtpXLu4oMVNVdI290mtkSoK3uV3Eoc585FWgylQn/FspunCcrR j31w== X-Gm-Message-State: ALoCoQnhrJZjaZ5IQp1uNN+ep8f7f+wDPTvgi5URFYZ5By51S0LBbp5YK7EyiBUl+r9zy5HxH7cb MIME-Version: 1.0 X-Received: by 10.140.235.147 with SMTP id g141mr39386175qhc.35.1434406276635; Mon, 15 Jun 2015 15:11:16 -0700 (PDT) Received: by 10.140.102.164 with HTTP; Mon, 15 Jun 2015 15:11:16 -0700 (PDT) In-Reply-To: <1432757747-4891-1-git-send-email-christophe.lyon@linaro.org> References: <1432757747-4891-1-git-send-email-christophe.lyon@linaro.org> Date: Mon, 15 Jun 2015 22:15:00 -0000 Message-ID: Subject: Re: [Patch ARM-AArch64/testsuite Neon intrinsics 00/20] Executable tests From: Christophe Lyon To: "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg01052.txt.bz2 Ping? On 27 May 2015 at 22:15, Christophe Lyon wrote: > This patch series is a follow-up to the tests I already contributed, > converted from my original testsuite. > > This series consists in 20 new patches, which can be committed > independently. For vrecpe, I added the setting of the "Flush-to-Zero" > FP flag, to force AArch64 to behave the same as ARM by default. > > This is the final batch, except for the vget_lane tests which I will > submit later. This should cover the subset of AdvSIMD intrinsics > common to ARMv7 and AArch64. > > Tested with qemu on arm*linux, aarch64-linux. > > 2015-05-27 Christophe Lyon > > * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h > (_ARM_FPSCR): Add FZ field. > (clean_results): Force FZ=1 on AArch64. > * gcc.target/aarch64/advsimd-intrinsics/vrecpe.c: New file. > * gcc.target/aarch64/advsimd-intrinsics/vrecps.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrev.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrshr_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vrsra_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vset_lane.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vshl_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vshll_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vshr_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vshrn_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vsra_n.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vtbX.c: Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Likewise. > > Christophe Lyon (20): > Add vrecpe tests. > Add vrecps tests. > Add vreinterpret tests. > Add vrev tests. > Add vrshl tests. > Add vshr_n tests. > Add vrshr_n tests. > Add vrshrn_n tests. > Add vrsqrte tests. > Add vrsqrts tests. > Add vrsra_n tests. > Add vset_lane tests. > Add vshll_n tests. > Add vshl_n tests. > Add vshrn_n tests. > Add vsra_n tests. > Add vst1_lane tests. > Add vstX_lane tests. > Add vtbX tests. > Add vtst tests. > > .../aarch64/advsimd-intrinsics/arm-neon-ref.h | 19 +- > .../gcc.target/aarch64/advsimd-intrinsics/vrecpe.c | 154 +++++ > .../gcc.target/aarch64/advsimd-intrinsics/vrecps.c | 117 ++++ > .../aarch64/advsimd-intrinsics/vreinterpret.c | 741 +++++++++++++++++++++ > .../gcc.target/aarch64/advsimd-intrinsics/vrev.c | 200 ++++++ > .../gcc.target/aarch64/advsimd-intrinsics/vrshl.c | 627 +++++++++++++++++ > .../aarch64/advsimd-intrinsics/vrshr_n.c | 504 ++++++++++++++ > .../aarch64/advsimd-intrinsics/vrshrn_n.c | 143 ++++ > .../aarch64/advsimd-intrinsics/vrsqrte.c | 157 +++++ > .../aarch64/advsimd-intrinsics/vrsqrts.c | 118 ++++ > .../aarch64/advsimd-intrinsics/vrsra_n.c | 553 +++++++++++++++ > .../aarch64/advsimd-intrinsics/vset_lane.c | 99 +++ > .../gcc.target/aarch64/advsimd-intrinsics/vshl_n.c | 96 +++ > .../aarch64/advsimd-intrinsics/vshll_n.c | 56 ++ > .../gcc.target/aarch64/advsimd-intrinsics/vshr_n.c | 95 +++ > .../aarch64/advsimd-intrinsics/vshrn_n.c | 70 ++ > .../gcc.target/aarch64/advsimd-intrinsics/vsra_n.c | 117 ++++ > .../aarch64/advsimd-intrinsics/vst1_lane.c | 93 +++ > .../aarch64/advsimd-intrinsics/vstX_lane.c | 578 ++++++++++++++++ > .../gcc.target/aarch64/advsimd-intrinsics/vtbX.c | 289 ++++++++ > .../gcc.target/aarch64/advsimd-intrinsics/vtst.c | 120 ++++ > 21 files changed, 4940 insertions(+), 6 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpe.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecps.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrev.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshl.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshr_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsra_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vset_lane.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshll_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshr_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshrn_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsra_n.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtbX.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c > > -- > 2.1.4 >