From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 86184 invoked by alias); 16 May 2017 13:21:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 86168 invoked by uid 89); 16 May 2017 13:21:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=no version=3.3.2 spammy=HX-Envelope-From:sk:christo X-HELO: mail-qk0-f171.google.com Received: from mail-qk0-f171.google.com (HELO mail-qk0-f171.google.com) (209.85.220.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 16 May 2017 13:21:22 +0000 Received: by mail-qk0-f171.google.com with SMTP id a72so128577805qkj.2 for ; Tue, 16 May 2017 06:21:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=qtAxkfoLDmrW0de0X61RqaaA532Q1cl3YC8Nh80JkYk=; b=fp76ZWBTZkfrczJBOpGXDb2D48/pCElfrJRE+FiimjZECQgtWFYu11Rfbp7ObQhyND CqNXlPi9AOYqFmMmxFEcVmGCrVpxaE095dT1jmPKf/fAdp57yUf26qsSV8XBtTWAzjOj qfXnPXkFX5vHGpaAsjinu4QZkQpEjp5d2v8oDDXRaoXeWr1D/9lhfEWiWvLzGNfA72r7 V9pnYsWDjTuC+j4zLNEJScW4rq4LuvI4z9nYgvOCqUrv3ioJUTJpqOvkTH/A06k8rgyw vFpYhudBmUDMefCFnsuBm3b/Qbr7JvvmzE5/D2mhcle492COQjw+7LOHdQVajli4Re9+ 5XZQ== X-Gm-Message-State: AODbwcDjRyGNAVKPZZT2pPwD9yVVcmVXgyFDIbDghT1jmG4gQ0HwGgPM LmGkVlVWAUcuN1V8NYVyQkxSfwJMLcaE X-Received: by 10.55.103.203 with SMTP id b194mr9684936qkc.55.1494940883668; Tue, 16 May 2017 06:21:23 -0700 (PDT) MIME-Version: 1.0 Received: by 10.140.104.85 with HTTP; Tue, 16 May 2017 06:21:23 -0700 (PDT) In-Reply-To: References: <57E543F8.4060605@foss.arm.com> <59196BB6.30104@foss.arm.com> From: Christophe Lyon Date: Tue, 16 May 2017 13:40:00 -0000 Message-ID: Subject: Re: [ARM] Enable FP16 vector arithmetic operations. To: Tamar Christina Cc: Kyrill Tkachov , Matthew Wahab , gcc-patches , nd , "nickc@redhat.com" , Richard Earnshaw , Ramana Radhakrishnan Content-Type: text/plain; charset="UTF-8" X-IsSubscribed: yes X-SW-Source: 2017-05/txt/msg01276.txt.bz2 Hi, On 16 May 2017 at 10:48, Tamar Christina wrote: > Hi Kyrill, >> >> Sorry for missing this. >> For the record you are referring to the patch at: >> https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01700.html >> >> This is ok and in line with what we do for the f32 intrinsics. >> My only concern was that we can do this only if >> __ARM_FEATURE_FP16_VECTOR_ARITHMETIC >> is defined from the architecture/fpu level, but these intrinsics are already >> gated on that in arm_neon.h. >> >> This is ok for trunk if a bootstrap and test run on arm-none-linux-gnueabihf >> with current trunk shows no issues. > > Thanks, bootstrapped and regtested now on arm-none-linux-gnueabihf and no issues. > I'll go ahead and commit then. > One of the new tests fails on arm-none-linux-gnueabi (non-hf) targets: FAIL: gcc.target/arm/armv8_2-fp16-neon-2.c scan-assembler-times vceq\\.f16\\td[0-9]+, d[0-0]+, #0 1 For instance when configured --with-cpu=cortex-a9. Christophe > Regards, > Tamar > >> >> Thanks, >> Kyrill >> >> > Tamar >> > ________________________________________ >> > From: gcc-patches-owner@gcc.gnu.org >> on >> > behalf of Matthew Wahab >> > Sent: Friday, September 23, 2016 4:02 PM >> > To: gcc-patches >> > Subject: [ARM] Enable FP16 vector arithmetic operations. >> > >> > Hello, >> > >> > Support for the ARMv8.2-A FP16 NEON arithmetic instructions was added >> > using non-standard names for the instruction patterns. This was needed >> > because the NEON floating point semantics meant that their use by the >> > compiler for HFmode arithmetic operations needed to be restricted. >> > This follows the implementation for 32-bit NEON intructions. >> > >> > As with the 32-bit instructions, the restriction on the HFmode >> > operation can be lifted when -funsafe-math-optimizations is enabled. >> > This patch does that, defining the standard pattern names addhf3, >> > subhf3, mulhf3 and fmahf3. >> > >> > This patch also updates the NEON intrinsics to use the arithmetic >> > operations when -ffast-math is enabled. This is to make keep the >> > 16-bit support consistent with the 32-bit supportd. It is needed so >> > that code using the f16 intrinsics are subject to the same >> > optimizations as code using the f32 intrinsics would be. >> > >> > Tested for arm-none-linux-gnueabihf with native bootstrap and make >> > check on ARMv8-A and for arm-none-eabi and armeb-none-eabi with >> > cross-compiled make check on an ARMv8.2-A emulator. >> > >> > Ok for trunk? >> > Matthew >> > >> > gcc/ >> > 2016-09-23 Matthew Wahab >> > >> > * config/arm/arm_neon.h (vadd_f16): Use standard arithmetic >> > operations in fast-math mode. >> > (vaddq_f16): Likewise. >> > (vmul_f16): Likewise. >> > (vmulq_f16): Likewise. >> > (vsub_f16): Likewise. >> > (vsubq_f16): Likewise. >> > * config/arm/neon.md (add3): New. >> > (sub3): New. >> > (fma:3): New. Also remove outdated comment. >> > (mul3): New. >> > >> > testsuite/ >> > 2016-09-23 Matthew Wahab >> > >> > * gcc.target/arm/armv8_2-fp16-arith-1.c: Expand comment. Update >> > expected output of vadd, vsub and vmul instructions. >> > * gcc.target/arm/armv8_2-fp16-arith-2.c: New. >> > * gcc.target/arm/armv8_2-fp16-neon-2.c: New. >> > * gcc.target/arm/armv8_2-fp16-neon-3.c: New. >