commit d50dfb233059bc5a110117047fe8f60d6580f095
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Thu Feb 8 14:52:02 2018 +0100

    [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
    
    Without this, when we are unwinding across a signal frame we can jump
    to an even address which leads to an exception.
    
    This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
    PC from the signal frame since the PC saved by the kernel has the LSB
    bit set to zero.
    
    2019-XX-XX  Christophe Lyon  <christophe.lyon@st.com>
    	Mickaël Guêné <mickael.guene@st.com>
    
    	libgcc/
    	* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
    	architecture.
    
    Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea

diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 9ba73e7..8313ee0 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
 	return _UVRSR_FAILED;
 
       vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__thumb__)
+      /* Force LSB bit since we always run thumb code.  */
+      if (regno == R_PC)
+	vrs->core.r[regno] |= 1;
+#endif
       return _UVRSR_OK;
 
     case _UVRSC_VFP: