From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 102441 invoked by alias); 12 May 2016 12:56:46 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 102426 invoked by uid 89); 12 May 2016 12:56:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.1 required=5.0 tests=AWL,BAYES_50,GAPPY_SUBJECT,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=no version=3.3.2 spammy=VRND, hfloat, sk:iab5f98, test_vrnd X-HELO: mail-qg0-f49.google.com Received: from mail-qg0-f49.google.com (HELO mail-qg0-f49.google.com) (209.85.192.49) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 12 May 2016 12:56:35 +0000 Received: by mail-qg0-f49.google.com with SMTP id 90so40172734qgz.1 for ; Thu, 12 May 2016 05:56:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc; bh=CQFip2iPPKGj/GETcygQyvT9BVx9lvermx1SoahDc+c=; b=I5QD/qIpUC49MnURIKU2XcS0ClXKIQQU/6Rk9Yi+K2AZubZnwqeLlidOCTIUyCfYl7 P9M/Il8pjXY20gcfHCHrNYtxuKgErf0dJux0pipu27sBUw4Yy5HEEjj4MuxbG+2/iyjW 0g0QTq7ZoCX2t6TAfJskLseXswSl9yGNqeUspwznCajzIB+h2A6dYn2Z67WM/X7xznnk s2w08NfZoT6Eg9i9HibcK8+HT3zqX+UASrBQww++w4Snmf2dqAiYa1ehRplX0el2yTwb ULJmahJbJRPnxsstFvPAyBsUteQWXKRbUyOwMeYx8h+F6MG9F8bKp3PtzRzyt5akI/qR F4kw== X-Gm-Message-State: AOPr4FXdhVFJpXtbF/hHzB3kOsWzQh++Vt3z62oTtnknZqqGN5GtxaB0hdBtDW+aQYyq1xhFXVpnK55exzICrVcW MIME-Version: 1.0 X-Received: by 10.140.19.4 with SMTP id 4mr9267377qgg.80.1463057793285; Thu, 12 May 2016 05:56:33 -0700 (PDT) Received: by 10.140.99.73 with HTTP; Thu, 12 May 2016 05:56:33 -0700 (PDT) In-Reply-To: <5734428F.5020102@foss.arm.com> References: <1462973041-7911-1-git-send-email-christophe.lyon@linaro.org> <1462973041-7911-10-git-send-email-christophe.lyon@linaro.org> <5734428F.5020102@foss.arm.com> Date: Thu, 12 May 2016 12:56:00 -0000 Message-ID: Subject: Re: [Patch ARM/AArch64 09/11] Add missing vrnd{,a,m,n,p,x} tests. From: Christophe Lyon To: Jiong Wang Cc: "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2016-05/txt/msg00906.txt.bz2 On 12 May 2016 at 10:45, Jiong Wang wrote: > > > On 11/05/16 14:23, Christophe Lyon wrote: >> >> 2016-05-02 Christophe Lyon >> >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c: New. >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc: >> New. >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c: >> New. >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c: >> New. >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c: >> New. >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c: >> New. >> * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c: >> New. >> >> Change-Id: Iab5f98dc4b15f9a2f61b622a9f62b207872f1737 >> >> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c >> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c >> new file mode 100644 >> index 0000000..5f492d4 >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c >> @@ -0,0 +1,16 @@ >> +/* { dg-require-effective-target arm_v8_neon_ok } */ >> +/* { dg-add-options arm_v8_neon } */ >> + >> +#include >> +#include "arm-neon-ref.h" >> +#include "compute-ref-data.h" >> + >> +/* Expected results. */ >> +VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 }; >> +VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000, >> + 0xc1600000, 0xc1500000 }; >> + >> +#define INSN vrnd >> +#define TEST_MSG "VRND" >> + >> +#include "vrndX.inc" >> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc >> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc >> new file mode 100644 >> index 0000000..629240d >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc >> @@ -0,0 +1,43 @@ >> +#define FNNAME1(NAME) exec_ ## NAME >> +#define FNNAME(NAME) FNNAME1 (NAME) >> + >> +void FNNAME (INSN) (void) >> +{ >> + /* vector_res = vrndX (vector), then store the result. */ >> +#define TEST_VRND2(INSN, Q, T1, T2, W, N) \ >> + VECT_VAR (vector_res, T1, W, N) = \ >> + INSN##Q##_##T2##W (VECT_VAR (vector, T1, W, N)); \ >> + vst1##Q##_##T2##W (VECT_VAR (result, T1, W, N), \ >> + VECT_VAR (vector_res, T1, W, N)) >> + >> + /* Two auxliary macros are necessary to expand INSN. */ >> +#define TEST_VRND1(INSN, Q, T1, T2, W, N) \ >> + TEST_VRND2 (INSN, Q, T1, T2, W, N) >> + >> +#define TEST_VRND(Q, T1, T2, W, N) \ >> + TEST_VRND1 (INSN, Q, T1, T2, W, N) >> + >> + DECL_VARIABLE (vector, float, 32, 2); >> + DECL_VARIABLE (vector, float, 32, 4); >> + >> + DECL_VARIABLE (vector_res, float, 32, 2); >> + DECL_VARIABLE (vector_res, float, 32, 4); >> + >> + clean_results (); >> + >> + VLOAD (vector, buffer, , float, f, 32, 2); >> + VLOAD (vector, buffer, q, float, f, 32, 4); >> + >> + TEST_VRND ( , float, f, 32, 2); >> + TEST_VRND (q, float, f, 32, 4); >> + >> + CHECK_FP (TEST_MSG, float, 32, 2, PRIx32, expected, ""); >> + CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected, ""); >> +} >> + >> +int >> +main (void) >> +{ >> + FNNAME (INSN) (); >> + return 0; >> +} >> > > Hi Christophe, > > I have a question on how test inputs are selected? > > For example vrndm is round to integral, towards minus infinity while vrnda > is to nearest with ties to even, has these differences been tested? > Hi Jiong, For this particular case, no, I didn't specifically chose input values to check these differences. This can be done as a follow-up? Thanks, Christophe > Thanks. > > Regards, > Jiong