From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x333.google.com (mail-ot1-x333.google.com [IPv6:2607:f8b0:4864:20::333]) by sourceware.org (Postfix) with ESMTPS id 1D9643940CF5 for ; Fri, 13 Mar 2020 08:10:03 +0000 (GMT) Received: by mail-ot1-x333.google.com with SMTP id t28so6558555ott.5 for ; Fri, 13 Mar 2020 01:10:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=QK+XAWhaGVZ1U+pk03sb+O6J9q88jLmgruomFtLdtpk=; b=DQStFs+nh9lU7tTnq81lNcUCHUDfEPTZfoY2rZpprWZ41Mo9lRgtexepoWZxJtGvP2 pphRYRTit/1nZHRcofw9G7g82ugzOz5phq47s2GAty8dFEgOvCxsOhexJoBMBY8r9CKx Z7rRE20B5Pq1Y+CFbL5zUxqANd0HP0YSf08NgdeecAVfP4qHQ7p6feSTNOAr/p1IbzDt tckSy1yYsJh5j/1AtGTFRMfgnabPn/qvQuZLintsnHvN14s4jVDEoORsRTyRo6eOlXqa 7Kwj4HFWlhiwsOpfC7uzXy4uLcVPpZDJgf6+DCUesxid3TWVcRU+ZKglB3w9pszZ7wwd N2mA== X-Gm-Message-State: ANhLgQ3I1HJYrDiMiafYYgEYMyeTxvR6Xs2SSTNXdOvD5OtI4Mtau1eT wBtWtxXBrkNNI7nRoHPSpOH99l5dIpZ/nrfLv+uXGg== X-Google-Smtp-Source: ADFU+vvoT4rjOAU+RE7M9UzCsDKWDK9nhvAg2putt8Zq10eKXGFsMKN4SZMt46H1Zdycvanz4z9h6fVDBqNulsMBLo4= X-Received: by 2002:a9d:4c8f:: with SMTP id m15mr6035798otf.273.1584087002338; Fri, 13 Mar 2020 01:10:02 -0700 (PDT) MIME-Version: 1.0 References: <10930ad518483e1d3d4fea149045802313cac45e.camel@redhat.com> <20200206135649.GZ22482@gate.crashing.org> <2a46a1ab3d68ce31d109ef9aedcc40e991498936.camel@redhat.com> <20200208164128.GZ22482@gate.crashing.org> <20200312182357.GI22482@gate.crashing.org> <5b32b386496fab79a509a837413a33569f524acf.camel@redhat.com> In-Reply-To: <5b32b386496fab79a509a837413a33569f524acf.camel@redhat.com> From: Christophe Lyon Date: Fri, 13 Mar 2020 09:09:51 +0100 Message-ID: Subject: Re: [RFA] [PR rtl-optimization/90275] Handle nop reg->reg copies in cse To: Jeff Law Cc: Segher Boessenkool , gcc-patches List Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Mar 2020 08:10:04 -0000 Hi, On Thu, 12 Mar 2020 at 23:12, Jeff Law via Gcc-patches wrote: > > On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote: > > On Thu, Mar 12, 2020 at 12:03:08PM -0600, Jeff Law wrote: > > > On Sat, 2020-02-08 at 10:41 -0600, Segher Boessenkool wrote: > > > > I don't think each stanza of code should use it's own "noop-ness", no. > > > Richard's patch is actually better than mine in that regard as it handles mem > > > and > > > reg nop moves in an indentical way. I don't think refactoring the cse.c code > > > is > > > advisable now though -- but I do want to fix the multiply-reported ICE on ARM > > > and > > > Richard's cse changes are the cleanest way to do that that I can see. > > > > It looks pretty simple, yeah... All of CSE is hopelessly fragile, but > > this patch does not make things worse. > > > > > > I don't know if this patch makes matters worse or not. It doesn't seem > > > > suitable for stage 4 though. And Richard said the cse.c part breaks > > > > rs6000, if that is true, yes I do object ;-) > > > The rs6000 port breakage is trivial to fix. In fact, I did so and ran it > > > through > > > my tester, which includes ppc64le and ppc64 a slew of *-elf targets x86 > > > native > > > and more. > > > > I don't see anything rs6000 below? Is it just this generic code? > > > > > @@ -5324,9 +5324,11 @@ cse_insn (rtx_insn *insn) > > > } > > > > > > /* Similarly, lots of targets don't allow no-op > > > - (set (mem x) (mem x)) moves. */ > > > + (set (mem x) (mem x)) moves. Even (set (reg x) (reg x)) > > > + might be impossible for certain registers (like CC registers). */ > > > else if (n_sets == 1 > > > - && MEM_P (trial) > > > + && ! CALL_P (insn) > > > + && (MEM_P (trial) || REG_P (trial)) > > > && MEM_P (dest) > > > && rtx_equal_p (trial, dest) > > > && !side_effects_p (dest) > > > > This adds the !CALL_P (no space btw) condition, why is that? > > > > (Is that CCmode reg-reg move comment about rs6000? Huh, we *do* have > > patterns for that, or *should* have at least!) > I fixed the extraneous whitespace and committed the change. > The new test fails on ARM: FAIL: gcc.c-torture/compile/pr90275.c -O3 -g (internal compiler error) during RTL pass: cse_local /gcc/testsuite/gcc.c-torture/compile/pr90275.c: In function 'e': /gcc/testsuite/gcc.c-torture/compile/pr90275.c:25:1: internal compiler error: in insert_regs, at cse.c:1128 0x15725bd insert_regs /gcc/cse.c:1128 0x1579731 cse_insn /gcc/cse.c:5957 0x157aff6 cse_extended_basic_block /gcc/cse.c:6615 0x157aff6 cse_main /gcc/cse.c:6794 0x157bc0d rest_of_handle_cse_after_global_opts /gcc/cse.c:7766 0x157bc0d execute /gcc/cse.c:7817 Please submit a full bug report, Is the patch supposed to fix all the ICEs on ARM? I see this with cross-compilers, it seems OK on native builds? (I can't find error reports about this on gcc-testresults) Christophe > THanks, > jeff > > >