From: Christophe Lyon <christophe.lyon@linaro.org>
To: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH][GCC][Arm]: MVE: Fix v[id]wdup's
Date: Tue, 7 Apr 2020 12:57:27 +0200 [thread overview]
Message-ID: <CAKdteObHsYAzbiO6sVn5L0muTKfAwuQMB=KpLDPZqFxdNcJb5Q@mail.gmail.com> (raw)
In-Reply-To: <48a85fe8-aeb1-4fd4-74d2-92fe172e2a6c@arm.com>
On Tue, 7 Apr 2020 at 12:40, Andre Vieira (lists)
<andre.simoesdiasvieira@arm.com> wrote:
>
> Hi,
>
> This patch fixes v[id]wdup intrinsics. They had two issues:
> 1) the predicated versions did not link the incoming inactive vector
> parameter to the output
> 2) The backend didn't enforce the wrap limit operand be in an odd register.
>
> 1) was fixed like we did for all other predicated intrinsics
> 2) requires a temporary hack where we pass the value in the top end of
> DImode operand. The proper fix would be to add a register CLASS but this
> interacted badly with other existing targets codegen. We will look to
> fix this properly in GCC 11.
>
> Regression tested on arm-none-eabi.
>
Hi Andre,
How did you find problem 1? I suspect you are using an internal
simulator since qemu does not support MVE yet?
And you probably have runtime tests to exhibit this failure?
Thanks,
Christophe
> Is this OK for trunk?
>
> gcc/ChangeLog:
> 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
>
> * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
> * config/arm/mve/md: Fix v[id]wdup patterns.
>
next prev parent reply other threads:[~2020-04-07 10:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-07 10:40 Andre Vieira (lists)
2020-04-07 10:57 ` Christophe Lyon [this message]
2020-04-07 14:04 ` Andre Vieira (lists)
2020-04-07 14:06 ` Kyrylo Tkachov
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