* [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
@ 2019-05-15 12:40 ` Christophe Lyon
2019-07-16 10:18 ` Richard Sandiford
2019-05-15 12:41 ` [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture Christophe Lyon
` (21 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:40 UTC (permalink / raw)
To: gcc-patches
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.opt: Add -mfdpic option.
* doc/invoke.texi: Add documentation for -mfdpic.
Change-Id: I0eabd1d11c9406fd4a43c4333689ebebbfcc4fe8
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 9067d49..2ed3bd5 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -306,3 +306,7 @@ Cost to assume for a branch insn.
mgeneral-regs-only
Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
Generate code which uses the core registers only (r0-r14).
+
+mfdpic
+Target Report Mask(FDPIC)
+Enable Function Descriptor PIC mode.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 29585cf..805d7cc 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -703,7 +703,8 @@ Objective-C and Objective-C++ Dialects}.
-mrestrict-it @gol
-mverbose-cost-dump @gol
-mpure-code @gol
--mcmse}
+-mcmse @gol
+-mfdpic}
@emph{AVR Options}
@gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol
@@ -17912,6 +17913,23 @@ MOVT instruction.
Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
Development Tools Engineering Specification", which can be found on
@url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
+
+@item -mfdpic
+@itemx -mno-fdpic
+@opindex mfdpic
+@opindex mno-fdpic
+Select the FDPIC ABI, which uses function descriptors to represent
+pointers to functions. When the compiler is configured for
+@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default
+and implies @option{-fPIE} if none of the PIC/PIE-related options is
+provided. On other targets, it only enables the FDPIC-specific code
+generation features, and the user should explicitly provide the
+PIC/PIE-related options as needed.
+
+The opposite @option{-mno-fdpic} option is useful (and required) to
+build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi})
+toolchain as the one used to build the userland programs.
+
@end table
@node AVR Options
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
@ 2019-05-15 12:40 Christophe Lyon
2019-05-15 12:40 ` [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support Christophe Lyon
` (22 more replies)
0 siblings, 23 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:40 UTC (permalink / raw)
To: gcc-patches
Hello,
This patch series implements the GCC contribution of the FDPIC ABI for
ARM targets.
This ABI enables to run Linux on ARM MMU-less cores and supports
shared libraries to reduce the memory footprint.
Without MMU, text and data segments relative distances are different
from one process to another, hence the need for a dedicated FDPIC
register holding the start address of the data segment. One of the
side effects is that function pointers require two words to be
represented: the address of the code, and the data segment start
address. These two words are designated as "Function Descriptor",
hence the "FD PIC" name.
On ARM, the FDPIC register is r9 [1], and the target name is
arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
ABI and the BFLAT file format; it does not support code sharing.
The -mfdpic option is enabled by default, and -mno-fdpic should be
used to build the Linux kernel.
This work was developed some time ago by STMicroelectronics, and was
presented during Linaro Connect SFO15 (September 2015). You can watch
the discussion and read the slides [2].
This presentation was related to the toolchain published on github [3],
which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
and qemu-2.3.0, and for which pre-built binaries are available [3].
The ABI itself is described in details in [1].
Our Linux kernel patches have been updated and committed by Nicolas
Pitre (Linaro) in July 2017. They are required so that the loader is
able to handle this new file type. Indeed, the ELF files are tagged
with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
well as the new relocations involved.
The binutils, QEMU and uclibc-ng patch series have been merged a few
months ago. [4][5][6]
This series provides support for architectures that support ARM and/or
Thumb-2 and has been tested on arm-linux-gnueabi without regression,
as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
a few more failures than arm-linux-gnueabi, but is quite functional.
I have also booted an STM32 board (stm32f469) which uses a cortex-m4
with linux-4.20.17 and ran successfully several tools.
Are the GCC patches OK for inclusion in master?
Changes between v4 and v5:
- rebased on top of recent gcc-10 master (April 26th, 2019)
- fixed handling of stack-protector combined patterns in FDPIC mode
Changes between v3 and v4:
- improved documentation (patch 1)
- emit an error message (sorry) if the target architecture does not
support arm nor thumb-2 modes (patch 4)
- handle Richard's comments on patch 4 (comments, unspec)
- added .align directive (patch 5)
- fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
- code factorization in patch 7
- typos/internal function name in patch 8
- improved patch 12
- dropped patch 16
- patch 20 introduces arm_arch*_thumb_ok effective targets to help
skip some tests
- I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
new tests, but a few regressions
(https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
- I compiled and executed several LTP tests to exercise pthreads and signals
- I wrote and executed a simple testcase to change the interaction
with __kernel_cmpxchg (ie. call the kernel helper rather than use an
implementation in libgcc as requested by Richard)
Changes between v2 and v3:
- added doc entry for -mfdpic new option
- took Kyrill's comments into account (use "Armv7" instead of "7",
code factorization, use preprocessor instead of hard-coding "r9",
remove leftover code for thumb1 support, fixed comments)
- rebase over recent trunk
- patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
14 (rebase), 19 (rebase)
Changes between v1 and v2:
- fix GNU coding style
- exit with an error for pre-Armv7
- use ACLE __ARM_ARCH and remove dead code for pre-Armv4
- remove unsupported attempts of pre-Armv7/thumb1 support
- add instructions in comments next to opcodes
- merge patches 11 and 13
- fixed protected visibility handling in patch 8
- merged legitimize_tls_address_fdpic and
legitimize_tls_address_not_fdpic as requested
Thanks,
Christophe.
[1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
[2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
[3] https://github.com/mickael-guene/fdpic_manifest
[4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
[5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
[6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
Christophe Lyon (21):
[ARM] FDPIC: Add -mfdpic option support
[ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
[ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
[ARM] FDPIC: Add support for FDPIC for arm architecture
[ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
[ARM] FDPIC: Add support for c++ exceptions
[ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
[ARM] FDPIC: Enforce local/global binding for function descriptors
[ARM] FDPIC: Add support for taking address of nested function
[ARM] FDPIC: Implement TLS support.
[ARM] FDPIC: Add support to unwind FDPIC signal frame
[ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
[ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
[ARM][testsuite] FDPIC: Skip unsupported tests
[ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
[ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
[ARM][testsuite] FDPIC: Handle *-*-uclinux*
[ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
[ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
[ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
FDPIC
[ARM] FDPIC: Handle stack-protector combined patterns
config/futex.m4 | 2 +-
config/tls.m4 | 2 +-
gcc/config.gcc | 13 +-
gcc/config/arm/arm-c.c | 2 +
gcc/config/arm/arm-protos.h | 1 +
gcc/config/arm/arm.c | 485 ++++++++++++++++++---
gcc/config/arm/arm.h | 16 +-
gcc/config/arm/arm.md | 151 ++++++-
gcc/config/arm/arm.opt | 4 +
gcc/config/arm/bpabi.h | 4 +-
gcc/config/arm/linux-eabi.h | 7 +-
gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
gcc/config/arm/unspecs.md | 1 +
gcc/doc/invoke.texi | 20 +-
gcc/ginclude/unwind-arm-common.h | 2 +-
gcc/testsuite/g++.dg/abi/forced.C | 2 +-
gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
gcc/testsuite/g++.dg/other/anon5.C | 1 +
gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
gcc/testsuite/gcc.dg/20020312-2.c | 1 +
gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
gcc/testsuite/gcc.dg/const-1.c | 2 +-
gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
gcc/testsuite/gcc.dg/pr33826.c | 3 +-
gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
gcc/testsuite/gcc.dg/pr67338.c | 2 +-
gcc/testsuite/gcc.dg/pr78185.c | 2 +-
gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
.../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
.../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
gcc/testsuite/gcc.target/arm/g2.c | 1 +
gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
.../gcc.target/arm/pragma_arch_switch_2.c | 1 +
gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
gcc/testsuite/lib/target-supports.exp | 10 +
libatomic/configure | 8 +-
libatomic/configure.tgt | 2 +-
libgcc/config.host | 4 +-
libgcc/config/arm/linux-atomic.c | 55 ++-
libgcc/config/arm/unwind-arm.c | 5 +
libgcc/config/arm/unwind-arm.h | 31 +-
libgcc/crtstuff.c | 18 +
libgcc/unwind-arm-common.inc | 216 +++++++++
libgcc/unwind-pe.h | 17 +
libitm/configure | 20 +-
libitm/configure.tgt | 2 +-
libsanitizer/configure.tgt | 3 +
libstdc++-v3/acinclude.m4 | 12 +-
libstdc++-v3/configure | 36 +-
libstdc++-v3/configure.host | 6 +-
libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
libtool.m4 | 14 +-
156 files changed, 1233 insertions(+), 219 deletions(-)
create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
2019-05-15 12:40 ` [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support Christophe Lyon
2019-05-15 12:41 ` [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture Christophe Lyon
@ 2019-05-15 12:41 ` Christophe Lyon
2019-05-15 13:55 ` Szabolcs Nagy
2019-05-15 12:41 ` [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts Christophe Lyon
` (19 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:41 UTC (permalink / raw)
To: gcc-patches
In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.
We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.
At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that even for static
link, we must specify the dynamic linker because the executable still
has to relocate itself at startup.
We also force 'now' binding since lazy binding is not supported.
We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
(CC1_SPEC): Use FDPIC_CC1_SPEC.
* config/arm/uclinuxfdpiceabi.h: New file.
libsanitizer/
* configure.tgt (arm*-*-uclinuxfdpiceabi): Sanitizers are
unsupported in this configuration.
Change-Id: If369e0a10bb916fd72e38f71498d3c640fa85c4c
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 67780fb..495cbc2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1177,6 +1177,11 @@ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
esac
tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi"
tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h arm/arm.h"
+ case $target in
+ arm*-*-uclinuxfdpiceabi)
+ tm_file="$tm_file arm/uclinuxfdpiceabi.h"
+ ;;
+ esac
# Generation of floating-point instructions requires at least ARMv5te.
if [ "$with_float" = "hard" -o "$with_float" = "softfp" ] ; then
target_cpu_cname="arm10e"
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index e1bacf4..6c25a1a 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -55,6 +55,8 @@
#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
"|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
+#define TARGET_FDPIC_ASM_SPEC ""
+
#define BE8_LINK_SPEC \
"%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \
" %{mbig-endian:big}" \
@@ -64,7 +66,7 @@
/* Tell the assembler to build BPABI binaries. */
#undef SUBTARGET_EXTRA_ASM_SPEC
#define SUBTARGET_EXTRA_ASM_SPEC \
- "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+ "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC TARGET_FDPIC_ASM_SPEC
#ifndef SUBTARGET_EXTRA_LINK_SPEC
#define SUBTARGET_EXTRA_LINK_SPEC ""
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 66ec0ea..67edb42 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -101,11 +101,14 @@
#undef ASAN_CC1_SPEC
#define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
+#define FDPIC_CC1_SPEC ""
+
#undef CC1_SPEC
#define CC1_SPEC \
- LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
+ LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
+ FDPIC_CC1_SPEC, \
GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
- ANDROID_CC1_SPEC)
+ ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
#define CC1PLUS_SPEC \
LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
new file mode 100644
index 0000000..43a17de
--- /dev/null
+++ b/gcc/config/arm/uclinuxfdpiceabi.h
@@ -0,0 +1,53 @@
+/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
+ Copyright (C) 2018 Free Software Foundation, Inc.
+ Contributed by STMicroelectronics.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
+ which also means we produce PIE code by default. */
+#undef FDPIC_CC1_SPEC
+#define FDPIC_CC1_SPEC \
+ "%{!mno-fdpic:-mfdpic %{!no-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
+
+/* Add --fdpic assembler flag by default. */
+#undef TARGET_FDPIC_ASM_SPEC
+#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+ config.gcc for big endian configurations. */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_FDPIC_LINKER_EMULATION "armelfb_linux_fdpiceabi"
+#else
+#define TARGET_FDPIC_LINKER_EMULATION "armelf_linux_fdpiceabi"
+#endif
+
+/* Unless we generate a shared library or a relocatable object, we
+ force -pie. */
+/* Even with -static, we have to define the dynamic-linker, as we
+ have some relocations to resolve at load time. */
+#undef SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC \
+ "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
+ "%{!shared:%{!r: -pie}} \
+ %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
+ "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
+ "%{!r:%{!mno-fdpic: -z now}}"
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
+ LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
index b241ddb..c38b3f4 100644
--- a/libsanitizer/configure.tgt
+++ b/libsanitizer/configure.tgt
@@ -45,6 +45,9 @@ case "${target}" in
;;
sparc*-*-solaris2.11*)
;;
+ arm*-*-uclinuxfdpiceabi)
+ UNSUPPORTED=1
+ ;;
arm*-*-linux*)
;;
mips*64*-*-linux*)
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (3 preceding siblings ...)
2019-05-15 12:41 ` [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts Christophe Lyon
@ 2019-05-15 12:41 ` Christophe Lyon
2019-07-12 6:49 ` Richard Sandiford
2019-05-15 12:42 ` [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions Christophe Lyon
` (17 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:41 UTC (permalink / raw)
To: gcc-patches
In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* libgcc/crtstuff.c: Add support for FDPIC.
Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
index 4927a9f..159b461 100644
--- a/libgcc/crtstuff.c
+++ b/libgcc/crtstuff.c
@@ -429,9 +429,18 @@ __do_global_dtors_aux (void)
#ifdef FINI_SECTION_ASM_OP
CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
#elif defined (FINI_ARRAY_SECTION_ASM_OP)
+#if defined(__FDPIC__)
+__asm__(
+ " .section .fini_array\n"
+ " .align 2\n"
+ " .word __do_global_dtors_aux\n"
+);
+asm (TEXT_SECTION_ASM_OP);
+#else /* defined(__FDPIC__) */
static func_ptr __do_global_dtors_aux_fini_array_entry[]
__attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
= { __do_global_dtors_aux };
+#endif /* defined(__FDPIC__) */
#else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
static void __attribute__((used))
__do_global_dtors_aux_1 (void)
@@ -473,9 +482,18 @@ frame_dummy (void)
#ifdef __LIBGCC_INIT_SECTION_ASM_OP__
CRT_CALL_STATIC_FUNCTION (__LIBGCC_INIT_SECTION_ASM_OP__, frame_dummy)
#else /* defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
+#if defined(__FDPIC__)
+__asm__(
+ " .section .init_array\n"
+ " .align 2\n"
+ " .word frame_dummy\n"
+);
+asm (TEXT_SECTION_ASM_OP);
+#else /* defined(__FDPIC__) */
static func_ptr __frame_dummy_init_array_entry[]
__attribute__ ((__used__, section(".init_array"), aligned(sizeof(func_ptr))))
= { frame_dummy };
+#endif /* defined(__FDPIC__) */
#endif /* !defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
#endif /* USE_EH_FRAME_REGISTRY || USE_TM_CLONE_REGISTRY */
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
2019-05-15 12:40 ` [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support Christophe Lyon
@ 2019-05-15 12:41 ` Christophe Lyon
2019-07-16 12:33 ` Richard Sandiford
2019-05-15 12:41 ` [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided Christophe Lyon
` (20 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:41 UTC (permalink / raw)
To: gcc-patches
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.
When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
FDPIC_REGNUM.
(arm_function_ok_for_sibcall): Disable sibcall optimization if we
have no decl or go through PLT.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
Define. (FDPIC_REGNUM): New define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(*restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
Change-Id: I8fb1a6b85ace672184013568c5d28fbda2f7fda4
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 6e256ee..34695fa 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
builtin_define ("__ARM_EABI__");
}
+ def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+
def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 485bc68..272968a 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
extern int arm_const_double_inline_cost (rtx);
extern bool arm_const_double_by_parts (rtx);
extern bool arm_const_double_by_immediates (rtx);
+extern rtx arm_load_function_descriptor (rtx funcdesc);
extern void arm_emit_call_insn (rtx, rtx, bool);
bool detect_cmse_nonsecure_call (tree);
extern const char *output_call (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 45abcd8..d9397b5 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3485,6 +3485,15 @@ arm_option_override (void)
if (flag_pic && TARGET_VXWORKS_RTP)
arm_pic_register = 9;
+ /* If in FDPIC mode then force arm_pic_register to be r9. */
+ if (TARGET_FDPIC)
+ {
+ arm_pic_register = FDPIC_REGNUM;
+ if (! TARGET_ARM && ! TARGET_THUMB2)
+ sorry ("FDPIC mode is supported on architecture versions that "
+ "support ARM or Thumb-2 only.");
+ }
+
if (arm_pic_register_string != NULL)
{
int pic_register = decode_reg_name (arm_pic_register_string);
@@ -7295,6 +7304,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
if (cfun->machine->sibcall_blocked)
return false;
+ if (TARGET_FDPIC)
+ {
+ /* In FDPIC, never tailcall something for which we have no decl:
+ the target function could be in a different module, requiring
+ a different FDPIC register value. */
+ if (decl == NULL)
+ return false;
+
+ /* Don't tailcall if we go through the PLT since the FDPIC
+ register is then corrupted and we don't restore it after
+ static function calls. */
+ if (!targetm.binds_local_p (decl))
+ return false;
+ }
+
/* Never tailcall something if we are generating code for Thumb-1. */
if (TARGET_THUMB1)
return false;
@@ -7711,7 +7735,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
{
rtx l1, labelno, pic_tmp, pic_rtx;
- if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
+ if (crtl->uses_pic_offset_table == 0
+ || TARGET_SINGLE_PIC_BASE
+ || TARGET_FDPIC)
return;
gcc_assert (flag_pic);
@@ -7780,28 +7806,142 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
emit_use (pic_reg);
}
+/* Try to determine whether an object, referenced via ORIG, will be
+ placed in the text or data segment. This is used in FDPIC mode, to
+ decide which relocations to use when accessing ORIG. IS_READONLY
+ is set to true if ORIG is a read-only location, false otherwise.
+ Return true if we could determine the location of ORIG, false
+ otherwise. IS_READONLY is valid only when we return true. */
+static bool
+arm_is_segment_info_known (rtx orig, bool *is_readonly)
+{
+ bool res = false;
+
+ *is_readonly = false;
+
+ if (GET_CODE (orig) == LABEL_REF)
+ {
+ res = true;
+ *is_readonly = true;
+ }
+ else if (SYMBOL_REF_P (orig))
+ {
+ if (CONSTANT_POOL_ADDRESS_P (orig))
+ {
+ res = true;
+ *is_readonly = true;
+ }
+ else if (SYMBOL_REF_LOCAL_P (orig)
+ && !SYMBOL_REF_EXTERNAL_P (orig)
+ && SYMBOL_REF_DECL (orig)
+ && (!DECL_P (SYMBOL_REF_DECL (orig))
+ || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
+ {
+ tree decl = SYMBOL_REF_DECL (orig);
+ tree init = (TREE_CODE (decl) == VAR_DECL)
+ ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
+ ? decl : 0;
+ int reloc = 0;
+ bool named_section, readonly;
+
+ if (init && init != error_mark_node)
+ reloc = compute_reloc_for_constant (init);
+
+ named_section = TREE_CODE (decl) == VAR_DECL
+ && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
+ readonly = decl_readonly_section (decl, reloc);
+
+ /* We don't know where the link script will put a named
+ section, so return false in such a case. */
+ res = !named_section;
+
+ if (!named_section)
+ *is_readonly = readonly;
+ }
+ else
+ {
+ /* We don't know. */
+ res = false;
+ }
+ }
+ else
+ gcc_unreachable ();
+
+ return res;
+}
+
/* Generate code to load the address of a static var when flag_pic is set. */
static rtx_insn *
arm_pic_static_addr (rtx orig, rtx reg)
{
rtx l1, labelno, offset_rtx;
+ rtx_insn *insn;
gcc_assert (flag_pic);
- /* We use an UNSPEC rather than a LABEL_REF because this label
- never appears in the code stream. */
- labelno = GEN_INT (pic_labelno++);
- l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- l1 = gen_rtx_CONST (VOIDmode, l1);
+ bool is_readonly = false;
+ bool info_known = false;
- /* On the ARM the PC register contains 'dot + 8' at the time of the
- addition, on the Thumb it is 'dot + 4'. */
- offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
- offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
- UNSPEC_SYMBOL_OFFSET);
- offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig))
+ info_known = arm_is_segment_info_known (orig, &is_readonly);
- return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig)
+ && !info_known)
+ {
+ /* We don't know where orig is stored, so we have be
+ pessimistic and use a GOT relocation. */
+ rtx pat;
+ rtx mem;
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ pat = gen_calculate_pic_address (reg, pic_reg, orig);
+
+ /* Make the MEM as close to a constant as possible. */
+ mem = SET_SRC (pat);
+ gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
+ MEM_READONLY_P (mem) = 1;
+ MEM_NOTRAP_P (mem) = 1;
+
+ insn = emit_insn (pat);
+ }
+ else if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && (SYMBOL_REF_FUNCTION_P (orig)
+ || (info_known && !is_readonly)))
+ {
+ /* We use the GOTOFF relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
+ emit_insn (gen_movsi (reg, l1));
+ insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
+ }
+ else
+ {
+ /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
+ PC-relative access. */
+ /* We use an UNSPEC rather than a LABEL_REF because this label
+ never appears in the code stream. */
+ labelno = GEN_INT (pic_labelno++);
+ l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ l1 = gen_rtx_CONST (VOIDmode, l1);
+
+ /* On the ARM the PC register contains 'dot + 8' at the time of the
+ addition, on the Thumb it is 'dot + 4'. */
+ offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
+ offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
+ UNSPEC_SYMBOL_OFFSET);
+ offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
+
+ insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
+ labelno));
+ }
+
+ return insn;
}
/* Return nonzero if X is valid as an ARM state addressing register. */
@@ -16112,9 +16252,36 @@ get_jump_table_size (rtx_jump_table_data *insn)
return 0;
}
+/* Emit insns to load the function address from FUNCDESC (an FDPIC
+ function descriptor) into a register and the GOT address into the
+ FDPIC register, returning an rtx for the register holding the
+ function address. */
+
+rtx
+arm_load_function_descriptor (rtx funcdesc)
+{
+ rtx fnaddr_reg = gen_reg_rtx (Pmode);
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+ rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+ rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
+
+ emit_move_insn (fnaddr_reg, fnaddr);
+ /* The ABI requires the entry point address to be loaded first, so
+ prevent the load from being moved after that of the GOT
+ address. */
+ XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
+ gen_rtvec (2, pic_reg, gotaddr),
+ UNSPEC_PIC_RESTORE);
+ XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gotaddr);
+ XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, pic_reg);
+ emit_insn (par);
+
+ return fnaddr_reg;
+}
+
/* Return the maximum amount of padding that will be inserted before
label LABEL. */
-
static HOST_WIDE_INT
get_label_padding (rtx label)
{
@@ -23069,9 +23236,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
&& (!SYMBOL_REF_LOCAL_P (x)
|| (SYMBOL_REF_DECL (x)
? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
- fputs ("(GOT)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTFUNCDESC)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
else
- fputs ("(GOTOFF)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTOFFFUNCDESC)", asm_out_file);
+ else
+ {
+ bool is_readonly;
+
+ if (arm_is_segment_info_known (x, &is_readonly))
+ fputs ("(GOTOFF)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
+ }
+ }
+
+ /* For FDPIC we also have to mark symbol for .data section. */
+ if (TARGET_FDPIC
+ && NEED_GOT_RELOC
+ && flag_pic
+ && !making_const_table
+ && SYMBOL_REF_P (x))
+ {
+ if (SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(FUNCDESC)", asm_out_file);
}
fputc ('\n', asm_out_file);
return true;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 4866e1e..7b50ef5 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -892,6 +892,9 @@ extern int arm_arch_cmse;
Pascal), so the following is not true. */
#define STATIC_CHAIN_REGNUM 12
+/* r9 is the FDPIC register (base register for GOT and FUNCDESC accesses). */
+#define FDPIC_REGNUM 9
+
/* Define this to be where the real frame pointer is if it is not possible to
work out the offset between the frame pointer and the automatic variables
until after register allocation has taken place. FRAME_POINTER_REGNUM
@@ -1948,6 +1951,10 @@ extern unsigned arm_pic_register;
data addresses in memory. */
#define PIC_OFFSET_TABLE_REGNUM arm_pic_register
+/* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT
+ entries would need to handle saving and restoring it). */
+#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC
+
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. One exception is
UNSPEC_TLS, which is always PIC. */
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 0aecd03..9036255 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8127,6 +8127,23 @@
rtx callee, pat;
tree addr = MEM_EXPR (operands[0]);
+ /* Force FDPIC register (r9) before call. */
+ if (TARGET_FDPIC)
+ {
+ /* No need to update r9 if calling a static function.
+ In other words: set r9 for indirect or non-local calls. */
+ callee = XEXP (operands[0], 0);
+ if (!SYMBOL_REF_P (callee)
+ || !SYMBOL_REF_LOCAL_P (callee)
+ || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
+ {
+ emit_insn (gen_blockage ());
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
+ emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
+ }
+ }
+
/* In an untyped call, we can get NULL for operand 2. */
if (operands[2] == NULL_RTX)
operands[2] = const0_rtx;
@@ -8140,6 +8157,13 @@
: !REG_P (callee))
XEXP (operands[0], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
+ {
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[0], 0)
+ = arm_load_function_descriptor (XEXP (operands[0], 0));
+ }
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_internal (operands[0], operands[1],
@@ -8151,10 +8175,38 @@
pat = gen_call_internal (operands[0], operands[1], operands[2]);
arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ /* No need to update r9 if calling a static function. */
+ if (!SYMBOL_REF_P (callee)
+ || !SYMBOL_REF_LOCAL_P (callee)
+ || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
+ {
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
+ emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
+ emit_insn (gen_blockage ());
+ }
+ }
DONE;
}"
)
+(define_insn "*restore_pic_register_after_call"
+ [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
+ (match_operand:SI 1 "nonimmediate_operand" "r,m")]
+ UNSPEC_PIC_RESTORE)
+ (use (match_dup 1))
+ (clobber (match_dup 0))])
+ ]
+ ""
+ "@
+ mov\t%0, %1
+ ldr\t%0, %1"
+)
+
(define_expand "call_internal"
[(parallel [(call (match_operand 0 "memory_operand" "")
(match_operand 1 "general_operand" ""))
@@ -8215,6 +8267,30 @@
rtx pat, callee;
tree addr = MEM_EXPR (operands[1]);
+ /* Force FDPIC register (r9) before call. */
+ if (TARGET_FDPIC)
+ {
+ /* No need to update the FDPIC register (r9) if calling a static function.
+ In other words: set r9 for indirect or non-local calls. */
+ callee = XEXP (operands[1], 0);
+ if (!SYMBOL_REF_P (callee)
+ || !SYMBOL_REF_LOCAL_P (callee)
+ || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
+ {
+ rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg =
+ get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
+ gen_rtvec (2, fdpic_reg, initial_fdpic_reg),
+ UNSPEC_PIC_RESTORE);
+ XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
+ XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
+ emit_insn (par);
+ }
+ }
+
/* In an untyped call, we can get NULL for operand 2. */
if (operands[3] == 0)
operands[3] = const0_rtx;
@@ -8228,6 +8304,14 @@
: !REG_P (callee))
XEXP (operands[1], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC
+ && !SYMBOL_REF_P (XEXP (operands[1], 0)))
+ {
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[1], 0)
+ = arm_load_function_descriptor (XEXP (operands[1], 0));
+ }
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_value_internal (operands[0], operands[1],
@@ -8240,6 +8324,28 @@
operands[2], operands[3]);
arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
}
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ /* No need to update r9 if calling a static function. */
+ if (!SYMBOL_REF_P (callee)
+ || !SYMBOL_REF_LOCAL_P (callee)
+ || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
+ {
+ rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg =
+ get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
+ gen_rtvec (2, fdpic_reg, initial_fdpic_reg),
+ UNSPEC_PIC_RESTORE);
+ XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
+ XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
+ emit_insn (par);
+ }
+ }
+
DONE;
}"
)
@@ -8582,7 +8688,7 @@
(const_int 0))
(match_operand 1 "" "")
(match_operand 2 "" "")])]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
@@ -8649,7 +8755,7 @@
(define_expand "untyped_return"
[(match_operand:BLK 0 "memory_operand" "")
(match_operand 1 "" "")]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 174bcc5..bda35d5 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -89,6 +89,7 @@
UNSPEC_SP_SET ; Represent the setting of stack protector's canary
UNSPEC_SP_TEST ; Represent the testing of stack protector's canary
; against the guard.
+ UNSPEC_PIC_RESTORE ; Use to restore fdpic register
])
(define_c_enum "unspec" [
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (2 preceding siblings ...)
2019-05-15 12:41 ` [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided Christophe Lyon
@ 2019-05-15 12:41 ` Christophe Lyon
2019-07-12 7:44 ` Richard Sandiford
2019-05-15 12:41 ` [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation Christophe Lyon
` (18 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:41 UTC (permalink / raw)
To: gcc-patches
The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order the enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.
In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.
In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
config/
* futex.m4: Handle *-uclinux*.
* tls.m4 (GCC_CHECK_TLS): Likewise.
gcc/
* config.gcc: Handle *-*-uclinuxfdpiceabi.
libatomic/
* configure.tgt: Handle arm*-*-uclinux*.
* configure: Regenerate.
libgcc/
* config.host: Handle *-*-uclinuxfdpiceabi.
libitm/
* configure.tgt: Handle *-*-uclinux*.
* configure: Regenerate.
libstdc++-v3/
* acinclude.m4: Handle uclinux*.
* configure: Regenerate.
* configure.host: Handle uclinux*
* libtool.m4: Handle uclinux*.
Change-Id: I6a1fdcd9847d8a82179a214612a3474c1f492916
diff --git a/config/futex.m4 b/config/futex.m4
index e95144d..4dffe15 100644
--- a/config/futex.m4
+++ b/config/futex.m4
@@ -9,7 +9,7 @@ AC_DEFUN([GCC_LINUX_FUTEX],[dnl
GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
permit yes|no|default)
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
diff --git a/config/tls.m4 b/config/tls.m4
index 1a5fc59..a487aa4 100644
--- a/config/tls.m4
+++ b/config/tls.m4
@@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
dnl Shared library options may depend on the host; this check
dnl is only known to be needed for GNU/Linux.
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
diff --git a/gcc/config.gcc b/gcc/config.gcc
index c7a464c..67780fb 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -776,7 +776,7 @@ case ${target} in
*-*-fuchsia*)
native_system_header_dir=/include
;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
extra_options="$extra_options gnu-user.opt"
gas=yes
gnu_ld=yes
@@ -785,7 +785,7 @@ case ${target} in
esac
tmake_file="t-slibgcc"
case $target in
- *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
+ *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
:;;
*-*-gnu*)
native_system_header_dir=/include
@@ -805,7 +805,7 @@ case ${target} in
*-*-*android*)
tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC"
;;
- *-*-*uclibc*)
+ *-*-*uclibc* | *-*-uclinuxfdpiceabi)
tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
;;
*-*-*musl*)
@@ -1167,7 +1167,7 @@ arm*-*-netbsdelf*)
tmake_file="${tmake_file} arm/t-arm"
target_cpu_cname="strongarm"
;;
-arm*-*-linux-*) # ARM GNU/Linux with ELF
+arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
extra_options="${extra_options} linux-android.opt"
case $target in
diff --git a/libatomic/configure b/libatomic/configure
index e7076a0..10b0287 100755
--- a/libatomic/configure
+++ b/libatomic/configure
@@ -6055,7 +6055,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -8540,7 +8540,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
lt_prog_compiler_static='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -9135,7 +9135,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -10666,7 +10666,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index ecbb7d3..38e77ce 100644
--- a/libatomic/configure.tgt
+++ b/libatomic/configure.tgt
@@ -124,7 +124,7 @@ case "${target}" in
config_path="${config_path} linux/aarch64 posix"
;;
- arm*-*-linux*)
+ arm*-*-linux* | arm*-*-uclinux*)
# OS support for atomic primitives.
config_path="${config_path} linux/arm posix"
;;
diff --git a/libgcc/config.host b/libgcc/config.host
index 91abc84..facca2a 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -245,7 +245,7 @@ case ${host} in
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-fuchsia"
extra_parts="crtbegin.o crtend.o"
;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-gld t-slibgcc-elf-ver t-linux"
extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
if test x$enable_vtable_verify = xyes; then
@@ -435,7 +435,7 @@ arm*-*-fuchsia*)
arm*-*-netbsdelf*)
tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
;;
-arm*-*-linux*) # ARM GNU/Linux with ELF
+arm*-*-linux* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix t-crtfm"
tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc"
tm_file="$tm_file arm/bpabi-lib.h"
diff --git a/libitm/configure b/libitm/configure
index fb742d7..7b4c749 100644
--- a/libitm/configure
+++ b/libitm/configure
@@ -6731,7 +6731,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -9217,7 +9217,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
lt_prog_compiler_static='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -9812,7 +9812,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -11343,7 +11343,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -13244,7 +13244,7 @@ if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
inherit_rpath_CXX=yes
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@@ -13831,7 +13831,7 @@ interix[3-9]*)
postdeps_CXX=
;;
-linux*)
+linux* | uclinux*)
case `$CC -V 2>&1 | sed 5q` in
*Sun\ C*)
# Sun C++ 5.9
@@ -14082,7 +14082,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
;;
esac
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@@ -15003,7 +15003,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -16468,7 +16468,7 @@ fi
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
@@ -16591,7 +16591,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
diff --git a/libitm/configure.tgt b/libitm/configure.tgt
index 4c0b602..eea865d 100644
--- a/libitm/configure.tgt
+++ b/libitm/configure.tgt
@@ -127,7 +127,7 @@ config_path="$ARCH posix generic"
# Other system configury
case "${target}" in
- *-*-linux*)
+ *-*-linux* | *-*-uclinux*)
if test "$enable_linux_futex" = yes; then
config_path="linux/$ARCH linux $config_path"
fi
diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
index 84258d8..cb0fdc5 100644
--- a/libstdc++-v3/acinclude.m4
+++ b/libstdc++-v3/acinclude.m4
@@ -1404,7 +1404,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
ac_has_nanosleep=yes
ac_has_sched_yield=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
AC_MSG_CHECKING([for at least GNU libc 2.17])
AC_TRY_COMPILE(
[#include <features.h>],
@@ -1526,7 +1526,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
if test x"$ac_has_clock_monotonic" != x"yes"; then
case ${target_os} in
- linux*)
+ linux* | uclinux*)
AC_MSG_CHECKING([for clock_gettime syscall])
AC_TRY_COMPILE(
[#include <unistd.h>
@@ -2415,7 +2415,7 @@ AC_DEFUN([GLIBCXX_ENABLE_CLOCALE], [
# Default to "generic".
if test $enable_clocale_flag = auto; then
case ${target_os} in
- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_clocale_flag=gnu
;;
darwin*)
@@ -2661,7 +2661,7 @@ AC_DEFUN([GLIBCXX_ENABLE_ALLOCATOR], [
# Default to "new".
if test $enable_libstdcxx_allocator_flag = auto; then
case ${target_os} in
- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_allocator_flag=new
;;
*)
@@ -4361,7 +4361,7 @@ AC_DEFUN([GLIBCXX_ENABLE_FILESYSTEM_TS], [
freebsd*|netbsd*|openbsd*|dragonfly*|darwin*)
enable_libstdcxx_filesystem_ts=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_filesystem_ts=yes
;;
rtems*)
@@ -4543,7 +4543,7 @@ dnl
AC_MSG_CHECKING([for sendfile that can copy files])
AC_CACHE_VAL(glibcxx_cv_sendfile, [dnl
case "${target_os}" in
- gnu* | linux* | solaris*)
+ gnu* | linux* | solaris* | uclinux*)
GCC_TRY_COMPILE_OR_LINK(
[#include <sys/sendfile.h>],
[sendfile(1, 2, (off_t*)0, sizeof 1);],
diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure
index 7d134a0..91873b8 100755
--- a/libstdc++-v3/configure
+++ b/libstdc++-v3/configure
@@ -6652,7 +6652,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -9003,7 +9003,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
lt_prog_compiler_static='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -9598,7 +9598,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -11138,7 +11138,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -13063,7 +13063,7 @@ if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
inherit_rpath_CXX=yes
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@@ -13650,7 +13650,7 @@ interix[3-9]*)
postdeps_CXX=
;;
-linux*)
+linux* | uclinux*)
case `$CC -V 2>&1 | sed 5q` in
*Sun\ C*)
# Sun C++ 5.9
@@ -13901,7 +13901,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
;;
esac
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@@ -14822,7 +14822,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -16143,7 +16143,7 @@ fi
# Default to "generic".
if test $enable_clocale_flag = auto; then
case ${target_os} in
- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_clocale_flag=gnu
;;
darwin*)
@@ -16560,7 +16560,7 @@ fi
# Default to "new".
if test $enable_libstdcxx_allocator_flag = auto; then
case ${target_os} in
- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_allocator_flag=new
;;
*)
@@ -20834,7 +20834,7 @@ ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
ac_has_nanosleep=yes
ac_has_sched_yield=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for at least GNU libc 2.17" >&5
$as_echo_n "checking for at least GNU libc 2.17... " >&6; }
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -21334,7 +21334,7 @@ $as_echo "$ac_has_nanosleep" >&6; }
if test x"$ac_has_clock_monotonic" != x"yes"; then
case ${target_os} in
- linux*)
+ linux* | uclinux*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for clock_gettime syscall" >&5
$as_echo_n "checking for clock_gettime syscall... " >&6; }
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -28220,7 +28220,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
@@ -53895,7 +53895,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
@@ -60082,7 +60082,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
@@ -78725,7 +78725,7 @@ fi
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
@@ -80354,7 +80354,7 @@ $as_echo_n "checking whether to build Filesystem TS support... " >&6; }
freebsd*|netbsd*|openbsd*|dragonfly*|darwin*)
enable_libstdcxx_filesystem_ts=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_filesystem_ts=yes
;;
rtems*)
@@ -80906,7 +80906,7 @@ $as_echo_n "checking for sendfile that can copy files... " >&6; }
$as_echo_n "(cached) " >&6
else
case "${target_os}" in
- gnu* | linux* | solaris*)
+ gnu* | linux* | solaris* | uclinux*)
if test x$gcc_no_link = xyes; then
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
/* end confdefs.h. */
diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
index f2ff129..ae156fc 100644
--- a/libstdc++-v3/configure.host
+++ b/libstdc++-v3/configure.host
@@ -264,7 +264,7 @@ case "${host_os}" in
linux-musl*)
os_include_dir="os/generic"
;;
- gnu* | linux* | kfreebsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | uclinux*)
if [ "$uclibc" = "yes" ]; then
os_include_dir="os/uclibc"
elif [ "$bionic" = "yes" ]; then
@@ -327,7 +327,7 @@ esac
# Set any OS-dependent and CPU-dependent bits.
# THIS TABLE IS SORTED. KEEP IT THAT WAY.
case "${host}" in
- *-*-linux*)
+ *-*-linux* | *-*-uclinux*)
case "${host_cpu}" in
i[567]86)
abi_baseline_pair=i486-linux-gnu
@@ -361,7 +361,7 @@ case "${host}" in
fi
esac
case "${host}" in
- arm*-*-linux-*)
+ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi)
port_specific_symbol_files="\$(srcdir)/../config/os/gnu-linux/arm-eabi-extra.ver"
;;
esac
diff --git a/libtool.m4 b/libtool.m4
index 8966762..afd3f05 100644
--- a/libtool.m4
+++ b/libtool.m4
@@ -2449,7 +2449,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -3089,7 +3089,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -3734,7 +3734,7 @@ m4_if([$1], [CXX], [
;;
esac
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@@ -4032,7 +4032,7 @@ m4_if([$1], [CXX], [
_LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -4449,7 +4449,7 @@ _LT_EOF
_LT_TAGVAR(archive_expsym_cmds, $1)='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -5946,7 +5946,7 @@ if test "$_lt_caught_CXX_error" != yes; then
_LT_TAGVAR(inherit_rpath, $1)=yes
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@@ -6598,7 +6598,7 @@ interix[[3-9]]*)
_LT_TAGVAR(postdeps,$1)=
;;
-linux*)
+linux* | uclinux*)
case `$CC -V 2>&1 | sed 5q` in
*Sun\ C*)
# Sun C++ 5.9
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (4 preceding siblings ...)
2019-05-15 12:41 ` [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation Christophe Lyon
@ 2019-05-15 12:42 ` Christophe Lyon
2019-08-30 9:31 ` Kyrill Tkachov
2019-05-15 12:42 ` [ARM/FDPIC v5 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only Christophe Lyon
` (16 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:42 UTC (permalink / raw)
To: gcc-patches
The main difference with existing support is that function addresses
are function descriptor addresses instead. This means that all code
dealing with function pointers now has to cope with function
descriptors instead.
For the same reason, Linux kernel helpers can no longer be called by
dereferencing their address, so we implement wrappers that directly
call the kernel helpers.
When restoring a function address, we also have to restore the FDPIC
register value (r9).
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
field.
(FDPIC_REGNUM): New define.
libgcc/
* config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
(__kernel_dmb): Likewise.
(__fdpic_cmpxchg): New function.
(__fdpic_dmb): New function.
* config/arm/unwind-arm.h (FDPIC_REGNUM): New define.
(gnu_Unwind_Find_got): New function.
(_Unwind_decode_typeinfo_ptr): Add FDPIC support.
* unwind-arm-common.inc (UCB_PR_GOT): New.
(funcdesc_t): New struct.
(get_eit_entry): Add FDPIC support.
(unwind_phase2): Likewise.
(unwind_phase2_forced): Likewise.
(__gnu_Unwind_RaiseException): Likewise.
(__gnu_Unwind_Resume): Likewise.
(__gnu_Unwind_Backtrace): Likewise.
* unwind-pe.h (read_encoded_value_with_base): Likewise.
libstdc++/
* libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
support.
Change-Id: I64b81cfaf390a05f2fd121f44ba1912cb4b47cae
diff --git a/gcc/ginclude/unwind-arm-common.h b/gcc/ginclude/unwind-arm-common.h
index 6df783e..d4eb03e 100644
--- a/gcc/ginclude/unwind-arm-common.h
+++ b/gcc/ginclude/unwind-arm-common.h
@@ -91,7 +91,7 @@ extern "C" {
_uw reserved2; /* Personality routine address */
_uw reserved3; /* Saved callsite address */
_uw reserved4; /* Forced unwind stop arg */
- _uw reserved5;
+ _uw reserved5; /* Personality routine GOT value in FDPIC mode. */
}
unwinder_cache;
/* Propagation barrier cache (valid after phase 1): */
diff --git a/libgcc/config/arm/linux-atomic.c b/libgcc/config/arm/linux-atomic.c
index 06a6d46..565f829 100644
--- a/libgcc/config/arm/linux-atomic.c
+++ b/libgcc/config/arm/linux-atomic.c
@@ -25,11 +25,62 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* Kernel helper for compare-and-exchange. */
typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr);
-#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
+
+#define STR(X) #X
+#define XSTR(X) STR(X)
+
+#define KERNEL_CMPXCHG 0xffff0fc0
+
+#if __FDPIC__
+/* Non-FDPIC ABIs call __kernel_cmpxchg directly by dereferencing its
+ address, but under FDPIC we would generate a broken call
+ sequence. That's why we have to implement __kernel_cmpxchg and
+ __kernel_dmb here: this way, the FDPIC call sequence works. */
+#define __kernel_cmpxchg __fdpic_cmpxchg
+#else
+#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) KERNEL_CMPXCHG)
+#endif
/* Kernel helper for memory barrier. */
typedef void (__kernel_dmb_t) (void);
-#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
+
+#define KERNEL_DMB 0xffff0fa0
+
+#if __FDPIC__
+#define __kernel_dmb __fdpic_dmb
+#else
+#define __kernel_dmb (*(__kernel_dmb_t *) KERNEL_DMB)
+#endif
+
+#if __FDPIC__
+static int __fdpic_cmpxchg (int oldval, int newval, int *ptr)
+{
+ int result;
+
+ asm volatile (
+ "ldr ip, 1f\n\t"
+ "bx ip\n\t"
+ "1:\n\t"
+ ".word " XSTR(KERNEL_CMPXCHG) "\n\t"
+ : "=r" (result)
+ : "r" (oldval) , "r" (newval), "r" (ptr)
+ : "r3", "memory");
+ /* The result is actually returned by the kernel helper, we need
+ this to avoid a warning. */
+ return result;
+}
+
+static void __fdpic_dmb (void)
+{
+ asm volatile (
+ "ldr ip, 1f\n\t"
+ "bx ip\n\t"
+ "1:\n\t"
+ ".word " XSTR(KERNEL_DMB) "\n\t"
+ );
+}
+
+#endif
/* Note: we implement byte, short and int versions of atomic operations using
the above kernel helpers; see linux-atomic-64bit.c for "long long" (64-bit)
diff --git a/libgcc/config/arm/unwind-arm.h b/libgcc/config/arm/unwind-arm.h
index 43c5379..2bf320a 100644
--- a/libgcc/config/arm/unwind-arm.h
+++ b/libgcc/config/arm/unwind-arm.h
@@ -33,9 +33,33 @@
/* Use IP as a scratch register within the personality routine. */
#define UNWIND_POINTER_REG 12
+#define FDPIC_REGNUM 9
+
+#define STR(x) #x
+#define XSTR(x) STR(x)
+
#ifdef __cplusplus
extern "C" {
#endif
+_Unwind_Ptr __attribute__((weak)) __gnu_Unwind_Find_got (_Unwind_Ptr);
+
+static inline _Unwind_Ptr gnu_Unwind_Find_got (_Unwind_Ptr ptr)
+{
+ _Unwind_Ptr res;
+
+ if (__gnu_Unwind_Find_got)
+ res = __gnu_Unwind_Find_got (ptr);
+ else
+ {
+ asm volatile ("mov %[result], r" XSTR(FDPIC_REGNUM)
+ : [result]"=r" (res)
+ :
+ :);
+ }
+
+ return res;
+}
+
/* Decode an R_ARM_TARGET2 relocation. */
static inline _Unwind_Word
_Unwind_decode_typeinfo_ptr (_Unwind_Word base __attribute__ ((unused)),
@@ -48,7 +72,12 @@ extern "C" {
if (!tmp)
return 0;
-#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
+#if __FDPIC__
+ /* For FDPIC, we store the offset of the GOT entry. */
+ /* So, first get GOT from dynamic linker and then use indirect access. */
+ tmp += gnu_Unwind_Find_got (ptr);
+ tmp = *(_Unwind_Word *) tmp;
+#elif (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
|| defined(__FreeBSD__) || defined(__fuchsia__)
/* Pc-relative indirect. */
#define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel | DW_EH_PE_indirect)
diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
index fd572fe..0bacc11 100644
--- a/libgcc/unwind-arm-common.inc
+++ b/libgcc/unwind-arm-common.inc
@@ -62,6 +62,7 @@ __gnu_Unwind_Find_exidx (_Unwind_Ptr, int *);
#define UCB_PR_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved2)
#define UCB_SAVED_CALLSITE_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved3)
#define UCB_FORCED_STOP_ARG(ucbp) ((ucbp)->unwinder_cache.reserved4)
+#define UCB_PR_GOT(ucbp) ((ucbp)->unwinder_cache.reserved5)
/* Unwind descriptors. */
@@ -85,6 +86,16 @@ typedef struct __EIT_entry
_uw content;
} __EIT_entry;
+#ifdef __FDPIC__
+
+/* Only used in FDPIC case. */
+struct funcdesc_t
+{
+ unsigned int ptr;
+ unsigned int got;
+};
+#endif
+
/* Assembly helper functions. */
/* Restore core register state. Never returns. */
@@ -259,7 +270,21 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address)
{
/* One of the predefined standard routines. */
_uw idx = (*(_uw *) ucbp->pr_cache.ehtp >> 24) & 0xf;
+#if __FDPIC__
+ {
+ struct funcdesc_t *funcdesc
+ = (struct funcdesc_t *) __gnu_unwind_get_pr_addr (idx);
+ if (funcdesc)
+ {
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+ }
+ else
+ UCB_PR_ADDR (ucbp) = 0;
+ }
+#else
UCB_PR_ADDR (ucbp) = __gnu_unwind_get_pr_addr (idx);
+#endif
if (UCB_PR_ADDR (ucbp) == 0)
{
/* Failed */
@@ -270,6 +295,10 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address)
{
/* Execute region offset to PR */
UCB_PR_ADDR (ucbp) = selfrel_offset31 (ucbp->pr_cache.ehtp);
+#if __FDPIC__
+ UCB_PR_GOT (ucbp)
+ = (unsigned int) gnu_Unwind_Find_got ((_Unwind_Ptr) UCB_PR_ADDR (ucbp));
+#endif
}
return _URC_OK;
}
@@ -291,14 +320,29 @@ unwind_phase2 (_Unwind_Control_Block * ucbp, phase2_vrs * vrs)
UCB_SAVED_CALLSITE_ADDR (ucbp) = VRS_PC(vrs);
/* Call the pr to decide what to do. */
+#if __FDPIC__
+ {
+ volatile struct funcdesc_t funcdesc;
+ funcdesc.ptr = UCB_PR_ADDR (ucbp);
+ funcdesc.got = UCB_PR_GOT (ucbp);
+ pr_result = ((personality_routine) &funcdesc)
+ (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs);
+ }
+#else
pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
(_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs);
+#endif
}
while (pr_result == _URC_CONTINUE_UNWIND);
if (pr_result != _URC_INSTALL_CONTEXT)
abort();
+#if __FDPIC__
+ /* r9 could have been lost due to PLT jump. Restore correct value. */
+ vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (vrs));
+#endif
+
uw_restore_core_regs (vrs, &vrs->core);
}
@@ -346,8 +390,18 @@ unwind_phase2_forced (_Unwind_Control_Block *ucbp, phase2_vrs *entry_vrs,
next_vrs = saved_vrs;
/* Call the pr to decide what to do. */
+#if __FDPIC__
+ {
+ volatile struct funcdesc_t funcdesc;
+ funcdesc.ptr = UCB_PR_ADDR (ucbp);
+ funcdesc.got = UCB_PR_GOT (ucbp);
+ pr_result = ((personality_routine) &funcdesc)
+ (action, ucbp, (void *) &next_vrs);
+ }
+#else
pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
(action, ucbp, (void *) &next_vrs);
+#endif
saved_vrs.prev_sp = VRS_SP (&next_vrs);
}
@@ -384,6 +438,11 @@ unwind_phase2_forced (_Unwind_Control_Block *ucbp, phase2_vrs *entry_vrs,
return _URC_FAILURE;
}
+#if __FDPIC__
+ /* r9 could have been lost due to PLT jump. Restore correct value. */
+ saved_vrs.core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (&saved_vrs));
+#endif
+
uw_restore_core_regs (&saved_vrs, &saved_vrs.core);
}
@@ -429,8 +488,18 @@ __gnu_Unwind_RaiseException (_Unwind_Control_Block * ucbp,
return _URC_FAILURE;
/* Call the pr to decide what to do. */
+#if __FDPIC__
+ {
+ volatile struct funcdesc_t funcdesc;
+ funcdesc.ptr = UCB_PR_ADDR (ucbp);
+ funcdesc.got = UCB_PR_GOT (ucbp);
+ pr_result = ((personality_routine) &funcdesc)
+ (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs);
+ }
+#else
pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
(_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs);
+#endif
}
while (pr_result == _URC_CONTINUE_UNWIND);
@@ -488,13 +557,27 @@ __gnu_Unwind_Resume (_Unwind_Control_Block * ucbp, phase2_vrs * entry_vrs)
}
/* Call the cached PR. */
+#if __FDPIC__
+ {
+ volatile struct funcdesc_t funcdesc;
+ funcdesc.ptr = UCB_PR_ADDR (ucbp);
+ funcdesc.got = UCB_PR_GOT (ucbp);
+ pr_result = ((personality_routine) &funcdesc)
+ (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs);
+ }
+#else
pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
(_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs);
+#endif
switch (pr_result)
{
case _URC_INSTALL_CONTEXT:
/* Upload the registers to enter the landing pad. */
+#if __FDPIC__
+ /* r9 could have been lost due to PLT jump. Restore correct value. */
+ entry_vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (entry_vrs));
+#endif
uw_restore_core_regs (entry_vrs, &entry_vrs->core);
case _URC_CONTINUE_UNWIND:
@@ -586,9 +669,20 @@ __gnu_Unwind_Backtrace(_Unwind_Trace_Fn trace, void * trace_argument,
}
/* Call the pr to decide what to do. */
+#if __FDPIC__
+ {
+ volatile struct funcdesc_t funcdesc;
+ funcdesc.ptr = UCB_PR_ADDR (ucbp);
+ funcdesc.got = UCB_PR_GOT (ucbp);
+ code = ((personality_routine) &funcdesc)
+ (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND,
+ ucbp, (void *) &saved_vrs);
+ }
+#else
code = ((personality_routine) UCB_PR_ADDR (ucbp))
(_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND,
ucbp, (void *) &saved_vrs);
+#endif
}
while (code != _URC_END_OF_STACK
&& code != _URC_FAILURE);
diff --git a/libgcc/unwind-pe.h b/libgcc/unwind-pe.h
index 4ed1c66..1c9dae5 100644
--- a/libgcc/unwind-pe.h
+++ b/libgcc/unwind-pe.h
@@ -262,10 +262,27 @@ read_encoded_value_with_base (unsigned char encoding, _Unwind_Ptr base,
if (result != 0)
{
+#if __FDPIC__
+ /* FDPIC relative addresses imply taking the GOT address
+ into account. */
+ if ((encoding & DW_EH_PE_pcrel) && (encoding & DW_EH_PE_indirect))
+ {
+ result += gnu_Unwind_Find_got ((_Unwind_Ptr) u);
+ result = *(_Unwind_Internal_Ptr *) result;
+ }
+ else
+ {
+ result += ((encoding & 0x70) == DW_EH_PE_pcrel
+ ? (_Unwind_Internal_Ptr) u : base);
+ if (encoding & DW_EH_PE_indirect)
+ result = *(_Unwind_Internal_Ptr *) result;
+ }
+#else
result += ((encoding & 0x70) == DW_EH_PE_pcrel
? (_Unwind_Internal_Ptr) u : base);
if (encoding & DW_EH_PE_indirect)
result = *(_Unwind_Internal_Ptr *) result;
+#endif
}
}
diff --git a/libstdc++-v3/libsupc++/eh_personality.cc b/libstdc++-v3/libsupc++/eh_personality.cc
index 35e4e46..1528ab9 100644
--- a/libstdc++-v3/libsupc++/eh_personality.cc
+++ b/libstdc++-v3/libsupc++/eh_personality.cc
@@ -93,7 +93,15 @@ get_ttype_entry (lsda_header_info *info, _uleb128_t i)
_Unwind_Ptr ptr;
i *= size_of_encoded_value (info->ttype_encoding);
- read_encoded_value_with_base (info->ttype_encoding, info->ttype_base,
+ read_encoded_value_with_base (
+#if __FDPIC__
+ /* Force these flags to nake sure to
+ take the GOT into account. */
+ (DW_EH_PE_pcrel | DW_EH_PE_indirect),
+#else
+ info->ttype_encoding,
+#endif
+ info->ttype_base,
info->TType - i, &ptr);
return reinterpret_cast<const std::type_info *>(ptr);
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (5 preceding siblings ...)
2019-05-15 12:42 ` [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions Christophe Lyon
@ 2019-05-15 12:42 ` Christophe Lyon
2019-07-16 10:42 ` Kyrill Tkachov
2019-05-15 12:43 ` [ARM/FDPIC v5 08/21] [ARM] FDPIC: Enforce local/global binding for function descriptors Christophe Lyon
` (15 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:42 UTC (permalink / raw)
To: gcc-patches
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
FDPIC.
Change-Id: I0f3b2023ab2a2a0433dfe081dac6bbb194b7a76c
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d9397b5..dbd1671 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19651,9 +19651,7 @@ arm_compute_save_reg0_reg12_mask (void)
save_reg_mask |= (1 << reg);
/* Also save the pic base register if necessary. */
- if (flag_pic
- && !TARGET_SINGLE_PIC_BASE
- && arm_pic_register != INVALID_REGNUM
+ if (PIC_REGISTER_MAY_NEED_SAVING
&& crtl->uses_pic_offset_table)
save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
}
@@ -19685,9 +19683,7 @@ arm_compute_save_reg0_reg12_mask (void)
/* If we aren't loading the PIC register,
don't stack it even though it may be live. */
- if (flag_pic
- && !TARGET_SINGLE_PIC_BASE
- && arm_pic_register != INVALID_REGNUM
+ if (PIC_REGISTER_MAY_NEED_SAVING
&& (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)
|| crtl->uses_pic_offset_table))
save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 7b50ef5..45c0e2b 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1967,6 +1967,13 @@ extern unsigned arm_pic_register;
|| label_mentioned_p (get_pool_constant (X))))) \
|| tls_mentioned_p (X))
+/* We may want to save the PIC register if it is a dedicated one. */
+#define PIC_REGISTER_MAY_NEED_SAVING \
+ (flag_pic \
+ && !TARGET_SINGLE_PIC_BASE \
+ && !TARGET_FDPIC \
+ && arm_pic_register != INVALID_REGNUM)
+
/* We need to know when we are making a constant pool; this determines
whether data needs to be in the GOT or can be referenced via a GOT
offset. */
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support.
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (7 preceding siblings ...)
2019-05-15 12:43 ` [ARM/FDPIC v5 08/21] [ARM] FDPIC: Enforce local/global binding for function descriptors Christophe Lyon
@ 2019-05-15 12:43 ` Christophe Lyon
2019-09-04 14:16 ` Kyrill Tkachov
2019-05-15 12:43 ` [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function Christophe Lyon
` (13 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:43 UTC (permalink / raw)
To: gcc-patches
Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.
We do not support the GNU2 TLS dialect.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
(arm_call_tls_get_addr): Add FDPIC support.
(legitimize_tls_address): Likewise.
(arm_emit_tls_decoration): Likewise.
Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 99d13bf..5fc7a20 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2379,9 +2379,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
enum tls_reloc {
TLS_GD32,
+ TLS_GD32_FDPIC,
TLS_LDM32,
+ TLS_LDM32_FDPIC,
TLS_LDO32,
TLS_IE32,
+ TLS_IE32_FDPIC,
TLS_LE32,
TLS_DESCSEQ /* GNU scheme */
};
@@ -8760,20 +8763,34 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
gcc_assert (reloc != TLS_DESCSEQ);
start_sequence ();
- labelno = GEN_INT (pic_labelno++);
- label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- label = gen_rtx_CONST (VOIDmode, label);
+ if (TARGET_FDPIC)
+ {
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (reloc)),
+ UNSPEC_TLS);
+ }
+ else
+ {
+ labelno = GEN_INT (pic_labelno++);
+ label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ label = gen_rtx_CONST (VOIDmode, label);
- sum = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (4, x, GEN_INT (reloc), label,
- GEN_INT (TARGET_ARM ? 8 : 4)),
- UNSPEC_TLS);
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (4, x, GEN_INT (reloc), label,
+ GEN_INT (TARGET_ARM ? 8 : 4)),
+ UNSPEC_TLS);
+ }
reg = load_tls_operand (sum, reg);
- if (TARGET_ARM)
- emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
+ if (TARGET_FDPIC)
+ {
+ emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+ }
else
- emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+ if (TARGET_ARM)
+ emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
+ else
+ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
*valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX,
LCT_PURE, /* LCT_CONST? */
@@ -8808,6 +8825,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
return reg;
}
+
rtx
legitimize_tls_address (rtx x, rtx reg)
{
@@ -8820,6 +8838,9 @@ legitimize_tls_address (rtx x, rtx reg)
case TLS_MODEL_GLOBAL_DYNAMIC:
if (TARGET_GNU2_TLS)
{
+ if (TARGET_FDPIC)
+ gcc_unreachable();
+
reg = arm_tls_descseq_addr (x, reg);
tp = arm_load_tp (NULL_RTX);
@@ -8829,7 +8850,10 @@ legitimize_tls_address (rtx x, rtx reg)
else
{
/* Original scheme */
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
+ if (TARGET_FDPIC)
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
+ else
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
dest = gen_reg_rtx (Pmode);
emit_libcall_block (insns, dest, ret, x);
}
@@ -8838,6 +8862,9 @@ legitimize_tls_address (rtx x, rtx reg)
case TLS_MODEL_LOCAL_DYNAMIC:
if (TARGET_GNU2_TLS)
{
+ if (TARGET_FDPIC)
+ gcc_unreachable();
+
reg = arm_tls_descseq_addr (x, reg);
tp = arm_load_tp (NULL_RTX);
@@ -8846,7 +8873,10 @@ legitimize_tls_address (rtx x, rtx reg)
}
else
{
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
+ if (TARGET_FDPIC)
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
+ else
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
share the LDM result with other LD model accesses. */
@@ -8865,23 +8895,35 @@ legitimize_tls_address (rtx x, rtx reg)
return dest;
case TLS_MODEL_INITIAL_EXEC:
- labelno = GEN_INT (pic_labelno++);
- label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- label = gen_rtx_CONST (VOIDmode, label);
- sum = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
- GEN_INT (TARGET_ARM ? 8 : 4)),
- UNSPEC_TLS);
- reg = load_tls_operand (sum, reg);
-
- if (TARGET_ARM)
- emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
- else if (TARGET_THUMB2)
- emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
+ if (TARGET_FDPIC)
+ {
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (TLS_IE32_FDPIC)),
+ UNSPEC_TLS);
+ reg = load_tls_operand (sum, reg);
+ emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+ emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
+ }
else
{
- emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
- emit_move_insn (reg, gen_const_mem (SImode, reg));
+ labelno = GEN_INT (pic_labelno++);
+ label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ label = gen_rtx_CONST (VOIDmode, label);
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
+ GEN_INT (TARGET_ARM ? 8 : 4)),
+ UNSPEC_TLS);
+ reg = load_tls_operand (sum, reg);
+
+ if (TARGET_ARM)
+ emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
+ else if (TARGET_THUMB2)
+ emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
+ else
+ {
+ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+ emit_move_insn (reg, gen_const_mem (SImode, reg));
+ }
}
tp = arm_load_tp (NULL_RTX);
@@ -28218,15 +28260,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x)
case TLS_GD32:
fputs ("(tlsgd)", fp);
break;
+ case TLS_GD32_FDPIC:
+ fputs ("(tlsgd_fdpic)", fp);
+ break;
case TLS_LDM32:
fputs ("(tlsldm)", fp);
break;
+ case TLS_LDM32_FDPIC:
+ fputs ("(tlsldm_fdpic)", fp);
+ break;
case TLS_LDO32:
fputs ("(tlsldo)", fp);
break;
case TLS_IE32:
fputs ("(gottpoff)", fp);
break;
+ case TLS_IE32_FDPIC:
+ fputs ("(gottpoff_fdpic)", fp);
+ break;
case TLS_LE32:
fputs ("(tpoff)", fp);
break;
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (8 preceding siblings ...)
2019-05-15 12:43 ` [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support Christophe Lyon
@ 2019-05-15 12:43 ` Christophe Lyon
2019-07-16 11:53 ` Kyrill Tkachov
2019-05-15 12:44 ` [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Christophe Lyon
` (12 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:43 UTC (permalink / raw)
To: gcc-patches
In FDPIC mode, the trampoline generated to support pointers to nested
functions looks like:
.word trampoline address
.word trampoline GOT address
ldr r12, [pc, #8]
ldr r9, [pc, #8]
ldr pc, [pc, #8]
.word static chain value
.word GOT address
.word function's address
because in FDPIC function pointers are actually pointers to function
descriptors, we have to actually generate a function descriptor for
the trampoline.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
support.
(arm_trampoline_init): Likewise.
(arm_trampoline_init): Likewise.
* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 40e3f3b..99d13bf 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
.word static chain value
.word function's address
XXX FIXME: When the trampoline returns, r8 will be clobbered. */
+/* In FDPIC mode, the trampoline looks like:
+ .word trampoline address
+ .word trampoline GOT address
+ ldr r12, [pc, #8] ; #4 for Thumb2
+ ldr r9, [pc, #8] ; #4 for Thumb2
+ ldr pc, [pc, #8] ; #4 for Thumb2
+ .word static chain value
+ .word GOT address
+ .word function's address
+*/
static void
arm_asm_trampoline_template (FILE *f)
{
fprintf (f, "\t.syntax unified\n");
- if (TARGET_ARM)
+ if (TARGET_FDPIC)
+ {
+ /* The first two words are a function descriptor pointing to the
+ trampoline code just below. */
+ if (TARGET_ARM)
+ fprintf (f, "\t.arm\n");
+ else if (TARGET_THUMB2)
+ fprintf (f, "\t.thumb\n");
+ else
+ /* Only ARM and Thumb-2 are supported. */
+ gcc_unreachable ();
+
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+ /* Trampoline code which sets the static chain register but also
+ PIC register before jumping into real code. */
+ asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+ STATIC_CHAIN_REGNUM, PC_REGNUM,
+ TARGET_THUMB2 ? 8 : 4);
+ asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+ PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
+ TARGET_THUMB2 ? 8 : 4);
+ asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+ PC_REGNUM, PC_REGNUM,
+ TARGET_THUMB2 ? 8 : 4);
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+ }
+ else if (TARGET_ARM)
{
fprintf (f, "\t.arm\n");
asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
@@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
emit_block_move (m_tramp, assemble_trampoline_template (),
GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
- mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
- emit_move_insn (mem, chain_value);
+ if (TARGET_FDPIC)
+ {
+ rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
+ rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+ rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+ /* The function start address is at offset 8, but in Thumb mode
+ we want bit 0 set to 1 to indicate Thumb-ness, hence 9
+ below. */
+ rtx trampoline_code_start
+ = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
+
+ /* Write initial funcdesc which points to the trampoline. */
+ mem = adjust_address (m_tramp, SImode, 0);
+ emit_move_insn (mem, trampoline_code_start);
+ mem = adjust_address (m_tramp, SImode, 4);
+ emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
+ /* Setup static chain. */
+ mem = adjust_address (m_tramp, SImode, 20);
+ emit_move_insn (mem, chain_value);
+ /* GOT + real function entry point. */
+ mem = adjust_address (m_tramp, SImode, 24);
+ emit_move_insn (mem, gotaddr);
+ mem = adjust_address (m_tramp, SImode, 28);
+ emit_move_insn (mem, fnaddr);
+ }
+ else
+ {
+ mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
+ emit_move_insn (mem, chain_value);
- mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
- fnaddr = XEXP (DECL_RTL (fndecl), 0);
- emit_move_insn (mem, fnaddr);
+ mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
+ fnaddr = XEXP (DECL_RTL (fndecl), 0);
+ emit_move_insn (mem, fnaddr);
+ }
a_tramp = XEXP (m_tramp, 0);
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
@@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
static rtx
arm_trampoline_adjust_address (rtx addr)
{
- if (TARGET_THUMB)
+ /* For FDPIC don't fix trampoline address since it's a function
+ descriptor and not a function address. */
+ if (TARGET_THUMB && !TARGET_FDPIC)
addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
NULL, 0, OPTAB_LIB_WIDEN);
return addr;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 45c0e2b..f80df63 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1602,7 +1602,7 @@ typedef struct
#define INIT_EXPANDERS arm_init_expanders ()
/* Length in units of the trampoline for entering a nested function. */
-#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
+#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
/* Alignment required for a trampoline in bits. */
#define TRAMPOLINE_ALIGNMENT 32
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 08/21] [ARM] FDPIC: Enforce local/global binding for function descriptors
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (6 preceding siblings ...)
2019-05-15 12:42 ` [ARM/FDPIC v5 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only Christophe Lyon
@ 2019-05-15 12:43 ` Christophe Lyon
2019-07-16 10:51 ` Kyrill Tkachov
2019-05-15 12:43 ` [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support Christophe Lyon
` (14 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:43 UTC (permalink / raw)
To: gcc-patches
Use local binding rules to decide whether we can use GOTOFFFUNCDESC to
compute the function address.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (arm_local_funcdesc_p): New function.
(legitimize_pic_address): Enforce binding rules on function
pointers in FDPIC mode.
(arm_assemble_integer): Likewise.
Change-Id: I3fa0b63bc0f672903f405aa72cc46052de1c0feb
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index dbd1671..40e3f3b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3790,6 +3790,42 @@ arm_options_perform_arch_sanity_checks (void)
}
}
+/* Test whether a local function descriptor is canonical, i.e.,
+ whether we can use GOTOFFFUNCDESC to compute the address of the
+ function. */
+static bool
+arm_fdpic_local_funcdesc_p (rtx fnx)
+{
+ tree fn;
+ enum symbol_visibility vis;
+ bool ret;
+
+ if (!TARGET_FDPIC)
+ return TRUE;
+
+ if (! SYMBOL_REF_LOCAL_P (fnx))
+ return FALSE;
+
+ fn = SYMBOL_REF_DECL (fnx);
+
+ if (! fn)
+ return FALSE;
+
+ vis = DECL_VISIBILITY (fn);
+
+ if (vis == VISIBILITY_PROTECTED)
+ /* Private function descriptors for protected functions are not
+ canonical. Temporarily change the visibility to global so that
+ we can ensure uniqueness of funcdesc pointers. */
+ DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
+
+ ret = default_binds_local_p_1 (fn, flag_pic);
+
+ DECL_VISIBILITY (fn) = vis;
+
+ return ret;
+}
+
static void
arm_add_gc_roots (void)
{
@@ -7563,7 +7599,9 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg,
|| (GET_CODE (orig) == SYMBOL_REF
&& SYMBOL_REF_LOCAL_P (orig)
&& (SYMBOL_REF_DECL (orig)
- ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)))
+ ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)
+ && (!SYMBOL_REF_FUNCTION_P (orig)
+ || arm_fdpic_local_funcdesc_p (orig))))
&& NEED_GOT_RELOC
&& arm_pic_data_is_text_relative)
insn = arm_pic_static_addr (orig, reg);
@@ -23231,7 +23269,9 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
|| (GET_CODE (x) == SYMBOL_REF
&& (!SYMBOL_REF_LOCAL_P (x)
|| (SYMBOL_REF_DECL (x)
- ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
+ ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)
+ || (SYMBOL_REF_FUNCTION_P (x)
+ && !arm_fdpic_local_funcdesc_p (x)))))
{
if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
fputs ("(GOTFUNCDESC)", asm_out_file);
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (10 preceding siblings ...)
2019-05-15 12:44 ` [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Christophe Lyon
@ 2019-05-15 12:44 ` Christophe Lyon
2019-09-04 14:19 ` Kyrill Tkachov
2019-05-15 12:44 ` [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Christophe Lyon
` (10 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:44 UTC (permalink / raw)
To: gcc-patches
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
libgcc/
* unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN)
(THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC)
(FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER)
(FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT)
(ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0, FDPIC_T2_LDR_R12_WITH_FUNCDESC)
(FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New.
(__gnu_personality_sigframe_fdpic): New.
(get_eit_entry): Add FDPIC signal frame support.
Change-Id: I7f9527cc50665dd1a731b7badf71c319fb38bf57
diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
index 0bacc11..c9a82b7 100644
--- a/libgcc/unwind-arm-common.inc
+++ b/libgcc/unwind-arm-common.inc
@@ -30,6 +30,26 @@
#include <sys/sdt.h>
#endif
+#if __FDPIC__
+/* Load r7 with rt_sigreturn value. */
+#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad /* mov r7, #0xad */
+#define THUMB2_SET_R7_RT_SIGRETURN 0x07adf04f /* mov.w r7, #0xad */
+
+/* FDPIC jump to restorer sequence. */
+#define FDPIC_LDR_R12_WITH_FUNCDESC 0xe59fc004 /* ldr r12, [pc, #4] */
+#define FDPIC_LDR_R9_WITH_GOT 0xe59c9004 /* ldr r9, [r12, #4] */
+#define FDPIC_LDR_PC_WITH_RESTORER 0xe59cf000 /* ldr pc, [r12] */
+#define FDPIC_T2_LDR_R12_WITH_FUNCDESC 0xc008f8df /* ldr.w r12, [pc, #8] */
+#define FDPIC_T2_LDR_R9_WITH_GOT 0x9004f8dc /* ldr.w r9, [r12, #4] */
+#define FDPIC_T2_LDR_PC_WITH_RESTORER 0xf000f8dc /* ldr.w pc, [r12] */
+#define FDPIC_FUNCDESC_OFFSET 12
+
+/* Signal frame offsets. */
+#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
+#define ARM_UCONTEXT_SIGCONTEXT 0x14
+#define ARM_SIGCONTEXT_R0 0xc
+#endif
+
/* We add a prototype for abort here to avoid creating a dependency on
target headers. */
extern void abort (void);
@@ -199,6 +219,45 @@ search_EIT_table (const __EIT_entry * table, int nrec, _uw return_address)
}
}
+#if __FDPIC__
+/* VFP is not restored, but this is sufficient to allow unwinding. */
+static _Unwind_Reason_Code
+__gnu_personality_sigframe_fdpic (_Unwind_State state,
+ _Unwind_Control_Block *ucbp,
+ _Unwind_Context *context)
+{
+ unsigned int sp;
+ unsigned int pc;
+ unsigned int funcdesc;
+ unsigned int handler;
+ unsigned int first_handler_instruction;
+ int i;
+
+ _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp);
+ _Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc);
+
+ funcdesc = *(unsigned int *)((pc & ~1) + FDPIC_FUNCDESC_OFFSET);
+ handler = *(unsigned int *)(funcdesc);
+ first_handler_instruction = *(unsigned int *)(handler & ~1);
+
+ /* Adjust SP to point to the start of registers according to
+ signal type. */
+ if (first_handler_instruction == ARM_SET_R7_RT_SIGRETURN
+ || first_handler_instruction == THUMB2_SET_R7_RT_SIGRETURN)
+ sp += ARM_NEW_RT_SIGFRAME_UCONTEXT
+ + ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0;
+ else
+ sp += ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0;
+ /* Restore regs saved on stack by the kernel. */
+ for (i = 0; i < 16; i++)
+ _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp + 4 * i);
+
+ return _URC_CONTINUE_UNWIND;
+}
+#endif
+
/* Find the exception index table eintry for the given address.
Fill in the relevant fields of the UCB.
Returns _URC_FAILURE if an error occurred, _URC_OK on success. */
@@ -222,6 +281,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address)
&nrec);
if (!eitp)
{
+#if __FDPIC__
+ /* If we are unwinding a signal handler then perhaps we have
+ reached a trampoline. Try to detect jump to restorer
+ sequence. */
+ _uw *pc = (_uw *)((return_address+2) & ~1);
+ if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
+ {
+ struct funcdesc_t *funcdesc
+ = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
+
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+
+ return _URC_OK;
+ }
+#endif
UCB_PR_ADDR (ucbp) = 0;
return _URC_FAILURE;
}
@@ -236,6 +316,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address)
if (!eitp)
{
+#if __FDPIC__
+ /* If we are unwinding a signal handler then perhaps we have
+ reached a trampoline. Try to detect jump to restorer
+ sequence. */
+ _uw *pc = (_uw *)((return_address+2) & ~1);
+ if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
+ {
+ struct funcdesc_t *funcdesc
+ = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
+
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+
+ return _URC_OK;
+ }
+#endif
UCB_PR_ADDR (ucbp) = 0;
return _URC_FAILURE;
}
@@ -244,6 +345,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address)
/* Can this frame be unwound at all? */
if (eitp->content == EXIDX_CANTUNWIND)
{
+#if __FDPIC__
+ /* If we are unwinding a signal handler then perhaps we have
+ reached a trampoline. Try to detect jump to restorer
+ sequence. */
+ _uw *pc = (_uw *)((return_address+2) & ~1);
+ if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
+ {
+ struct funcdesc_t *funcdesc
+ = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
+
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+
+ return _URC_OK;
+ }
+#endif
UCB_PR_ADDR (ucbp) = 0;
return _URC_END_OF_STACK;
}
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (9 preceding siblings ...)
2019-05-15 12:43 ` [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function Christophe Lyon
@ 2019-05-15 12:44 ` Christophe Lyon
2019-08-29 15:40 ` Christophe Lyon
2019-08-29 15:44 ` Kyrill Tkachov
2019-05-15 12:44 ` [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame Christophe Lyon
` (11 subsequent siblings)
22 siblings, 2 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:44 UTC (permalink / raw)
To: gcc-patches
We call __aeabi_read_tp() to get the thread pointer. Since this is a
function call, we have to restore the FDPIC register afterwards.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (arm_load_tp): Add FDPIC support.
* config/arm/arm.md (load_tp_soft_fdpic): New pattern.
(load_tp_soft): Disable in FDPIC mode.
Change-Id: I1f6dfaee6260ecb453270f4971b3c5124317a186
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 5fc7a20..26f29c7 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -8732,7 +8732,25 @@ arm_load_tp (rtx target)
rtx tmp;
- emit_insn (gen_load_tp_soft ());
+ if (TARGET_FDPIC)
+ {
+ rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_load_tp_soft_fdpic ());
+
+ /* Restore r9. */
+ XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
+ gen_rtvec (2, fdpic_reg,
+ initial_fdpic_reg),
+ UNSPEC_PIC_RESTORE);
+ XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
+ XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
+ emit_insn (par);
+ }
+ else
+ emit_insn (gen_load_tp_soft ());
tmp = gen_rtx_REG (SImode, R0_REGNUM);
emit_move_insn (target, tmp);
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 9036255..0edcb1d 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -11759,12 +11759,25 @@
)
;; Doesn't clobber R1-R3. Must use r0 for the first operand.
+(define_insn "load_tp_soft_fdpic"
+ [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
+ (clobber (reg:SI 9))
+ (clobber (reg:SI LR_REGNUM))
+ (clobber (reg:SI IP_REGNUM))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_SOFT_TP && TARGET_FDPIC"
+ "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
+ [(set_attr "conds" "clob")
+ (set_attr "type" "branch")]
+)
+
+;; Doesn't clobber R1-R3. Must use r0 for the first operand.
(define_insn "load_tp_soft"
[(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
(clobber (reg:SI LR_REGNUM))
(clobber (reg:SI IP_REGNUM))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_SOFT_TP"
+ "TARGET_SOFT_TP && !TARGET_FDPIC"
"bl\\t__aeabi_read_tp\\t@ load_tp_soft"
[(set_attr "conds" "clob")
(set_attr "type" "branch")]
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (11 preceding siblings ...)
2019-05-15 12:44 ` [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame Christophe Lyon
@ 2019-05-15 12:44 ` Christophe Lyon
2019-08-29 15:37 ` Kyrill Tkachov
2019-05-15 12:45 ` [ARM/FDPIC v5 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests Christophe Lyon
` (9 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:44 UTC (permalink / raw)
To: gcc-patches
Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.
This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
libgcc/
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
architecture.
Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 9ba73e7..ba47150 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
return _UVRSR_FAILED;
vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__ARM_ARCH_7M__)
+ /* Force LSB bit since we always run thumb code. */
+ if (regno == 15)
+ vrs->core.r[regno] |= 1;
+#endif
return _UVRSR_OK;
case _UVRSC_VFP:
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (12 preceding siblings ...)
2019-05-15 12:44 ` [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Christophe Lyon
@ 2019-05-15 12:45 ` Christophe Lyon
2019-07-19 8:52 ` Kyrill Tkachov
2019-05-15 12:45 ` [ARM/FDPIC v5 16/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode Christophe Lyon
` (8 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:45 UTC (permalink / raw)
To: gcc-patches
Several tests cannot work on ARM-FDPIC for various reasons: skip them,
or skip some directives.
gcc.dg/20020312-2.c: Skip since it forces -fno-pic.
gcc.target/arm/:
* Skip since r9 is clobbered by assembly code:
20051215-1.c
mmx-1.c
pr61948.c
pr77933-1.c
pr77933-2.c
* Skip since the test forces armv5te which is not supported by FDPIC:
pr40887.c
pr19599.c
* Skip since FDPIC disables sibcall to external functions:
sibcall-1.c
tail-long-call
vfp-longcall-apcs
* Skip size check since it's different for FDPIC:
ivopts-2.c
ivopts-3.c
ivopts-4.c
ivopts-5.c
pr43597.c
pr43920-2.c
* Disable assembler scanning invalid for FDPIC:
pr45701-1.c
pr45701-2.c
stack-red-zone.c
* gnu2 TLS dialect is not supported by FDPIC:
tlscall.c
* Test relies on symbols not generated in FDPIC:
data-rel-2.c
data-rel-3.c
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/testsuite/
* gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/20051215-1.c: Likewise.
* gcc.target/arm/mmx-1.c: Likewise.
* gcc.target/arm/pr19599.c: Likewise.
* gcc.target/arm/pr40887.c: Likewise.
* gcc.target/arm/pr61948.c: Likewise.
* gcc.target/arm/pr77933-1.c: Likewise.
* gcc.target/arm/pr77933-2.c: Likewise.
* gcc.target/arm/sibcall-1.c: Likewise.
* gcc.target/arm/data-rel-2.c: Likewise.
* gcc.target/arm/data-rel-3.c: Likewise.
* gcc.target/arm/tail-long-call: Likewise.
* gcc.target/arm/tlscall.c: Likewise.
* gcc.target/arm/vfp-longcall-apcs: Likewise.
* gcc.target/arm/ivopts-2.c: Skip object-size test on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/ivopts-3.c: Likewise.
* gcc.target/arm/ivopts-4.c: Likewise.
* gcc.target/arm/ivopts-5.c: Likewise.
* gcc.target/arm/pr43597.c: Likewise.
* gcc.target/arm/pr43920-2.c: Likewise.
* gcc.target/arm/pr45701-1.c: Skip scan-assembler on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/pr45701-2.c: Likewise.
* gcc.target/arm/stack-red-zone.c: Likewise.
Change-Id: Icada7ce52537901fdac10403e7997571b7e2c509
diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c
index c584d35..3df99d9 100644
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -9,6 +9,7 @@
/* { dg-options "-O -fno-pic" } */
/* { dg-additional-options "-no-pie" { target pie_enabled } } */
/* { dg-require-effective-target nonlocal_goto } */
+/* { dg-skip-if "" { arm*-*-uclinuxfdpiceabi } "*" "" } */
extern void abort (void);
diff --git a/gcc/testsuite/gcc.target/arm/20051215-1.c b/gcc/testsuite/gcc.target/arm/20051215-1.c
index 0519dc7..cc07693 100644
--- a/gcc/testsuite/gcc.target/arm/20051215-1.c
+++ b/gcc/testsuite/gcc.target/arm/20051215-1.c
@@ -3,6 +3,7 @@
the call would need an output reload. */
/* { dg-do run } */
/* { dg-options "-O2 -fno-omit-frame-pointer" } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
extern void abort (void);
typedef void (*callback) (void);
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-2.c b/gcc/testsuite/gcc.target/arm/data-rel-2.c
index 6ba47d6..7d37a8c 100644
--- a/gcc/testsuite/gcc.target/arm/data-rel-2.c
+++ b/gcc/testsuite/gcc.target/arm/data-rel-2.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-fPIC -mno-pic-data-is-text-relative -mno-single-pic-base" } */
/* { dg-final { scan-assembler-not "j-\\(.LPIC" } } */
/* { dg-final { scan-assembler "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-3.c b/gcc/testsuite/gcc.target/arm/data-rel-3.c
index 2ce1e66..534c6c4 100644
--- a/gcc/testsuite/gcc.target/arm/data-rel-3.c
+++ b/gcc/testsuite/gcc.target/arm/data-rel-3.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-fPIC -mpic-data-is-text-relative" } */
/* { dg-final { scan-assembler "j-\\(.LPIC" } } */
/* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
diff --git a/gcc/testsuite/gcc.target/arm/ivopts-2.c b/gcc/testsuite/gcc.target/arm/ivopts-2.c
index afe91aa..f1d5edb 100644
--- a/gcc/testsuite/gcc.target/arm/ivopts-2.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts-2.c
@@ -14,4 +14,4 @@ tr4 (short array[], int n)
/* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
/* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */
-/* { dg-final { object-size text <= 26 { target arm_thumb2 } } } */
+/* { dg-final { object-size text <= 26 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/ivopts-3.c b/gcc/testsuite/gcc.target/arm/ivopts-3.c
index faea996..357350c 100644
--- a/gcc/testsuite/gcc.target/arm/ivopts-3.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts-3.c
@@ -16,4 +16,4 @@ tr3 (short array[], unsigned int n)
/* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
/* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
/* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
-/* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */
+/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/ivopts-4.c b/gcc/testsuite/gcc.target/arm/ivopts-4.c
index b8101cb..2e866c0 100644
--- a/gcc/testsuite/gcc.target/arm/ivopts-4.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts-4.c
@@ -17,4 +17,4 @@ tr2 (int array[], int n)
/* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
/* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
/* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
-/* { dg-final { object-size text <= 36 { target arm_thumb2 } } } */
+/* { dg-final { object-size text <= 36 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/ivopts-5.c b/gcc/testsuite/gcc.target/arm/ivopts-5.c
index f4f8c2c..4e8e380 100644
--- a/gcc/testsuite/gcc.target/arm/ivopts-5.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts-5.c
@@ -16,4 +16,4 @@ tr1 (int array[], unsigned int n)
/* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
/* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
/* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
-/* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */
+/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/mmx-1.c b/gcc/testsuite/gcc.target/arm/mmx-1.c
index 6317cc0..8060dbd 100644
--- a/gcc/testsuite/gcc.target/arm/mmx-1.c
+++ b/gcc/testsuite/gcc.target/arm/mmx-1.c
@@ -9,6 +9,7 @@
/* { dg-require-effective-target arm32 } */
/* { dg-require-effective-target arm_iwmmxt_ok } */
/* { dg-final { scan-assembler "push.*ip,\[ ]*pc" } } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* This function uses all the call-saved registers, namely r4, r5, r6,
r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd
diff --git a/gcc/testsuite/gcc.target/arm/pr19599.c b/gcc/testsuite/gcc.target/arm/pr19599.c
index c3ee220..a536548 100644
--- a/gcc/testsuite/gcc.target/arm/pr19599.c
+++ b/gcc/testsuite/gcc.target/arm/pr19599.c
@@ -1,4 +1,5 @@
/* { dg-skip-if "need at least armv5te" { *-*-* } { "-march=armv[234]*" "-mthumb" } { "" } } */
+/* { dg-skip-if "FDPIC does not support armv5te" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-O2 -march=armv5te -marm" } */
/* { dg-final { scan-assembler "bx" } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr40887.c b/gcc/testsuite/gcc.target/arm/pr40887.c
index 8c91cd9..832f676 100644
--- a/gcc/testsuite/gcc.target/arm/pr40887.c
+++ b/gcc/testsuite/gcc.target/arm/pr40887.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-skip-if "need at least armv5" { *-*-* } { "-march=armv[234]*" } { "" } } */
+/* { dg-skip-if "FDPIC does not support armv5te" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_arch_v5te } */
diff --git a/gcc/testsuite/gcc.target/arm/pr43597.c b/gcc/testsuite/gcc.target/arm/pr43597.c
index 3fdea98..6c9d419 100644
--- a/gcc/testsuite/gcc.target/arm/pr43597.c
+++ b/gcc/testsuite/gcc.target/arm/pr43597.c
@@ -24,4 +24,4 @@ foo4 ()
/* { dg-final { scan-assembler-times "sub" 1 } } */
/* { dg-final { scan-assembler-times "cmp" 0 } } */
-/* { dg-final { object-size text <= 30 } } */
+/* { dg-final { object-size text <= 30 { target { ! arm*-*-uclinuxfdpiceabi } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr43920-2.c b/gcc/testsuite/gcc.target/arm/pr43920-2.c
index f5e8f48..c367d6b 100644
--- a/gcc/testsuite/gcc.target/arm/pr43920-2.c
+++ b/gcc/testsuite/gcc.target/arm/pr43920-2.c
@@ -29,4 +29,4 @@ int getFileStartAndLength (int fd, int *start_, size_t *length_)
/* { dg-final { scan-assembler-times "pop" 2 } } */
/* { dg-final { scan-assembler-times "beq" 3 } } */
-/* { dg-final { object-size text <= 54 } } */
+/* { dg-final { object-size text <= 54 { target { ! arm*-*-uclinuxfdpiceabi } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr45701-1.c b/gcc/testsuite/gcc.target/arm/pr45701-1.c
index 01db15a..b26011b 100644
--- a/gcc/testsuite/gcc.target/arm/pr45701-1.c
+++ b/gcc/testsuite/gcc.target/arm/pr45701-1.c
@@ -1,8 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
/* { dg-options "-mthumb -Os" } */
-/* { dg-final { scan-assembler "push\t\{r3" } } */
-/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */
+/* { dg-final { scan-assembler "push\t\{r3" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler-not "\[^\-\]r8" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
extern int hist_verify;
extern int a1;
diff --git a/gcc/testsuite/gcc.target/arm/pr45701-2.c b/gcc/testsuite/gcc.target/arm/pr45701-2.c
index ce66d75..32eed4d 100644
--- a/gcc/testsuite/gcc.target/arm/pr45701-2.c
+++ b/gcc/testsuite/gcc.target/arm/pr45701-2.c
@@ -1,8 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
/* { dg-options "-mthumb -Os" } */
-/* { dg-final { scan-assembler "push\t\{r3" } } */
-/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */
+/* { dg-final { scan-assembler "push\t\{r3" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler-not "\[^\-\]r8" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
extern int hist_verify;
extern int a1;
diff --git a/gcc/testsuite/gcc.target/arm/pr61948.c b/gcc/testsuite/gcc.target/arm/pr61948.c
index 411e898..3b2b72a 100644
--- a/gcc/testsuite/gcc.target/arm/pr61948.c
+++ b/gcc/testsuite/gcc.target/arm/pr61948.c
@@ -1,5 +1,6 @@
/* PR target/61948 */
/* { dg-do compile } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-require-effective-target arm_neon_ok } */
/* { dg-require-effective-target arm_thumb2_ok } */
/* { dg-options "-O2 -mthumb" } */
diff --git a/gcc/testsuite/gcc.target/arm/pr77933-1.c b/gcc/testsuite/gcc.target/arm/pr77933-1.c
index 95cf68e..86b9507 100644
--- a/gcc/testsuite/gcc.target/arm/pr77933-1.c
+++ b/gcc/testsuite/gcc.target/arm/pr77933-1.c
@@ -1,4 +1,5 @@
/* { dg-do run } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-O2" } */
__attribute__ ((noinline, noclone)) void
diff --git a/gcc/testsuite/gcc.target/arm/pr77933-2.c b/gcc/testsuite/gcc.target/arm/pr77933-2.c
index 9028c4f..a06c11a 100644
--- a/gcc/testsuite/gcc.target/arm/pr77933-2.c
+++ b/gcc/testsuite/gcc.target/arm/pr77933-2.c
@@ -1,5 +1,6 @@
/* { dg-do run } */
/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-mthumb -O2 -mtpcs-leaf-frame" } */
__attribute__ ((noinline, noclone)) void
diff --git a/gcc/testsuite/gcc.target/arm/sibcall-1.c b/gcc/testsuite/gcc.target/arm/sibcall-1.c
index cf352c1..dcdd552 100644
--- a/gcc/testsuite/gcc.target/arm/sibcall-1.c
+++ b/gcc/testsuite/gcc.target/arm/sibcall-1.c
@@ -1,5 +1,6 @@
/* { dg-do compile { target { arm32 } } } */
/* { dg-options "-O2" } */
+/* { dg-skip-if "FDPIC does not support sibcall optimization" { arm*-*-uclinuxfdpiceabi } "*" "" } */
#define noinline __attribute__((noinline))
diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
index b29ed0b..3385d7d 100644
--- a/gcc/testsuite/gcc.target/arm/stack-red-zone.c
+++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
@@ -1,7 +1,7 @@
/* No stack red zone. PR38644. */
/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
/* { dg-options "-mthumb -O2" } */
-/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */
+/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
extern int doStreamReadBlock (int *, char *, int size, int);
diff --git a/gcc/testsuite/gcc.target/arm/tail-long-call.c b/gcc/testsuite/gcc.target/arm/tail-long-call.c
index 9b27468..f70e9cf 100644
--- a/gcc/testsuite/gcc.target/arm/tail-long-call.c
+++ b/gcc/testsuite/gcc.target/arm/tail-long-call.c
@@ -1,4 +1,5 @@
/* { dg-skip-if "need at least armv5te" { *-*-* } { "-march=armv[234]*" "-mthumb" } { "" } } */
+/* { dg-skip-if "FDPIC does not support tailcall optimization" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-O2 -march=armv5te -marm" } */
/* { dg-final { scan-assembler "bx" } } */
/* { dg-final { scan-assembler-not "blx" } } */
diff --git a/gcc/testsuite/gcc.target/arm/tlscall.c b/gcc/testsuite/gcc.target/arm/tlscall.c
index 366c1ae..5f4d58b 100644
--- a/gcc/testsuite/gcc.target/arm/tlscall.c
+++ b/gcc/testsuite/gcc.target/arm/tlscall.c
@@ -2,6 +2,7 @@
/* { dg-do assemble } */
/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */
+/* { dg-skip-if "FDPIC does not support gnu2 TLS dialect" { arm*-*-uclinuxfdpiceabi } "*" "" } */
typedef struct _IO_FILE FILE;
diff --git a/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c b/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
index fa22b4d..817d5d0 100644
--- a/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
+++ b/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
@@ -1,4 +1,5 @@
/* { dg-do run } */
+/* { dg-skip-if "FDPIC does not support sibcall optimization" { arm*-*-uclinuxfdpiceabi } "*" "" } */
/* { dg-options "-mapcs-frame -O -foptimize-sibling-calls -ffunction-sections" } */
extern void abort (void);
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 16/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (13 preceding siblings ...)
2019-05-15 12:45 ` [ARM/FDPIC v5 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests Christophe Lyon
@ 2019-05-15 12:45 ` Christophe Lyon
2019-07-19 8:56 ` Kyrill Tkachov
2019-05-15 12:45 ` [ARM/FDPIC v5 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns Christophe Lyon
` (7 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:45 UTC (permalink / raw)
To: gcc-patches
Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC
code and they don't support it: skip them. They also fail on
arm*-linux* when forcing -fPIC.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* gcc.target/arm/eliminate.c: Accept only nonpic targets.
* g++.dg/other/anon5.C: Likewise.
Change-Id: I8efb8d356ce25b020c44a84b07f79a996dca0358
diff --git a/gcc/testsuite/g++.dg/other/anon5.C b/gcc/testsuite/g++.dg/other/anon5.C
index ee4601e..dadd92e 100644
--- a/gcc/testsuite/g++.dg/other/anon5.C
+++ b/gcc/testsuite/g++.dg/other/anon5.C
@@ -1,5 +1,6 @@
// PR c++/34094
// { dg-do link { target { ! { *-*-darwin* *-*-hpux* *-*-solaris2.* } } } }
+// { dg-require-effective-target nonpic }
// { dg-options "-gdwarf-2" }
// Ignore additional message on powerpc-ibm-aix
// { dg-prune-output "obtain more information" } */
diff --git a/gcc/testsuite/gcc.target/arm/eliminate.c b/gcc/testsuite/gcc.target/arm/eliminate.c
index f254dd8..299d4df 100644
--- a/gcc/testsuite/gcc.target/arm/eliminate.c
+++ b/gcc/testsuite/gcc.target/arm/eliminate.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { nonpic } } } */
/* { dg-options "-O2" } */
struct X
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (14 preceding siblings ...)
2019-05-15 12:45 ` [ARM/FDPIC v5 16/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode Christophe Lyon
@ 2019-05-15 12:45 ` Christophe Lyon
2019-07-19 8:54 ` Kyrill Tkachov
2019-05-15 12:46 ` [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux* Christophe Lyon
` (6 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:45 UTC (permalink / raw)
To: gcc-patches
In FDPIC mode, r9 is saved in addition to other registers, so update
the expected patterns accordingly.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* gcc/testsuite/
* gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/interrupt-2.c: Likewise.
* gcc.target/arm/pr70830.c: Likewise.
Change-Id: Id946b79bacc32be585c31e60a355191f104cc29e
diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c b/gcc/testsuite/gcc.target/arm/interrupt-1.c
index fe94877..493763d 100644
--- a/gcc/testsuite/gcc.target/arm/interrupt-1.c
+++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c
@@ -13,5 +13,7 @@ void foo ()
bar (0);
}
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r9, fp, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r9, fp, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c b/gcc/testsuite/gcc.target/arm/interrupt-2.c
index 289eca0..5be1f16 100644
--- a/gcc/testsuite/gcc.target/arm/interrupt-2.c
+++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c
@@ -15,5 +15,7 @@ void test()
foo = 0;
}
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r6, r9, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r6, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr70830.c b/gcc/testsuite/gcc.target/arm/pr70830.c
index cad903b..cd84c42 100644
--- a/gcc/testsuite/gcc.target/arm/pr70830.c
+++ b/gcc/testsuite/gcc.target/arm/pr70830.c
@@ -11,4 +11,5 @@ void __attribute__ ((interrupt ("IRQ"))) dm3730_IRQHandler(void)
{
prints("IRQ" );
}
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux*
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (15 preceding siblings ...)
2019-05-15 12:45 ` [ARM/FDPIC v5 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns Christophe Lyon
@ 2019-05-15 12:46 ` Christophe Lyon
2019-07-19 8:57 ` Kyrill Tkachov
2019-05-15 12:46 ` [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets Christophe Lyon
` (5 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:46 UTC (permalink / raw)
To: gcc-patches
Add *-*-uclinux* to tests that work on this target.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* g++.dg/abi/forced.C: Add *-*-uclinux*.
* g++.dg/abi/guard2.C: Likewise.
* g++.dg/ext/cleanup-10.C: Likewise.
* g++.dg/ext/cleanup-11.C: Likewise.
* g++.dg/ext/cleanup-8.C: Likewise.
* g++.dg/ext/cleanup-9.C: Likewise.
* g++.dg/ext/sync-4.C: Likewise.
* g++.dg/ipa/comdat.C: Likewise.
* gcc.dg/20041106-1.c: Likewise.
* gcc.dg/cleanup-10.c: Likewise.
* gcc.dg/cleanup-11.c: Likewise.
* gcc.dg/cleanup-8.c: Likewise.
* gcc.dg/cleanup-9.c: Likewise.
* gcc.dg/fdata-sections-1.c: Likewise.
* gcc.dg/fdata-sections-2.c: Likewise.
* gcc.dg/pr39323-1.c: Likewise.
* gcc.dg/pr39323-2.c: Likewise.
* gcc.dg/pr39323-3.c: Likewise.
* gcc.dg/pr65780-1.c: Likewise.
* gcc.dg/pr65780-2.c: Likewise.
* gcc.dg/pr67338.c: Likewise.
* gcc.dg/pr78185.c: Likewise.
* gcc.dg/pr83100-1.c: Likewise.
* gcc.dg/pr83100-4.c: Likewise.
* gcc.dg/strlenopt-12g.c: Likewise.
* gcc.dg/strlenopt-14g.c: Likewise.
* gcc.dg/strlenopt-14gf.c: Likewise.
* gcc.dg/strlenopt-16g.c: Likewise.
* gcc.dg/strlenopt-17g.c: Likewise.
* gcc.dg/strlenopt-18g.c: Likewise.
* gcc.dg/strlenopt-1f.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-2f.c: Likewise.
* gcc.dg/strlenopt-31g.c: Likewise.
* gcc.dg/strlenopt-33g.c: Likewise.
* gcc.dg/strlenopt-4g.c: Likewise.
* gcc.dg/strlenopt-4gf.c: Likewise.
* gcc.dg/strncmp-2.c: Likewise.
* gcc.dg/struct-ret-3.c: Likewise.
* gcc.dg/torture/pr69760.c: Likewise.
* gcc.target/arm/div64-unwinding.c: Likewise.
* gcc.target/arm/stack-checking.c: Likewise.
* gcc.target/arm/synchronize.c: Likewise.
* gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
* lib/target-supports.exp (check_effective_target_pie): Likewise.
(check_effective_target_sync_long_long_runtime): Likewise.
(check_effective_target_sync_int_long): Likewise.
(check_effective_target_sync_char_short): Likewise.
Change-Id: I89bfea79d4490c5df0b6470def5a31d7f31ac2cc
diff --git a/gcc/testsuite/g++.dg/abi/forced.C b/gcc/testsuite/g++.dg/abi/forced.C
index 0e6be28..2d1ec53 100644
--- a/gcc/testsuite/g++.dg/abi/forced.C
+++ b/gcc/testsuite/g++.dg/abi/forced.C
@@ -1,4 +1,4 @@
-// { dg-do run { target *-*-linux* *-*-gnu* } }
+// { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } }
// { dg-options "-pthread" }
#include <pthread.h>
diff --git a/gcc/testsuite/g++.dg/abi/guard2.C b/gcc/testsuite/g++.dg/abi/guard2.C
index c35fa7e..74139a8 100644
--- a/gcc/testsuite/g++.dg/abi/guard2.C
+++ b/gcc/testsuite/g++.dg/abi/guard2.C
@@ -1,6 +1,6 @@
// PR c++/41611
// Test that the guard gets its own COMDAT group.
-// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* } } }
+// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* *-*-uclinux* } } }
struct A {
static int f()
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-10.C b/gcc/testsuite/g++.dg/ext/cleanup-10.C
index 66c7b76..56aeb66 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-10.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-10.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* Verify that cleanups work with exception handling through signal frames
on alternate stack. */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-11.C b/gcc/testsuite/g++.dg/ext/cleanup-11.C
index 6e96521..c6d3560 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-11.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-11.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* Verify that cleanups work with exception handling through realtime signal
frames on alternate stack. */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-8.C b/gcc/testsuite/g++.dg/ext/cleanup-8.C
index ccf9bef..e99508d 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-8.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-8.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* Verify that cleanups work with exception handling through signal
frames. */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-9.C b/gcc/testsuite/g++.dg/ext/cleanup-9.C
index dcdfcae..45e5f90 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-9.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-9.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* Verify that cleanups work with exception handling through realtime
signal frames. */
diff --git a/gcc/testsuite/g++.dg/ext/sync-4.C b/gcc/testsuite/g++.dg/ext/sync-4.C
index 8a2de48..029afb0 100644
--- a/gcc/testsuite/g++.dg/ext/sync-4.C
+++ b/gcc/testsuite/g++.dg/ext/sync-4.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* FIXME The following additional option should be removed after the fix for radr://19802258.
/* { dg-xfail-run-if "PR60563 radr://19802258" { *-*-darwin* } } */
/* { dg-require-effective-target sync_long_long_runtime } */
diff --git a/gcc/testsuite/g++.dg/ipa/comdat.C b/gcc/testsuite/g++.dg/ipa/comdat.C
index 1945e32..f3df99a 100644
--- a/gcc/testsuite/g++.dg/ipa/comdat.C
+++ b/gcc/testsuite/g++.dg/ipa/comdat.C
@@ -1,4 +1,4 @@
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-ipa-comdats" } */
#include <stdio.h>
__attribute__ ((noinline))
diff --git a/gcc/testsuite/gcc.dg/20041106-1.c b/gcc/testsuite/gcc.dg/20041106-1.c
index cba4a06..95579ff 100644
--- a/gcc/testsuite/gcc.dg/20041106-1.c
+++ b/gcc/testsuite/gcc.dg/20041106-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* *-*-uclinux* } } */
/* { dg-options -O2 } */
#include <sys/types.h>
diff --git a/gcc/testsuite/gcc.dg/cleanup-10.c b/gcc/testsuite/gcc.dg/cleanup-10.c
index 1af63ea..9fc8658 100644
--- a/gcc/testsuite/gcc.dg/cleanup-10.c
+++ b/gcc/testsuite/gcc.dg/cleanup-10.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* { dg-require-effective-target exceptions } */
/* Verify that cleanups work with exception handling through signal frames
diff --git a/gcc/testsuite/gcc.dg/cleanup-11.c b/gcc/testsuite/gcc.dg/cleanup-11.c
index c1f19fe..6b499d4 100644
--- a/gcc/testsuite/gcc.dg/cleanup-11.c
+++ b/gcc/testsuite/gcc.dg/cleanup-11.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* { dg-require-effective-target exceptions } */
/* Verify that cleanups work with exception handling through realtime signal
diff --git a/gcc/testsuite/gcc.dg/cleanup-8.c b/gcc/testsuite/gcc.dg/cleanup-8.c
index 45abdb2..87f4186 100644
--- a/gcc/testsuite/gcc.dg/cleanup-8.c
+++ b/gcc/testsuite/gcc.dg/cleanup-8.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* { dg-require-effective-target exceptions } */
/* Verify that cleanups work with exception handling through signal
diff --git a/gcc/testsuite/gcc.dg/cleanup-9.c b/gcc/testsuite/gcc.dg/cleanup-9.c
index 98dc268..d34ce12 100644
--- a/gcc/testsuite/gcc.dg/cleanup-9.c
+++ b/gcc/testsuite/gcc.dg/cleanup-9.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
/* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
/* { dg-require-effective-target exceptions } */
/* Verify that cleanups work with exception handling through realtime
diff --git a/gcc/testsuite/gcc.dg/fdata-sections-1.c b/gcc/testsuite/gcc.dg/fdata-sections-1.c
index 51686b9..e8a6639 100644
--- a/gcc/testsuite/gcc.dg/fdata-sections-1.c
+++ b/gcc/testsuite/gcc.dg/fdata-sections-1.c
@@ -1,7 +1,7 @@
/* PR middle-end/15486 */
/* Origin: Jonathan Larmour <jifl-bugzilla@jifvik.org> */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-fdata-sections" } */
int x;
diff --git a/gcc/testsuite/gcc.dg/fdata-sections-2.c b/gcc/testsuite/gcc.dg/fdata-sections-2.c
index dda90ba7..48d44a2 100644
--- a/gcc/testsuite/gcc.dg/fdata-sections-2.c
+++ b/gcc/testsuite/gcc.dg/fdata-sections-2.c
@@ -4,7 +4,7 @@
/* This checks that string constants are put in per-function rodata
sections, so that they can be garbage collected. */
-/* { dg-do compile { target *-*-linux* } } */
+/* { dg-do compile { target *-*-linux* *-*-uclinux* } } */
/* { dg-options "-O -ffunction-sections -fdata-sections" } */
const char *f1(void) { return "falderalde"; }
diff --git a/gcc/testsuite/gcc.dg/pr39323-1.c b/gcc/testsuite/gcc.dg/pr39323-1.c
index 7a7fd63..d84009c 100644
--- a/gcc/testsuite/gcc.dg/pr39323-1.c
+++ b/gcc/testsuite/gcc.dg/pr39323-1.c
@@ -1,5 +1,5 @@
/* PR c/39323 - MAX_OFILE_ALIGNMENT in elfos.h is too big */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
int foo __attribute__ ((aligned(1 << 29))) = 20; /* { dg-error "requested alignment" } */
typedef int __attribute__ ((aligned(1 << 29))) int29; /* { dg-error "requested alignment" } */
diff --git a/gcc/testsuite/gcc.dg/pr39323-2.c b/gcc/testsuite/gcc.dg/pr39323-2.c
index a870729..6b6cb2e 100644
--- a/gcc/testsuite/gcc.dg/pr39323-2.c
+++ b/gcc/testsuite/gcc.dg/pr39323-2.c
@@ -1,5 +1,5 @@
/* PR c/39323 */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
int bar __attribute__ ((aligned(1 << 28))) = 20;
diff --git a/gcc/testsuite/gcc.dg/pr39323-3.c b/gcc/testsuite/gcc.dg/pr39323-3.c
index b452d3c..2e2c1a2 100644
--- a/gcc/testsuite/gcc.dg/pr39323-3.c
+++ b/gcc/testsuite/gcc.dg/pr39323-3.c
@@ -1,5 +1,5 @@
/* PR c/39323 */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
typedef int __attribute__ ((aligned(1 << 28))) int28;
int28 foo = 20;
diff --git a/gcc/testsuite/gcc.dg/pr65780-1.c b/gcc/testsuite/gcc.dg/pr65780-1.c
index b586211..5e3226e 100644
--- a/gcc/testsuite/gcc.dg/pr65780-1.c
+++ b/gcc/testsuite/gcc.dg/pr65780-1.c
@@ -1,5 +1,5 @@
/* PR target/65780 */
-/* { dg-do link { target *-*-linux* *-*-gnu* } } */
+/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2" } */
int optopt;
diff --git a/gcc/testsuite/gcc.dg/pr65780-2.c b/gcc/testsuite/gcc.dg/pr65780-2.c
index bff3323..932cbe1 100644
--- a/gcc/testsuite/gcc.dg/pr65780-2.c
+++ b/gcc/testsuite/gcc.dg/pr65780-2.c
@@ -1,5 +1,5 @@
/* PR target/65780 */
-/* { dg-do link { target *-*-linux* *-*-gnu* } } */
+/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-require-effective-target pie } */
/* { dg-options "-O2 -fpie" } */
diff --git a/gcc/testsuite/gcc.dg/pr67338.c b/gcc/testsuite/gcc.dg/pr67338.c
index 0fdc302..7bfbef2 100644
--- a/gcc/testsuite/gcc.dg/pr67338.c
+++ b/gcc/testsuite/gcc.dg/pr67338.c
@@ -1,4 +1,4 @@
/* PR c/67338 */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
struct S { __attribute__((aligned (1 << 28))) double a; };
diff --git a/gcc/testsuite/gcc.dg/pr78185.c b/gcc/testsuite/gcc.dg/pr78185.c
index 405f748..d7781b2 100644
--- a/gcc/testsuite/gcc.dg/pr78185.c
+++ b/gcc/testsuite/gcc.dg/pr78185.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O" } */
#include <unistd.h>
diff --git a/gcc/testsuite/gcc.dg/pr83100-1.c b/gcc/testsuite/gcc.dg/pr83100-1.c
index 233c1f6..ccfb8c6 100644
--- a/gcc/testsuite/gcc.dg/pr83100-1.c
+++ b/gcc/testsuite/gcc.dg/pr83100-1.c
@@ -1,5 +1,5 @@
/* PR target/83100 */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fcommon -fdata-sections" } */
const int a;
diff --git a/gcc/testsuite/gcc.dg/pr83100-4.c b/gcc/testsuite/gcc.dg/pr83100-4.c
index bb26735..2f83247 100644
--- a/gcc/testsuite/gcc.dg/pr83100-4.c
+++ b/gcc/testsuite/gcc.dg/pr83100-4.c
@@ -1,5 +1,5 @@
/* PR target/83100 */
-/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
+/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fno-common -fdata-sections" } */
const int a;
diff --git a/gcc/testsuite/gcc.dg/strlenopt-12g.c b/gcc/testsuite/gcc.dg/strlenopt-12g.c
index f1dec1f..fb0eeb2 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-12g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-12g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy function. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-14g.c b/gcc/testsuite/gcc.dg/strlenopt-14g.c
index 62a83bf..8bce645 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-14g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-14g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy and mempcpy functions. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
/* Bionic targets don't have mempcpy */
/* { dg-require-effective-target non_bionic } */
diff --git a/gcc/testsuite/gcc.dg/strlenopt-14gf.c b/gcc/testsuite/gcc.dg/strlenopt-14gf.c
index 8b126fc..cc9092b 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-14gf.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-14gf.c
@@ -1,6 +1,6 @@
/* This test needs runtime that provides stpcpy, mempcpy and __*_chk
functions. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
/* Bionic targets don't have mempcpy */
/* { dg-require-effective-target non_bionic } */
diff --git a/gcc/testsuite/gcc.dg/strlenopt-16g.c b/gcc/testsuite/gcc.dg/strlenopt-16g.c
index 0cf8410..8b8f0d6 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-16g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-16g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy function. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-17g.c b/gcc/testsuite/gcc.dg/strlenopt-17g.c
index 184e530..0d5f559 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-17g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-17g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy function. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-18g.c b/gcc/testsuite/gcc.dg/strlenopt-18g.c
index f734675..e3706d2 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-18g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-18g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy function. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-1f.c b/gcc/testsuite/gcc.dg/strlenopt-1f.c
index 856774d..bb320ab 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-1f.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-1f.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides __*_chk functions. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinu* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define FORTIFY_SOURCE 2
diff --git a/gcc/testsuite/gcc.dg/strlenopt-22g.c b/gcc/testsuite/gcc.dg/strlenopt-22g.c
index 9c5d020..348903f 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-22g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-22g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy function. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-2f.c b/gcc/testsuite/gcc.dg/strlenopt-2f.c
index 1e915da..f61a8ba 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-2f.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-2f.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides __*_chk functions. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define FORTIFY_SOURCE 2
diff --git a/gcc/testsuite/gcc.dg/strlenopt-31g.c b/gcc/testsuite/gcc.dg/strlenopt-31g.c
index 45cc29c..3588b06 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-31g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-31g.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-33g.c b/gcc/testsuite/gcc.dg/strlenopt-33g.c
index 7d24d2b..8566782 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-33g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-33g.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-4g.c b/gcc/testsuite/gcc.dg/strlenopt-4g.c
index 879d566..c6a2d6f 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-4g.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-4g.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy function. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strlenopt-4gf.c b/gcc/testsuite/gcc.dg/strlenopt-4gf.c
index 7f261b7..2783c3b 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-4gf.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-4gf.c
@@ -1,5 +1,5 @@
/* This test needs runtime that provides stpcpy and __*_chk functions. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2 -fdump-tree-strlen" } */
#define USE_GNU
diff --git a/gcc/testsuite/gcc.dg/strncmp-2.c b/gcc/testsuite/gcc.dg/strncmp-2.c
index f5555ba..6818b30 100644
--- a/gcc/testsuite/gcc.dg/strncmp-2.c
+++ b/gcc/testsuite/gcc.dg/strncmp-2.c
@@ -1,5 +1,5 @@
/* Test strncmp builtin expansion for compilation and proper execution. */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-options "-O2" } */
/* { dg-require-effective-target ptr32plus } */
diff --git a/gcc/testsuite/gcc.dg/struct-ret-3.c b/gcc/testsuite/gcc.dg/struct-ret-3.c
index 4083bb4..4c0a0e6 100644
--- a/gcc/testsuite/gcc.dg/struct-ret-3.c
+++ b/gcc/testsuite/gcc.dg/struct-ret-3.c
@@ -1,7 +1,7 @@
/* PR middle-end/31309 */
/* Origin: Peeter Joot <peeterj@ca.ibm.com> */
-/* { dg-do run { target *-*-linux* *-*-gnu* } } */
+/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
/* { dg-add-options stack_size } */
#include <sys/mman.h>
diff --git a/gcc/testsuite/gcc.dg/torture/pr69760.c b/gcc/testsuite/gcc.dg/torture/pr69760.c
index 8f24608..53733c7 100644
--- a/gcc/testsuite/gcc.dg/torture/pr69760.c
+++ b/gcc/testsuite/gcc.dg/torture/pr69760.c
@@ -1,5 +1,5 @@
/* PR tree-optimization/69760 */
-/* { dg-do run { target { { *-*-linux* *-*-gnu* } && mmap } } } */
+/* { dg-do run { target { { *-*-linux* *-*-gnu* *-*-uclinux* } && mmap } } } */
/* { dg-options "-O2" } */
#include <unistd.h>
diff --git a/gcc/testsuite/gcc.target/arm/div64-unwinding.c b/gcc/testsuite/gcc.target/arm/div64-unwinding.c
index 7f112ee..0944281 100644
--- a/gcc/testsuite/gcc.target/arm/div64-unwinding.c
+++ b/gcc/testsuite/gcc.target/arm/div64-unwinding.c
@@ -1,6 +1,6 @@
/* Performing a 64-bit division should not pull in the unwinder. */
-/* { dg-do run { target { ! *-*-linux* } } } */
+/* { dg-do run { target { { ! *-*-linux* } && { ! *-*-uclinux* } } } } */
/* { dg-options "-O0" } */
#include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/arm/pr66912.c b/gcc/testsuite/gcc.target/arm/pr66912.c
index 27e4c45..7e6294c 100644
--- a/gcc/testsuite/gcc.target/arm/pr66912.c
+++ b/gcc/testsuite/gcc.target/arm/pr66912.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target *-*-linux* } } */
+/* { dg-do compile { target *-*-linux* arm*-*-uclinuxfdpiceabi } } */
/* { dg-options "-O2 -fpic" } */
__attribute__((visibility("protected")))
diff --git a/gcc/testsuite/gcc.target/arm/stack-checking.c b/gcc/testsuite/gcc.target/arm/stack-checking.c
index 4b53bed..9d1d2b0 100644
--- a/gcc/testsuite/gcc.target/arm/stack-checking.c
+++ b/gcc/testsuite/gcc.target/arm/stack-checking.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { *-*-linux* } } } */
+/* { dg-do run { target { *-*-linux* *-*-uclinux* } } } */
/* { dg-require-stack-check "" } */
/* { dg-options "-fstack-check" } */
diff --git a/gcc/testsuite/gcc.target/arm/synchronize.c b/gcc/testsuite/gcc.target/arm/synchronize.c
index 7ef10e2..912f407 100644
--- a/gcc/testsuite/gcc.target/arm/synchronize.c
+++ b/gcc/testsuite/gcc.target/arm/synchronize.c
@@ -1,4 +1,4 @@
-/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-* } } } */
+/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-* arm*-*-uclinux* } } } */
void *foo (void)
{
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 4bb7da2..60d68f4 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1189,6 +1189,7 @@ proc check_effective_target_pie { } {
|| [istarget *-*-dragonfly*]
|| [istarget *-*-freebsd*]
|| [istarget *-*-linux*]
+ || [istarget arm*-*-uclinuxfdpiceabi]
|| [istarget *-*-gnu*]
|| [istarget *-*-amdhsa]} {
return 1;
@@ -6752,6 +6753,7 @@ proc check_effective_target_sync_long_long_runtime { } {
} ""
}])
|| [istarget aarch64*-*-*]
+ || [istarget arm*-*-uclinuxfdpiceabi]
|| ([istarget arm*-*-linux-*]
&& [check_runtime sync_longlong_runtime {
#include <stdlib.h>
@@ -6812,6 +6814,7 @@ proc check_effective_target_sync_int_long { } {
|| [istarget aarch64*-*-*]
|| [istarget alpha*-*-*]
|| [istarget arm*-*-linux-*]
+ || [istarget arm*-*-uclinuxfdpiceabi]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_acq_rel])
|| [istarget bfin*-*linux*]
@@ -6836,6 +6839,7 @@ proc check_effective_target_sync_char_short { } {
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| [istarget alpha*-*-*]
|| [istarget arm*-*-linux-*]
+ || [istarget arm*-*-uclinuxfdpiceabi]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_acq_rel])
|| [istarget hppa*-*linux*]
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 19/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (17 preceding siblings ...)
2019-05-15 12:46 ` [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets Christophe Lyon
@ 2019-05-15 12:46 ` Christophe Lyon
2019-07-19 9:00 ` Kyrill Tkachov
2019-05-15 12:47 ` [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC Christophe Lyon
` (3 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:46 UTC (permalink / raw)
To: gcc-patches
uclibc defines bswap_32, so use a different name in this test.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32.
Change-Id: I2591bd911030814331cabf97ee5cf6cf8124b4f3
diff --git a/gcc/testsuite/gcc.target/arm/pr43698.c b/gcc/testsuite/gcc.target/arm/pr43698.c
index 1fc497c..3b5dad0 100644
--- a/gcc/testsuite/gcc.target/arm/pr43698.c
+++ b/gcc/testsuite/gcc.target/arm/pr43698.c
@@ -6,7 +6,7 @@
char do_reverse_endian = 0;
-# define bswap_32(x) \
+# define my_bswap_32(x) \
((((x) & 0xff000000) >> 24) | \
(((x) & 0x00ff0000) >> 8) | \
(((x) & 0x0000ff00) << 8) | \
@@ -16,7 +16,7 @@ char do_reverse_endian = 0;
(__extension__ ({ \
uint64_t __res; \
if (!do_reverse_endian) { __res = (X); \
- } else if (sizeof(X) == 4) { __res = bswap_32((X)); \
+ } else if (sizeof(X) == 4) { __res = my_bswap_32((X)); \
} \
__res; \
}))
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (16 preceding siblings ...)
2019-05-15 12:46 ` [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux* Christophe Lyon
@ 2019-05-15 12:46 ` Christophe Lyon
2019-07-19 8:59 ` Kyrill Tkachov
2019-05-15 12:46 ` [ARM/FDPIC v5 19/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc Christophe Lyon
` (4 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:46 UTC (permalink / raw)
To: gcc-patches
Some tests have the "nonpic" guard, but pass on
arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
than adding this target to all these tests, add the "pie_enabled"
effective target.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
* g++.dg/ipa/devirt-c-7.C: Likewise.
* g++.dg/ipa/ivinline-1.C: Likewise.
* g++.dg/ipa/ivinline-2.C: Likewise.
* g++.dg/ipa/ivinline-3.C: Likewise.
* g++.dg/ipa/ivinline-4.C: Likewise.
* g++.dg/ipa/ivinline-5.C: Likewise.
* g++.dg/ipa/ivinline-7.C: Likewise.
* g++.dg/ipa/ivinline-8.C: Likewise.
* g++.dg/ipa/ivinline-9.C: Likewise.
* g++.dg/tls/pr79288.C: Likewise.
* gcc.dg/addr_equal-1.c: Likewise.
* gcc.dg/const-1.c: Likewise.
* gcc.dg/ipa/pure-const-1.c: Likewise.
* gcc.dg/noreturn-8.c: Likewise.
* gcc.dg/pr33826.c: Likewise.
* gcc.dg/torture/ipa-pta-1.c: Likewise.
* gcc.dg/tree-ssa/alias-2.c: Likewise.
* gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
* gcc.dg/tree-ssa/loadpre6.c: Likewise.
* gcc.dg/uninit-19.c: Likewise.
Change-Id: I1a0d836b892c23891f739fccdc467d0f354ab82c
diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
index 2d37867..906a44d 100644
--- a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
+++ b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
@@ -1,6 +1,6 @@
// Runtime test for noexcept-specification.
// { dg-options "-Wnoexcept" }
-// { dg-do run { target nonpic } }
+// { dg-do run { target { nonpic || pie_enabled } } }
// { dg-require-effective-target c++11 }
#include <exception>
diff --git a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
index 2e76cbe..efb65c2 100644
--- a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
+++ b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
@@ -1,7 +1,6 @@
/* Verify that ipa-cp will not get confused by placement new constructing an
object within another one when looking for dynamic type change . */
-/* { dg-do run } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -Wno-attributes" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-1.C b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
index 9b10d20..2d988bc 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-1.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
@@ -1,6 +1,6 @@
/* Verify that simple virtual calls are inlined even without early
inlining. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-2.C b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
index 21cd46f..d978638 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-2.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
@@ -1,6 +1,6 @@
/* Verify that simple virtual calls using this pointer are inlined
even without early inlining.. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-3.C b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
index 1e24644..f756a16 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-3.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
@@ -1,6 +1,6 @@
/* Verify that simple virtual calls on an object refrence are inlined
even without early inlining. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-4.C b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
index cf0d980..5fbd3ef 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-4.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
@@ -1,7 +1,7 @@
/* Verify that simple virtual calls are inlined even without early
inlining, even when a typecast to an ancestor is involved along the
way. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-5.C b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
index f15ebf2..6c19907 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-5.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
@@ -1,6 +1,6 @@
/* Verify that virtual call inlining does not pick a wrong method when
there is a user defined ancestor in an object. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-7.C b/gcc/testsuite/g++.dg/ipa/ivinline-7.C
index a7b41e7..fd6aba6 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-7.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-7.C
@@ -1,7 +1,7 @@
/* Verify that simple virtual calls are inlined even without early
inlining, even when a typecast to an ancestor is involved along the
way and that ancestor is not the first one with virtual functions. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-8.C b/gcc/testsuite/g++.dg/ipa/ivinline-8.C
index 5c3299f..bc81abf 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-8.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-8.C
@@ -1,6 +1,6 @@
/* Verify that virtual calls are inlined (ithout early inlining) even
when their caller is itself indirectly inlined. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-9.C b/gcc/testsuite/g++.dg/ipa/ivinline-9.C
index 41b2381..0917f15 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-9.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-9.C
@@ -2,7 +2,7 @@
inlining, even when a typecast to an ancestor is involved along the
way and that ancestor itself has an ancestor wich is not the
primary base class. */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/tls/pr79288.C b/gcc/testsuite/g++.dg/tls/pr79288.C
index 9f488df..da6751f 100644
--- a/gcc/testsuite/g++.dg/tls/pr79288.C
+++ b/gcc/testsuite/g++.dg/tls/pr79288.C
@@ -1,5 +1,5 @@
// PR c++/79288
-// { dg-do compile { target nonpic } }
+// { dg-do compile { target { nonpic || pie_enabled } } }
// { dg-require-effective-target tls }
// { dg-options "-O2" }
// { dg-final { scan-assembler-not "@tpoff" { target i?86-*-* x86_64-*-* } } }
diff --git a/gcc/testsuite/gcc.dg/addr_equal-1.c b/gcc/testsuite/gcc.dg/addr_equal-1.c
index 18b0dc9..35fa010 100644
--- a/gcc/testsuite/gcc.dg/addr_equal-1.c
+++ b/gcc/testsuite/gcc.dg/addr_equal-1.c
@@ -1,5 +1,4 @@
-/* { dg-do run } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-require-weak "" } */
/* { dg-require-alias "" } */
/* { dg-options "-O2 -fdelete-null-pointer-checks" } */
diff --git a/gcc/testsuite/gcc.dg/const-1.c b/gcc/testsuite/gcc.dg/const-1.c
index a5b2b16..aa20aad 100644
--- a/gcc/testsuite/gcc.dg/const-1.c
+++ b/gcc/testsuite/gcc.dg/const-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target nonpic } } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-O2 -Wsuggest-attribute=const" } */
extern int extern_const(int a) __attribute__ ((const));
diff --git a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
index 06b415e..dd58457 100644
--- a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
+++ b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target nonpic } } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-tree-local-pure-const1 -fdump-ipa-pure-const -fdump-tree-optimized -fno-early-inlining -fgnu89-inline" } */
void abort (void);
int error_code;
diff --git a/gcc/testsuite/gcc.dg/noreturn-8.c b/gcc/testsuite/gcc.dg/noreturn-8.c
index 294800b..ce41cab 100644
--- a/gcc/testsuite/gcc.dg/noreturn-8.c
+++ b/gcc/testsuite/gcc.dg/noreturn-8.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
/* { dg-options "-O2" } */
void exit (int);
void noreturn_autodetection_failed ();
diff --git a/gcc/testsuite/gcc.dg/pr33826.c b/gcc/testsuite/gcc.dg/pr33826.c
index df83915..d222774 100644
--- a/gcc/testsuite/gcc.dg/pr33826.c
+++ b/gcc/testsuite/gcc.dg/pr33826.c
@@ -1,8 +1,7 @@
/* Regression test for PR middle-end/33826 */
/* Verify that recursive functions cannot be pure or const. */
-/* { dg-do compile } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-O1 -fdump-tree-local-pure-const1 -fdump-ipa-pure-const" } */
int recurse1 (int);
diff --git a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
index 1bf4997..30156a3 100644
--- a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
+++ b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { nonpic } } } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-fipa-pta -fdump-ipa-pta2 -fno-ipa-icf" } */
/* { dg-skip-if "" { *-*-* } { "-O0" "-fno-fat-lto-objects" } { "" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
index e10a25d..f9d2dd4 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { nonpic } } } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-O2 -fdump-tree-optimized" } */
static int a;
int f;
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
index 2d713d6..3b5a94f 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target nonpic } } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-O3 -fdump-tree-fnsplit -fdump-tree-optimized --param=builtin-expect-probability=100" } */
struct a {int a,b;};
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
index 028becd..b4e9296 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target nonpic } } */
+/* { dg-do compile { target { nonpic || pie_enabled } } } */
/* { dg-options "-O2 -fdump-tree-pre-stats -fdump-tree-fre1" } */
#include <stddef.h>
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (19 preceding siblings ...)
2019-05-15 12:47 ` [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC Christophe Lyon
@ 2019-05-15 12:47 ` Christophe Lyon
2019-07-19 9:40 ` Kyrill Tkachov
2019-05-23 12:46 ` [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
2019-08-29 14:54 ` Christophe Lyon
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:47 UTC (permalink / raw)
To: gcc-patches
The recent stack_protect_combined_set_insn and
stack_protect_combined_test_insn force recomputing of GOT base, but
need to take into account that in FDPIC mode, the PIC register is
fixed by the ABI (r9).
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
* config/arm/arm.md (stack_protect_combined_set_insn): Handle
FDPIC mode.
(stack_protect_combined_test_insn): Likewise.
Change-Id: Ib243fab0791fc883ca7b1c1205af1e0893f3e8c5
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 0edcb1d..5a4dd00 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8869,8 +8869,19 @@
{
if (flag_pic)
{
+ rtx pic_reg;
+
+ if (TARGET_FDPIC)
+ {
+ pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ }
+ else
+ {
+ pic_reg = operands[3];
+ }
+
/* Forces recomputing of GOT base now. */
- legitimize_pic_address (operands[1], SImode, operands[2], operands[3],
+ legitimize_pic_address (operands[1], SImode, operands[2], pic_reg,
true /*compute_now*/);
}
else
@@ -8943,8 +8954,19 @@
if (flag_pic)
{
+ rtx pic_reg;
+
+ if (TARGET_FDPIC)
+ {
+ pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ }
+ else
+ {
+ pic_reg = operands[4];
+ }
+
/* Forces recomputing of GOT base now. */
- legitimize_pic_address (operands[1], SImode, operands[3], operands[4],
+ legitimize_pic_address (operands[1], SImode, operands[3], pic_reg,
true /*compute_now*/);
}
else
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (18 preceding siblings ...)
2019-05-15 12:46 ` [ARM/FDPIC v5 19/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc Christophe Lyon
@ 2019-05-15 12:47 ` Christophe Lyon
2019-07-19 9:03 ` Kyrill Tkachov
2019-05-15 12:47 ` [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns Christophe Lyon
` (2 subsequent siblings)
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 12:47 UTC (permalink / raw)
To: gcc-patches
Since FDPIC currently supports arm and thumb-2 modes only, these tests
fail because they enforce an architecture version that doesn't match
these restrictions.
This patch introduces new values for the arm_arch effective-target
(v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
needed, and adds them to the relevant tests. It also adds the
corresponding non-thumb effective-target to the tests that were
missing it.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
* lib/target-supports.exp
(check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
* gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
effective-target.
* gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
* gcc.target/arm/attr_arm-err.c: Likewise.
* gcc.target/arm/ftest-armv4-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5t-arm.c: Likewise.
* gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5te-arm.c: Likewise.
* gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6-arm.c: Likewise.
* gcc.target/arm/ftest-armv6-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6k-arm.c: Likewise.
* gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
* gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6z-arm.c: Likewise.
* gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
* gcc.target/arm/g2.c: Likewise.
* gcc.target/arm/macro_defs1.c: Likewise.
* gcc.target/arm/pr59858.c: Likewise.
* gcc.target/arm/pr65647-2.c: Likewise.
* gcc.target/arm/pr79058.c: Likewise.
* gcc.target/arm/pr83712.c: Likewise.
* gcc.target/arm/pragma_arch_switch_2.c: Likewise.
* gcc.target/arm/scd42-1.c: Likewise.
* gcc.target/arm/scd42-2.c: Likewise.
* gcc.target/arm/scd42-3.c: Likewise.
* gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
index d144b70..4e695cd 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target arm*-*-* } } */
/* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
/* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" { target arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
index 88528f1..886a012 100644
--- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
/* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
index e1ed1c1..2eeb522 100644
--- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
@@ -2,6 +2,7 @@
Verify that unaligned_access is correctly with attribute target. */
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
/* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
index 630c06a..d410056 100644
--- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
+++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
@@ -2,6 +2,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arm_ok } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-add-options arm_arch_v6m } */
int __attribute__((target("arm")))
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
index 4b48ef8..447a8ec 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v4 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
index 016506f..05db533 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4t_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v4t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
index 9ef944e..78878f7 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v4t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
index a9403e9..bea25d09 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5t_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v5t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
index f3ad07e..b25d17d 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v5t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
index f98c01a..7b37c7f 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v5te } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
index 5d71787..27a64a2 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v5te } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
index 88a5089..bfab765 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
index 90ef9d2..15a6d75 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
index 8de021a..721c9f9 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
index c2fc270..b3b6ecf 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
index ee075e2..27f71be 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6m } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
index 83b4bc4..259d2b5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6t2 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
index 1a1cbc5..e624ec5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6t2 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
index e2df0d4..66380bf 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6z_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6z } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
index e4b94ef..23a4fcd 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6z } */
diff --git a/gcc/testsuite/gcc.target/arm/g2.c b/gcc/testsuite/gcc.target/arm/g2.c
index e368017..da68c8b 100644
--- a/gcc/testsuite/gcc.target/arm/g2.c
+++ b/gcc/testsuite/gcc.target/arm/g2.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-require-effective-target arm32 } */
/* Brett Gaines' test case. */
diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c b/gcc/testsuite/gcc.target/arm/macro_defs1.c
index 4cc9ae6..655ba93 100644
--- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
+++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-options "-march=armv6-m -mthumb" } */
#ifdef __ARM_NEON_FP
diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c b/gcc/testsuite/gcc.target/arm/pr59858.c
index a944b9a..bcfd5d5 100644
--- a/gcc/testsuite/gcc.target/arm/pr59858.c
+++ b/gcc/testsuite/gcc.target/arm/pr59858.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb -fno-stack-protector -Os -fno-tree-loop-optimize -fno-tree-dominator-opts -fPIC -w" } */
/* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
typedef enum {
REG_ENOSYS = -1,
diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c b/gcc/testsuite/gcc.target/arm/pr65647-2.c
index f2985f8..3d9e75f 100644
--- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
+++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
/* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
typedef struct {
diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c b/gcc/testsuite/gcc.target/arm/pr79058.c
index 54a1d8a..7d078ac 100644
--- a/gcc/testsuite/gcc.target/arm/pr79058.c
+++ b/gcc/testsuite/gcc.target/arm/pr79058.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=arm7tdmi" } } */
/* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c b/gcc/testsuite/gcc.target/arm/pr83712.c
index 8ed8cdf..4902ec9 100644
--- a/gcc/testsuite/gcc.target/arm/pr83712.c
+++ b/gcc/testsuite/gcc.target/arm/pr83712.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
/* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
#pragma GCC optimize ("-O2")
diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
index b6211f9..c3361e7 100644
--- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
+++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
@@ -2,6 +2,7 @@
/* { dg-skip-if "instruction not valid on thumb" { *-*-* } { "-mthumb" } { "" } } */
/* { dg-do assemble } */
/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99 -marm" } */
#pragma GCC target ("arch=armv6")
diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c b/gcc/testsuite/gcc.target/arm/scd42-1.c
index be60e64..2b8fc0b 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-1.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
unsigned load1(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c b/gcc/testsuite/gcc.target/arm/scd42-2.c
index 6d9e5e1..4181a75 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-2.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -marm" } */
unsigned load2(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c b/gcc/testsuite/gcc.target/arm/scd42-3.c
index e566cb2..0afd121 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-3.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
unsigned load4(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 60d68f4..3f091c5 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
foreach { armfunc armflag armdefs } {
v4 "-march=armv4 -marm" __ARM_ARCH_4__
v4t "-march=armv4t" __ARM_ARCH_4T__
+ v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
v5t "-march=armv5t" __ARM_ARCH_5T__
+ v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
v5te "-march=armv5te" __ARM_ARCH_5TE__
+ v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
v6 "-march=armv6" __ARM_ARCH_6__
+ v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
v6k "-march=armv6k" __ARM_ARCH_6K__
+ v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
v6z "-march=armv6z" __ARM_ARCH_6Z__
+ v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
v7a "-march=armv7-a" __ARM_ARCH_7A__
v7r "-march=armv7-r" __ARM_ARCH_7R__
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 12:41 ` [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided Christophe Lyon
@ 2019-05-15 13:55 ` Szabolcs Nagy
2019-05-15 14:37 ` Rich Felker
0 siblings, 1 reply; 109+ messages in thread
From: Szabolcs Nagy @ 2019-05-15 13:55 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches; +Cc: nd, Rich Felker
On 15/05/2019 13:39, Christophe Lyon wrote:
> In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
> -fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
> for executables rather than shared libraries by default.
>
> We also make sure to use the --fdpic assembler option, and select the
> appropriate linker emulation.
>
> At link time, we also default to -pie, unless we are generating a
> shared library or a relocatable file (-r). Note that even for static
> link, we must specify the dynamic linker because the executable still
> has to relocate itself at startup.
>
> We also force 'now' binding since lazy binding is not supported.
>
> We should also apply the same behavior for -Wl,-Ur as for -r, but I
> couldn't find how to describe that in the specs fragment.
...
> +/* Unless we generate a shared library or a relocatable object, we
> + force -pie. */
> +/* Even with -static, we have to define the dynamic-linker, as we
> + have some relocations to resolve at load time. */
> +#undef SUBTARGET_EXTRA_LINK_SPEC
> +#define SUBTARGET_EXTRA_LINK_SPEC \
> + "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
> + "%{!shared:%{!r: -pie}} \
> + %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
> + "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
> + "%{!r:%{!mno-fdpic: -z now}}"
i think -dynamic-linker can be avoided for -static using
-static-pie linking with rcrt0.o
but more importantly: does the abi spec require the sysv dynamic
linker name? that sounds suboptimal (in principle the same os
can support both normal elf and fdpic elf so you can test/use
an fdpic toolchain on a system with mmu, but this requires
different dynamic linker name ..otherwise one has to run
executables in a chroot or separate mount namespace to change
the dynamic linker)
> +
> +#undef STARTFILE_SPEC
> +#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
> + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
> diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
> index b241ddb..c38b3f4 100644
> --- a/libsanitizer/configure.tgt
> +++ b/libsanitizer/configure.tgt
> @@ -45,6 +45,9 @@ case "${target}" in
> ;;
> sparc*-*-solaris2.11*)
> ;;
> + arm*-*-uclinuxfdpiceabi)
> + UNSUPPORTED=1
> + ;;
musl libc has fdpic support on sh (e.g. with sh2eb-linux-muslfdpic
target and --enable-fdpic), it can probably support fdpic on arm
too with minimal changes, i assume the target name for that would
be arm-linux-muslfdpiceabi.
so i think it is better to check arm*-*fdpiceabi where the libc
does not matter (so we dont have to patch the same files when
*-muslfdpiceabi support is added).
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 13:55 ` Szabolcs Nagy
@ 2019-05-15 14:37 ` Rich Felker
2019-05-15 15:12 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Rich Felker @ 2019-05-15 14:37 UTC (permalink / raw)
To: Szabolcs Nagy; +Cc: Christophe Lyon, gcc-patches, nd
On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
> On 15/05/2019 13:39, Christophe Lyon wrote:
> > In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
> > -fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
> > for executables rather than shared libraries by default.
> >
> > We also make sure to use the --fdpic assembler option, and select the
> > appropriate linker emulation.
> >
> > At link time, we also default to -pie, unless we are generating a
> > shared library or a relocatable file (-r). Note that even for static
> > link, we must specify the dynamic linker because the executable still
> > has to relocate itself at startup.
> >
> > We also force 'now' binding since lazy binding is not supported.
> >
> > We should also apply the same behavior for -Wl,-Ur as for -r, but I
> > couldn't find how to describe that in the specs fragment.
> ...
> > +/* Unless we generate a shared library or a relocatable object, we
> > + force -pie. */
> > +/* Even with -static, we have to define the dynamic-linker, as we
> > + have some relocations to resolve at load time. */
> > +#undef SUBTARGET_EXTRA_LINK_SPEC
> > +#define SUBTARGET_EXTRA_LINK_SPEC \
> > + "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
> > + "%{!shared:%{!r: -pie}} \
> > + %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
> > + "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
> > + "%{!r:%{!mno-fdpic: -z now}}"
>
> i think -dynamic-linker can be avoided for -static using
> -static-pie linking with rcrt0.o
Yes, -dynamic-linker should never be used with -static.
> but more importantly: does the abi spec require the sysv dynamic
> linker name? that sounds suboptimal (in principle the same os
ABI specs typically do this and we just ignore it. BFD contains
default dynamic linker strings for all sorts of ABIs, and they're all
wrong -- things like /lib/ld64.so.1, etc. I don't think it's worth
bothering with fighting the desire of folks writing ABI specs to do
this again and again. GCC overrides them all with the actually-correct
values when !static.
> can support both normal elf and fdpic elf so you can test/use
> an fdpic toolchain on a system with mmu, but this requires
> different dynamic linker name ..otherwise one has to run
> executables in a chroot or separate mount namespace to change
> the dynamic linker)
Indeed, it's a bad idea to make them clash.
> > +
> > +#undef STARTFILE_SPEC
> > +#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
> > + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
> > diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
> > index b241ddb..c38b3f4 100644
> > --- a/libsanitizer/configure.tgt
> > +++ b/libsanitizer/configure.tgt
> > @@ -45,6 +45,9 @@ case "${target}" in
> > ;;
> > sparc*-*-solaris2.11*)
> > ;;
> > + arm*-*-uclinuxfdpiceabi)
> > + UNSUPPORTED=1
> > + ;;
>
> musl libc has fdpic support on sh (e.g. with sh2eb-linux-muslfdpic
> target and --enable-fdpic), it can probably support fdpic on arm
> too with minimal changes, i assume the target name for that would
> be arm-linux-muslfdpiceabi.
I plan to add ARM FDPIC support as soon as there is (1) published ABI
for relocation types, entry point contract, etc., and (2) there's
tooling to support it that's either upstream or can be applied as
clean patches to recent gcc (as opposed to some fork of gcc4 or
whatever it was this got started as). I think those conditions are
mostly met now.
> so i think it is better to check arm*-*fdpiceabi where the libc
> does not matter (so we dont have to patch the same files when
> *-muslfdpiceabi support is added).
Yes, that would be appreciated. Maybe we could get musl ldso names
added at the same time, too? I think they should just be the same as
the existing musl ldso names but with "-fdpic" appended before
".so.1".
Rich
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 14:37 ` Rich Felker
@ 2019-05-15 15:12 ` Christophe Lyon
2019-05-15 15:37 ` Rich Felker
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-15 15:12 UTC (permalink / raw)
To: Rich Felker; +Cc: Szabolcs Nagy, Christophe Lyon, gcc-patches, nd
On Wed, 15 May 2019 at 16:37, Rich Felker <dalias@libc.org> wrote:
>
> On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
> > On 15/05/2019 13:39, Christophe Lyon wrote:
> > > In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
> > > -fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
> > > for executables rather than shared libraries by default.
> > >
> > > We also make sure to use the --fdpic assembler option, and select the
> > > appropriate linker emulation.
> > >
> > > At link time, we also default to -pie, unless we are generating a
> > > shared library or a relocatable file (-r). Note that even for static
> > > link, we must specify the dynamic linker because the executable still
> > > has to relocate itself at startup.
> > >
> > > We also force 'now' binding since lazy binding is not supported.
> > >
> > > We should also apply the same behavior for -Wl,-Ur as for -r, but I
> > > couldn't find how to describe that in the specs fragment.
> > ...
> > > +/* Unless we generate a shared library or a relocatable object, we
> > > + force -pie. */
> > > +/* Even with -static, we have to define the dynamic-linker, as we
> > > + have some relocations to resolve at load time. */
> > > +#undef SUBTARGET_EXTRA_LINK_SPEC
> > > +#define SUBTARGET_EXTRA_LINK_SPEC \
> > > + "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
> > > + "%{!shared:%{!r: -pie}} \
> > > + %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
> > > + "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
> > > + "%{!r:%{!mno-fdpic: -z now}}"
> >
> > i think -dynamic-linker can be avoided for -static using
> > -static-pie linking with rcrt0.o
>
> Yes, -dynamic-linker should never be used with -static.
So, do you mean dropping completely the line:
+ %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
and thus make -static unsupported, forcing users to use -static-pie instead?
> > but more importantly: does the abi spec require the sysv dynamic
> > linker name? that sounds suboptimal (in principle the same os
>
> ABI specs typically do this and we just ignore it. BFD contains
> default dynamic linker strings for all sorts of ABIs, and they're all
> wrong -- things like /lib/ld64.so.1, etc. I don't think it's worth
> bothering with fighting the desire of folks writing ABI specs to do
> this again and again. GCC overrides them all with the actually-correct
> values when !static.
>
> > can support both normal elf and fdpic elf so you can test/use
> > an fdpic toolchain on a system with mmu, but this requires
> > different dynamic linker name ..otherwise one has to run
> > executables in a chroot or separate mount namespace to change
> > the dynamic linker)
>
> Indeed, it's a bad idea to make them clash.
>
Not sure to understand your point: indeed FDPIC binaries work
on a system with mmu, provided you have the right dynamic
linker in the right place, as well as the needed runtime libs (libc, etc....)
Do you want me to change anything here?
> > > +
> > > +#undef STARTFILE_SPEC
> > > +#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
> > > + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
> > > diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
> > > index b241ddb..c38b3f4 100644
> > > --- a/libsanitizer/configure.tgt
> > > +++ b/libsanitizer/configure.tgt
> > > @@ -45,6 +45,9 @@ case "${target}" in
> > > ;;
> > > sparc*-*-solaris2.11*)
> > > ;;
> > > + arm*-*-uclinuxfdpiceabi)
> > > + UNSUPPORTED=1
> > > + ;;
> >
> > musl libc has fdpic support on sh (e.g. with sh2eb-linux-muslfdpic
> > target and --enable-fdpic), it can probably support fdpic on arm
> > too with minimal changes, i assume the target name for that would
> > be arm-linux-muslfdpiceabi.
>
> I plan to add ARM FDPIC support as soon as there is (1) published ABI
> for relocation types, entry point contract, etc., and (2) there's
The ABI is here:
https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> tooling to support it that's either upstream or can be applied as
> clean patches to recent gcc (as opposed to some fork of gcc4 or
> whatever it was this got started as). I think those conditions are
> mostly met now.
This patch series applies on gcc trunk as of ~2 weeks ago
> > so i think it is better to check arm*-*fdpiceabi where the libc
> > does not matter (so we dont have to patch the same files when
> > *-muslfdpiceabi support is added).
>
Looks sane.
> Yes, that would be appreciated. Maybe we could get musl ldso names
> added at the same time, too? I think they should just be the same as
> the existing musl ldso names but with "-fdpic" appended before
> ".so.1".
Do you mean updating config/arm/linux-eabi.h and adding -fdpic to the
4 musl dynamic linker names?
> Rich
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 15:12 ` Christophe Lyon
@ 2019-05-15 15:37 ` Rich Felker
2019-05-15 15:59 ` Szabolcs Nagy
0 siblings, 1 reply; 109+ messages in thread
From: Rich Felker @ 2019-05-15 15:37 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Szabolcs Nagy, Christophe Lyon, gcc-patches, nd
On Wed, May 15, 2019 at 05:12:11PM +0200, Christophe Lyon wrote:
> On Wed, 15 May 2019 at 16:37, Rich Felker <dalias@libc.org> wrote:
> >
> > On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
> > > On 15/05/2019 13:39, Christophe Lyon wrote:
> > > > In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
> > > > -fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
> > > > for executables rather than shared libraries by default.
> > > >
> > > > We also make sure to use the --fdpic assembler option, and select the
> > > > appropriate linker emulation.
> > > >
> > > > At link time, we also default to -pie, unless we are generating a
> > > > shared library or a relocatable file (-r). Note that even for static
> > > > link, we must specify the dynamic linker because the executable still
> > > > has to relocate itself at startup.
> > > >
> > > > We also force 'now' binding since lazy binding is not supported.
> > > >
> > > > We should also apply the same behavior for -Wl,-Ur as for -r, but I
> > > > couldn't find how to describe that in the specs fragment.
> > > ...
> > > > +/* Unless we generate a shared library or a relocatable object, we
> > > > + force -pie. */
> > > > +/* Even with -static, we have to define the dynamic-linker, as we
> > > > + have some relocations to resolve at load time. */
> > > > +#undef SUBTARGET_EXTRA_LINK_SPEC
> > > > +#define SUBTARGET_EXTRA_LINK_SPEC \
> > > > + "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
> > > > + "%{!shared:%{!r: -pie}} \
> > > > + %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
> > > > + "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
> > > > + "%{!r:%{!mno-fdpic: -z now}}"
> > >
> > > i think -dynamic-linker can be avoided for -static using
> > > -static-pie linking with rcrt0.o
> >
> > Yes, -dynamic-linker should never be used with -static.
>
> So, do you mean dropping completely the line:
> + %{static:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
> and thus make -static unsupported, forcing users to use -static-pie instead?
Rather I would have -static behave the same as -static-pie. The intent
on musl when we added static pie (before glibc had it) was that
-static plus -pie (including default-pie, if built as default-pie)
would yield static pie output, and our patches still do this. When
static-pie was upstreamed in gcc, it was done differently for
compatibility with legacy versions of glibc. That's not a
consideration for fdpic.
> > > but more importantly: does the abi spec require the sysv dynamic
> > > linker name? that sounds suboptimal (in principle the same os
> >
> > ABI specs typically do this and we just ignore it. BFD contains
> > default dynamic linker strings for all sorts of ABIs, and they're all
> > wrong -- things like /lib/ld64.so.1, etc. I don't think it's worth
> > bothering with fighting the desire of folks writing ABI specs to do
> > this again and again. GCC overrides them all with the actually-correct
> > values when !static.
> >
> > > can support both normal elf and fdpic elf so you can test/use
> > > an fdpic toolchain on a system with mmu, but this requires
> > > different dynamic linker name ..otherwise one has to run
> > > executables in a chroot or separate mount namespace to change
> > > the dynamic linker)
> >
> > Indeed, it's a bad idea to make them clash.
> >
>
> Not sure to understand your point: indeed FDPIC binaries work
> on a system with mmu, provided you have the right dynamic
> linker in the right place, as well as the needed runtime libs (libc, etc....)
>
> Do you want me to change anything here?
I think the concern is that if the PT_INTERP name is the same for
binaries with different ABIs, you wouldn't be able to have both
present in the same root fs, and this would make it more of a pain to
debug fdpic binaries on a full (with-mmu) host.
musl always uses a different PT_INTERP name for each ABI combination,
so I guess the question is whether uclibc or whatever other libc
you're intending people to use would also want to do this.
> > > > +#undef STARTFILE_SPEC
> > > > +#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
> > > > + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
> > > > diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
> > > > index b241ddb..c38b3f4 100644
> > > > --- a/libsanitizer/configure.tgt
> > > > +++ b/libsanitizer/configure.tgt
> > > > @@ -45,6 +45,9 @@ case "${target}" in
> > > > ;;
> > > > sparc*-*-solaris2.11*)
> > > > ;;
> > > > + arm*-*-uclinuxfdpiceabi)
> > > > + UNSUPPORTED=1
> > > > + ;;
> > >
> > > musl libc has fdpic support on sh (e.g. with sh2eb-linux-muslfdpic
> > > target and --enable-fdpic), it can probably support fdpic on arm
> > > too with minimal changes, i assume the target name for that would
> > > be arm-linux-muslfdpiceabi.
> >
> > I plan to add ARM FDPIC support as soon as there is (1) published ABI
> > for relocation types, entry point contract, etc., and (2) there's
>
> The ABI is here:
> https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
>
> > tooling to support it that's either upstream or can be applied as
> > clean patches to recent gcc (as opposed to some fork of gcc4 or
> > whatever it was this got started as). I think those conditions are
> > mostly met now.
> This patch series applies on gcc trunk as of ~2 weeks ago
Excellent news!
> > > so i think it is better to check arm*-*fdpiceabi where the libc
> > > does not matter (so we dont have to patch the same files when
> > > *-muslfdpiceabi support is added).
> >
> Looks sane.
>
> > Yes, that would be appreciated. Maybe we could get musl ldso names
> > added at the same time, too? I think they should just be the same as
> > the existing musl ldso names but with "-fdpic" appended before
> > ".so.1".
> Do you mean updating config/arm/linux-eabi.h and adding -fdpic to the
> 4 musl dynamic linker names?
Yes, conditional on target being fdpic of course.
Rich
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 15:37 ` Rich Felker
@ 2019-05-15 15:59 ` Szabolcs Nagy
2019-05-15 16:07 ` Rich Felker
0 siblings, 1 reply; 109+ messages in thread
From: Szabolcs Nagy @ 2019-05-15 15:59 UTC (permalink / raw)
To: Rich Felker, Christophe Lyon; +Cc: nd, Christophe Lyon, gcc-patches
On 15/05/2019 16:37, Rich Felker wrote:
> On Wed, May 15, 2019 at 05:12:11PM +0200, Christophe Lyon wrote:
>> On Wed, 15 May 2019 at 16:37, Rich Felker <dalias@libc.org> wrote:
>>> On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
>>>> can support both normal elf and fdpic elf so you can test/use
>>>> an fdpic toolchain on a system with mmu, but this requires
>>>> different dynamic linker name ..otherwise one has to run
>>>> executables in a chroot or separate mount namespace to change
>>>> the dynamic linker)
>>>
>>> Indeed, it's a bad idea to make them clash.
>>>
>>
>> Not sure to understand your point: indeed FDPIC binaries work
>> on a system with mmu, provided you have the right dynamic
>> linker in the right place, as well as the needed runtime libs (libc, etc....)
>>
>> Do you want me to change anything here?
>
> I think the concern is that if the PT_INTERP name is the same for
> binaries with different ABIs, you wouldn't be able to have both
> present in the same root fs, and this would make it more of a pain to
> debug fdpic binaries on a full (with-mmu) host.
>
> musl always uses a different PT_INTERP name for each ABI combination,
> so I guess the question is whether uclibc or whatever other libc
> you're intending people to use would also want to do this.
glibc uses different names now for new abis, so i was expecting
some *_DYNAMIC_LINKER update, but it seems uclibc always uses
the same fixed name
/lib/ld-uClibc.so.0
i guess it makes sense for them since iirc uclibc can change
its runtime abi based on lot of build time config so having
different name for each abi variant may be impractical.
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 15:59 ` Szabolcs Nagy
@ 2019-05-15 16:07 ` Rich Felker
2019-05-21 15:29 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Rich Felker @ 2019-05-15 16:07 UTC (permalink / raw)
To: Szabolcs Nagy; +Cc: Christophe Lyon, nd, Christophe Lyon, gcc-patches
On Wed, May 15, 2019 at 03:59:39PM +0000, Szabolcs Nagy wrote:
> On 15/05/2019 16:37, Rich Felker wrote:
> > On Wed, May 15, 2019 at 05:12:11PM +0200, Christophe Lyon wrote:
> >> On Wed, 15 May 2019 at 16:37, Rich Felker <dalias@libc.org> wrote:
> >>> On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
> >>>> can support both normal elf and fdpic elf so you can test/use
> >>>> an fdpic toolchain on a system with mmu, but this requires
> >>>> different dynamic linker name ..otherwise one has to run
> >>>> executables in a chroot or separate mount namespace to change
> >>>> the dynamic linker)
> >>>
> >>> Indeed, it's a bad idea to make them clash.
> >>>
> >>
> >> Not sure to understand your point: indeed FDPIC binaries work
> >> on a system with mmu, provided you have the right dynamic
> >> linker in the right place, as well as the needed runtime libs (libc, etc....)
> >>
> >> Do you want me to change anything here?
> >
> > I think the concern is that if the PT_INTERP name is the same for
> > binaries with different ABIs, you wouldn't be able to have both
> > present in the same root fs, and this would make it more of a pain to
> > debug fdpic binaries on a full (with-mmu) host.
> >
> > musl always uses a different PT_INTERP name for each ABI combination,
> > so I guess the question is whether uclibc or whatever other libc
> > you're intending people to use would also want to do this.
>
> glibc uses different names now for new abis, so i was expecting
> some *_DYNAMIC_LINKER update, but it seems uclibc always uses
> the same fixed name
>
> /lib/ld-uClibc.so.0
>
> i guess it makes sense for them since iirc uclibc can change
> its runtime abi based on lot of build time config so having
> different name for each abi variant may be impractical.
Yes, this "feature" of uclibc was was of the key motivations behind
the creation of musl... :-)
Rich
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-15 16:07 ` Rich Felker
@ 2019-05-21 15:29 ` Christophe Lyon
2019-05-21 15:48 ` Rich Felker
2019-05-22 8:39 ` Szabolcs Nagy
0 siblings, 2 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-05-21 15:29 UTC (permalink / raw)
To: Rich Felker; +Cc: Szabolcs Nagy, nd, Christophe Lyon, gcc-patches
On Wed, 15 May 2019 at 18:06, Rich Felker <dalias@libc.org> wrote:
>
> On Wed, May 15, 2019 at 03:59:39PM +0000, Szabolcs Nagy wrote:
> > On 15/05/2019 16:37, Rich Felker wrote:
> > > On Wed, May 15, 2019 at 05:12:11PM +0200, Christophe Lyon wrote:
> > >> On Wed, 15 May 2019 at 16:37, Rich Felker <dalias@libc.org> wrote:
> > >>> On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
> > >>>> can support both normal elf and fdpic elf so you can test/use
> > >>>> an fdpic toolchain on a system with mmu, but this requires
> > >>>> different dynamic linker name ..otherwise one has to run
> > >>>> executables in a chroot or separate mount namespace to change
> > >>>> the dynamic linker)
> > >>>
> > >>> Indeed, it's a bad idea to make them clash.
> > >>>
> > >>
> > >> Not sure to understand your point: indeed FDPIC binaries work
> > >> on a system with mmu, provided you have the right dynamic
> > >> linker in the right place, as well as the needed runtime libs (libc, etc....)
> > >>
> > >> Do you want me to change anything here?
> > >
> > > I think the concern is that if the PT_INTERP name is the same for
> > > binaries with different ABIs, you wouldn't be able to have both
> > > present in the same root fs, and this would make it more of a pain to
> > > debug fdpic binaries on a full (with-mmu) host.
> > >
> > > musl always uses a different PT_INTERP name for each ABI combination,
> > > so I guess the question is whether uclibc or whatever other libc
> > > you're intending people to use would also want to do this.
> >
> > glibc uses different names now for new abis, so i was expecting
> > some *_DYNAMIC_LINKER update, but it seems uclibc always uses
> > the same fixed name
> >
> > /lib/ld-uClibc.so.0
> >
> > i guess it makes sense for them since iirc uclibc can change
> > its runtime abi based on lot of build time config so having
> > different name for each abi variant may be impractical.
>
> Yes, this "feature" of uclibc was was of the key motivations behind
> the creation of musl... :-)
>
Hi,
I discussed a bit further with Szabolcs on irc, and tried to get some
feedback from uclibc-ng community (none so far)
I propose the following 2 patches on top of this one to address part
of the concerns:
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 67edb42..d7cc923 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -89,7 +89,7 @@
#define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
#endif
#define MUSL_DYNAMIC_LINKER \
- "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
+ "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
"%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
/* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
use the GNU/Linux version, not the generic BPABI version. */
diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
index c38b3f4..92bca69 100644
--- a/libsanitizer/configure.tgt
+++ b/libsanitizer/configure.tgt
@@ -45,7 +45,7 @@ case "${target}" in
;;
sparc*-*-solaris2.11*)
;;
- arm*-*-uclinuxfdpiceabi)
+ arm*-*-fdpiceabi)
UNSUPPORTED=1
;;
arm*-*-linux*)
However, regarding -staic/-static-pie, it seems I have several options:
(a) add support for static-pie to uclibc-ng. This means creating a new
rcrt1.o or similar, which would embed parts of the dynamic linker into
static-pie executables. This seems to involve quite a bit of work
(b) add support for FDPIC on arm to musl, which I'm not familiar with
(c) declare -static not supported on arm-FDPIC
(d) gather consensus that -static with pt_interp is ok (my preference,
since that's what the current patches do :-)
At this point, I'd prefer to stick with (d), or (c), to avoid further delaying
inclusion of FDPIC support for arm in GCC, and address improvements
later, so that it's not a constantly moving target.
Thanks,
Christophe
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-21 15:29 ` Christophe Lyon
@ 2019-05-21 15:48 ` Rich Felker
2019-05-22 8:39 ` Szabolcs Nagy
1 sibling, 0 replies; 109+ messages in thread
From: Rich Felker @ 2019-05-21 15:48 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Szabolcs Nagy, nd, Christophe Lyon, gcc-patches
On Tue, May 21, 2019 at 05:28:51PM +0200, Christophe Lyon wrote:
> On Wed, 15 May 2019 at 18:06, Rich Felker <dalias@libc.org> wrote:
> >
> > On Wed, May 15, 2019 at 03:59:39PM +0000, Szabolcs Nagy wrote:
> > > On 15/05/2019 16:37, Rich Felker wrote:
> > > > On Wed, May 15, 2019 at 05:12:11PM +0200, Christophe Lyon wrote:
> > > >> On Wed, 15 May 2019 at 16:37, Rich Felker <dalias@libc.org> wrote:
> > > >>> On Wed, May 15, 2019 at 01:55:30PM +0000, Szabolcs Nagy wrote:
> > > >>>> can support both normal elf and fdpic elf so you can test/use
> > > >>>> an fdpic toolchain on a system with mmu, but this requires
> > > >>>> different dynamic linker name ..otherwise one has to run
> > > >>>> executables in a chroot or separate mount namespace to change
> > > >>>> the dynamic linker)
> > > >>>
> > > >>> Indeed, it's a bad idea to make them clash.
> > > >>>
> > > >>
> > > >> Not sure to understand your point: indeed FDPIC binaries work
> > > >> on a system with mmu, provided you have the right dynamic
> > > >> linker in the right place, as well as the needed runtime libs (libc, etc....)
> > > >>
> > > >> Do you want me to change anything here?
> > > >
> > > > I think the concern is that if the PT_INTERP name is the same for
> > > > binaries with different ABIs, you wouldn't be able to have both
> > > > present in the same root fs, and this would make it more of a pain to
> > > > debug fdpic binaries on a full (with-mmu) host.
> > > >
> > > > musl always uses a different PT_INTERP name for each ABI combination,
> > > > so I guess the question is whether uclibc or whatever other libc
> > > > you're intending people to use would also want to do this.
> > >
> > > glibc uses different names now for new abis, so i was expecting
> > > some *_DYNAMIC_LINKER update, but it seems uclibc always uses
> > > the same fixed name
> > >
> > > /lib/ld-uClibc.so.0
> > >
> > > i guess it makes sense for them since iirc uclibc can change
> > > its runtime abi based on lot of build time config so having
> > > different name for each abi variant may be impractical.
> >
> > Yes, this "feature" of uclibc was was of the key motivations behind
> > the creation of musl... :-)
> >
>
> Hi,
>
> I discussed a bit further with Szabolcs on irc, and tried to get some
> feedback from uclibc-ng community (none so far)
>
> I propose the following 2 patches on top of this one to address part
> of the concerns:
> diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
> index 67edb42..d7cc923 100644
> --- a/gcc/config/arm/linux-eabi.h
> +++ b/gcc/config/arm/linux-eabi.h
> @@ -89,7 +89,7 @@
> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> #endif
> #define MUSL_DYNAMIC_LINKER \
> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>
> /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
> use the GNU/Linux version, not the generic BPABI version. */
>
> diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
> index c38b3f4..92bca69 100644
> --- a/libsanitizer/configure.tgt
> +++ b/libsanitizer/configure.tgt
> @@ -45,7 +45,7 @@ case "${target}" in
> ;;
> sparc*-*-solaris2.11*)
> ;;
> - arm*-*-uclinuxfdpiceabi)
> + arm*-*-fdpiceabi)
> UNSUPPORTED=1
> ;;
> arm*-*-linux*)
>
> However, regarding -staic/-static-pie, it seems I have several options:
> (a) add support for static-pie to uclibc-ng. This means creating a new
> rcrt1.o or similar, which would embed parts of the dynamic linker into
> static-pie executables. This seems to involve quite a bit of work
>
> (b) add support for FDPIC on arm to musl, which I'm not familiar with
>
> (c) declare -static not supported on arm-FDPIC
>
> (d) gather consensus that -static with pt_interp is ok (my preference,
> since that's what the current patches do :-)
musl definitely does not support static with pt_interp, and won't. If
it works, it's by chance, and not a good idea to try relying on it. If
you want to follow this path in upstream for now that's fine but it
means musl users will need to apply patches. This is already done
anyway, so it's not a *new* burden, but it's still annoying.
> At this point, I'd prefer to stick with (d), or (c), to avoid further delaying
> inclusion of FDPIC support for arm in GCC, and address improvements
> later, so that it's not a constantly moving target.
I'd find (c) mildly better as long as it's still easy for us to patch.
Providing a -static that's not actually static is not useful and will
be harder to fix later.
Rich
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-21 15:29 ` Christophe Lyon
2019-05-21 15:48 ` Rich Felker
@ 2019-05-22 8:39 ` Szabolcs Nagy
2019-05-22 8:45 ` Christophe Lyon
1 sibling, 1 reply; 109+ messages in thread
From: Szabolcs Nagy @ 2019-05-22 8:39 UTC (permalink / raw)
To: Christophe Lyon, Rich Felker; +Cc: nd, Christophe Lyon, gcc-patches
On 21/05/2019 16:28, Christophe Lyon wrote:
> --- a/gcc/config/arm/linux-eabi.h
> +++ b/gcc/config/arm/linux-eabi.h
> @@ -89,7 +89,7 @@
> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> #endif
> #define MUSL_DYNAMIC_LINKER \
> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
the line break seems wrong (either needs \ or no newline)
> --- a/libsanitizer/configure.tgt
> +++ b/libsanitizer/configure.tgt
> @@ -45,7 +45,7 @@ case "${target}" in
> ;;
> sparc*-*-solaris2.11*)
> ;;
> - arm*-*-uclinuxfdpiceabi)
> + arm*-*-fdpiceabi)
should be *fdpiceabi instead of *-fdpiceabi i think.
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-22 8:39 ` Szabolcs Nagy
@ 2019-05-22 8:45 ` Christophe Lyon
2019-05-23 12:45 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-22 8:45 UTC (permalink / raw)
To: Szabolcs Nagy; +Cc: Rich Felker, nd, Christophe Lyon, gcc-patches
On Wed, 22 May 2019 at 10:39, Szabolcs Nagy <Szabolcs.Nagy@arm.com> wrote:
>
> On 21/05/2019 16:28, Christophe Lyon wrote:
> > --- a/gcc/config/arm/linux-eabi.h
> > +++ b/gcc/config/arm/linux-eabi.h
> > @@ -89,7 +89,7 @@
> > #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> > #endif
> > #define MUSL_DYNAMIC_LINKER \
> > - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> > + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
> > "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>
> the line break seems wrong (either needs \ or no newline)
>
Sorry, that's a mailer artifact.
> > --- a/libsanitizer/configure.tgt
> > +++ b/libsanitizer/configure.tgt
> > @@ -45,7 +45,7 @@ case "${target}" in
> > ;;
> > sparc*-*-solaris2.11*)
> > ;;
> > - arm*-*-uclinuxfdpiceabi)
> > + arm*-*-fdpiceabi)
>
> should be *fdpiceabi instead of *-fdpiceabi i think.
Indeed, thanks
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-22 8:45 ` Christophe Lyon
@ 2019-05-23 12:45 ` Christophe Lyon
2019-07-16 10:38 ` Richard Sandiford
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-23 12:45 UTC (permalink / raw)
To: Christophe Lyon, Szabolcs Nagy; +Cc: Rich Felker, nd, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 1378 bytes --]
On 22/05/2019 10:45, Christophe Lyon wrote:
> On Wed, 22 May 2019 at 10:39, Szabolcs Nagy <Szabolcs.Nagy@arm.com> wrote:
>>
>> On 21/05/2019 16:28, Christophe Lyon wrote:
>>> --- a/gcc/config/arm/linux-eabi.h
>>> +++ b/gcc/config/arm/linux-eabi.h
>>> @@ -89,7 +89,7 @@
>>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
>>> #endif
>>> #define MUSL_DYNAMIC_LINKER \
>>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
>>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
>>> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>>
>> the line break seems wrong (either needs \ or no newline)
>>
> Sorry, that's a mailer artifact.
>
>>> --- a/libsanitizer/configure.tgt
>>> +++ b/libsanitizer/configure.tgt
>>> @@ -45,7 +45,7 @@ case "${target}" in
>>> ;;
>>> sparc*-*-solaris2.11*)
>>> ;;
>>> - arm*-*-uclinuxfdpiceabi)
>>> + arm*-*-fdpiceabi)
>>
>> should be *fdpiceabi instead of *-fdpiceabi i think.
>
> Indeed, thanks
> .
>
FWIW, here is the updated patch:
- handles musl -fdpic suffix
- disables sanitizers for arm*-*-fdpiceabi
- does not handle -static in a special way, so using -static produces binaries that request the non-existing /usr/lib/ld.so.1, thus effectively making -static broken/unsupported (this does lead to a few more FAIL in the testsuite)
The plan is to work -static-pie later, as discussed.
Christophe
[-- Attachment #2: 0003-ARM-FDPIC-Force-FDPIC-related-options-unless-mno-fdp.patch-v2 --]
[-- Type: text/plain, Size: 7307 bytes --]
From 828696b5c23e5907c2793f7654c29975d7dfbfc4 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@st.com>
Date: Thu, 8 Feb 2018 11:11:56 +0100
Subject: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless
-mno-fdpic is provided
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.
We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.
At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that even for static
link, we must specify the dynamic linker because the executable still
has to relocate itself at startup.
We also force 'now' binding since lazy binding is not supported.
We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
(CC1_SPEC): Use FDPIC_CC1_SPEC.
(MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
* config/arm/uclinuxfdpiceabi.h: New file.
libsanitizer/
* configure.tgt (arm*-*-*fdpiceabi): Sanitizers are
unsupported in this configuration.
---
gcc/config.gcc | 5 ++++
gcc/config/arm/bpabi.h | 4 ++-
gcc/config/arm/linux-eabi.h | 9 ++++---
gcc/config/arm/uclinuxfdpiceabi.h | 52 +++++++++++++++++++++++++++++++++++++++
libsanitizer/configure.tgt | 3 +++
5 files changed, 69 insertions(+), 4 deletions(-)
create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 67780fb..495cbc2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1177,6 +1177,11 @@ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
esac
tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi"
tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h arm/arm.h"
+ case $target in
+ arm*-*-uclinuxfdpiceabi)
+ tm_file="$tm_file arm/uclinuxfdpiceabi.h"
+ ;;
+ esac
# Generation of floating-point instructions requires at least ARMv5te.
if [ "$with_float" = "hard" -o "$with_float" = "softfp" ] ; then
target_cpu_cname="arm10e"
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index e1bacf4..6c25a1a 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -55,6 +55,8 @@
#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
"|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
+#define TARGET_FDPIC_ASM_SPEC ""
+
#define BE8_LINK_SPEC \
"%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \
" %{mbig-endian:big}" \
@@ -64,7 +66,7 @@
/* Tell the assembler to build BPABI binaries. */
#undef SUBTARGET_EXTRA_ASM_SPEC
#define SUBTARGET_EXTRA_ASM_SPEC \
- "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+ "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC TARGET_FDPIC_ASM_SPEC
#ifndef SUBTARGET_EXTRA_LINK_SPEC
#define SUBTARGET_EXTRA_LINK_SPEC ""
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 66ec0ea..d7cc923 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -89,7 +89,7 @@
#define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
#endif
#define MUSL_DYNAMIC_LINKER \
- "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
+ "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
/* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
use the GNU/Linux version, not the generic BPABI version. */
@@ -101,11 +101,14 @@
#undef ASAN_CC1_SPEC
#define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
+#define FDPIC_CC1_SPEC ""
+
#undef CC1_SPEC
#define CC1_SPEC \
- LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
+ LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
+ FDPIC_CC1_SPEC, \
GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
- ANDROID_CC1_SPEC)
+ ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
#define CC1PLUS_SPEC \
LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
new file mode 100644
index 0000000..3180bcd
--- /dev/null
+++ b/gcc/config/arm/uclinuxfdpiceabi.h
@@ -0,0 +1,52 @@
+/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
+ Copyright (C) 2018 Free Software Foundation, Inc.
+ Contributed by STMicroelectronics.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
+ which also means we produce PIE code by default. */
+#undef FDPIC_CC1_SPEC
+#define FDPIC_CC1_SPEC \
+ "%{!mno-fdpic:-mfdpic %{!no-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
+
+/* Add --fdpic assembler flag by default. */
+#undef TARGET_FDPIC_ASM_SPEC
+#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+ config.gcc for big endian configurations. */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_FDPIC_LINKER_EMULATION "armelfb_linux_fdpiceabi"
+#else
+#define TARGET_FDPIC_LINKER_EMULATION "armelf_linux_fdpiceabi"
+#endif
+
+/* Unless we generate a shared library or a relocatable object, we
+ force -pie. */
+/* Even with -static, we have to define the dynamic-linker, as we
+ have some relocations to resolve at load time. */
+#undef SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC \
+ "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
+ "%{!shared:%{!r: -pie}} }" \
+ "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
+ "%{!r:%{!mno-fdpic: -z now}}"
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
+ LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
index b241ddb..34b21f8 100644
--- a/libsanitizer/configure.tgt
+++ b/libsanitizer/configure.tgt
@@ -45,6 +45,9 @@ case "${target}" in
;;
sparc*-*-solaris2.11*)
;;
+ arm*-*-*fdpiceabi)
+ UNSUPPORTED=1
+ ;;
arm*-*-linux*)
;;
mips*64*-*-linux*)
--
2.7.4
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (20 preceding siblings ...)
2019-05-15 12:47 ` [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns Christophe Lyon
@ 2019-05-23 12:46 ` Christophe Lyon
2019-06-04 12:57 ` Christophe Lyon
2019-08-29 14:54 ` Christophe Lyon
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-05-23 12:46 UTC (permalink / raw)
To: gcc-patches
Ping?
Any feedback other than what I got on patch 03/21 ?
Thanks,
Christophe
On 15/05/2019 14:39, Christophe Lyon wrote:
> Hello,
>
> This patch series implements the GCC contribution of the FDPIC ABI for
> ARM targets.
>
> This ABI enables to run Linux on ARM MMU-less cores and supports
> shared libraries to reduce the memory footprint.
>
> Without MMU, text and data segments relative distances are different
> from one process to another, hence the need for a dedicated FDPIC
> register holding the start address of the data segment. One of the
> side effects is that function pointers require two words to be
> represented: the address of the code, and the data segment start
> address. These two words are designated as "Function Descriptor",
> hence the "FD PIC" name.
>
> On ARM, the FDPIC register is r9 [1], and the target name is
> arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> ABI and the BFLAT file format; it does not support code sharing.
> The -mfdpic option is enabled by default, and -mno-fdpic should be
> used to build the Linux kernel.
>
> This work was developed some time ago by STMicroelectronics, and was
> presented during Linaro Connect SFO15 (September 2015). You can watch
> the discussion and read the slides [2].
> This presentation was related to the toolchain published on github [3],
> which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> and qemu-2.3.0, and for which pre-built binaries are available [3].
>
> The ABI itself is described in details in [1].
>
> Our Linux kernel patches have been updated and committed by Nicolas
> Pitre (Linaro) in July 2017. They are required so that the loader is
> able to handle this new file type. Indeed, the ELF files are tagged
> with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> well as the new relocations involved.
>
> The binutils, QEMU and uclibc-ng patch series have been merged a few
> months ago. [4][5][6]
>
> This series provides support for architectures that support ARM and/or
> Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> a few more failures than arm-linux-gnueabi, but is quite functional.
>
> I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> with linux-4.20.17 and ran successfully several tools.
>
> Are the GCC patches OK for inclusion in master?
>
> Changes between v4 and v5:
> - rebased on top of recent gcc-10 master (April 26th, 2019)
> - fixed handling of stack-protector combined patterns in FDPIC mode
>
> Changes between v3 and v4:
>
> - improved documentation (patch 1)
> - emit an error message (sorry) if the target architecture does not
> support arm nor thumb-2 modes (patch 4)
> - handle Richard's comments on patch 4 (comments, unspec)
> - added .align directive (patch 5)
> - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> - code factorization in patch 7
> - typos/internal function name in patch 8
> - improved patch 12
> - dropped patch 16
> - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> skip some tests
> - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> new tests, but a few regressions
> (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> - I compiled and executed several LTP tests to exercise pthreads and signals
> - I wrote and executed a simple testcase to change the interaction
> with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> implementation in libgcc as requested by Richard)
>
> Changes between v2 and v3:
> - added doc entry for -mfdpic new option
> - took Kyrill's comments into account (use "Armv7" instead of "7",
> code factorization, use preprocessor instead of hard-coding "r9",
> remove leftover code for thumb1 support, fixed comments)
> - rebase over recent trunk
> - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> 14 (rebase), 19 (rebase)
>
> Changes between v1 and v2:
> - fix GNU coding style
> - exit with an error for pre-Armv7
> - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> - remove unsupported attempts of pre-Armv7/thumb1 support
> - add instructions in comments next to opcodes
> - merge patches 11 and 13
> - fixed protected visibility handling in patch 8
> - merged legitimize_tls_address_fdpic and
> legitimize_tls_address_not_fdpic as requested
>
> Thanks,
>
> Christophe.
>
>
> [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> [3] https://github.com/mickael-guene/fdpic_manifest
> [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
>
> Christophe Lyon (21):
> [ARM] FDPIC: Add -mfdpic option support
> [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> [ARM] FDPIC: Add support for FDPIC for arm architecture
> [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> [ARM] FDPIC: Add support for c++ exceptions
> [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> [ARM] FDPIC: Enforce local/global binding for function descriptors
> [ARM] FDPIC: Add support for taking address of nested function
> [ARM] FDPIC: Implement TLS support.
> [ARM] FDPIC: Add support to unwind FDPIC signal frame
> [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> [ARM][testsuite] FDPIC: Skip unsupported tests
> [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> FDPIC
> [ARM] FDPIC: Handle stack-protector combined patterns
>
> config/futex.m4 | 2 +-
> config/tls.m4 | 2 +-
> gcc/config.gcc | 13 +-
> gcc/config/arm/arm-c.c | 2 +
> gcc/config/arm/arm-protos.h | 1 +
> gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> gcc/config/arm/arm.h | 16 +-
> gcc/config/arm/arm.md | 151 ++++++-
> gcc/config/arm/arm.opt | 4 +
> gcc/config/arm/bpabi.h | 4 +-
> gcc/config/arm/linux-eabi.h | 7 +-
> gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> gcc/config/arm/unspecs.md | 1 +
> gcc/doc/invoke.texi | 20 +-
> gcc/ginclude/unwind-arm-common.h | 2 +-
> gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> gcc/testsuite/g++.dg/other/anon5.C | 1 +
> gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> gcc/testsuite/gcc.dg/const-1.c | 2 +-
> gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/g2.c | 1 +
> gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> gcc/testsuite/lib/target-supports.exp | 10 +
> libatomic/configure | 8 +-
> libatomic/configure.tgt | 2 +-
> libgcc/config.host | 4 +-
> libgcc/config/arm/linux-atomic.c | 55 ++-
> libgcc/config/arm/unwind-arm.c | 5 +
> libgcc/config/arm/unwind-arm.h | 31 +-
> libgcc/crtstuff.c | 18 +
> libgcc/unwind-arm-common.inc | 216 +++++++++
> libgcc/unwind-pe.h | 17 +
> libitm/configure | 20 +-
> libitm/configure.tgt | 2 +-
> libsanitizer/configure.tgt | 3 +
> libstdc++-v3/acinclude.m4 | 12 +-
> libstdc++-v3/configure | 36 +-
> libstdc++-v3/configure.host | 6 +-
> libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> libtool.m4 | 14 +-
> 156 files changed, 1233 insertions(+), 219 deletions(-)
> create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-05-23 12:46 ` [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
@ 2019-06-04 12:57 ` Christophe Lyon
2019-06-06 12:36 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-06-04 12:57 UTC (permalink / raw)
To: gcc Patches; +Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrylo Tkachov
Ping?
On Thu, 23 May 2019 at 14:46, Christophe Lyon <christophe.lyon@st.com> wrote:
>
> Ping?
>
> Any feedback other than what I got on patch 03/21 ?
>
> Thanks,
>
> Christophe
>
>
> On 15/05/2019 14:39, Christophe Lyon wrote:
> > Hello,
> >
> > This patch series implements the GCC contribution of the FDPIC ABI for
> > ARM targets.
> >
> > This ABI enables to run Linux on ARM MMU-less cores and supports
> > shared libraries to reduce the memory footprint.
> >
> > Without MMU, text and data segments relative distances are different
> > from one process to another, hence the need for a dedicated FDPIC
> > register holding the start address of the data segment. One of the
> > side effects is that function pointers require two words to be
> > represented: the address of the code, and the data segment start
> > address. These two words are designated as "Function Descriptor",
> > hence the "FD PIC" name.
> >
> > On ARM, the FDPIC register is r9 [1], and the target name is
> > arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> > ABI and the BFLAT file format; it does not support code sharing.
> > The -mfdpic option is enabled by default, and -mno-fdpic should be
> > used to build the Linux kernel.
> >
> > This work was developed some time ago by STMicroelectronics, and was
> > presented during Linaro Connect SFO15 (September 2015). You can watch
> > the discussion and read the slides [2].
> > This presentation was related to the toolchain published on github [3],
> > which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> > and qemu-2.3.0, and for which pre-built binaries are available [3].
> >
> > The ABI itself is described in details in [1].
> >
> > Our Linux kernel patches have been updated and committed by Nicolas
> > Pitre (Linaro) in July 2017. They are required so that the loader is
> > able to handle this new file type. Indeed, the ELF files are tagged
> > with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> > well as the new relocations involved.
> >
> > The binutils, QEMU and uclibc-ng patch series have been merged a few
> > months ago. [4][5][6]
> >
> > This series provides support for architectures that support ARM and/or
> > Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> > as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> > a few more failures than arm-linux-gnueabi, but is quite functional.
> >
> > I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> > with linux-4.20.17 and ran successfully several tools.
> >
> > Are the GCC patches OK for inclusion in master?
> >
> > Changes between v4 and v5:
> > - rebased on top of recent gcc-10 master (April 26th, 2019)
> > - fixed handling of stack-protector combined patterns in FDPIC mode
> >
> > Changes between v3 and v4:
> >
> > - improved documentation (patch 1)
> > - emit an error message (sorry) if the target architecture does not
> > support arm nor thumb-2 modes (patch 4)
> > - handle Richard's comments on patch 4 (comments, unspec)
> > - added .align directive (patch 5)
> > - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> > - code factorization in patch 7
> > - typos/internal function name in patch 8
> > - improved patch 12
> > - dropped patch 16
> > - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> > skip some tests
> > - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> > new tests, but a few regressions
> > (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> > - I compiled and executed several LTP tests to exercise pthreads and signals
> > - I wrote and executed a simple testcase to change the interaction
> > with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> > implementation in libgcc as requested by Richard)
> >
> > Changes between v2 and v3:
> > - added doc entry for -mfdpic new option
> > - took Kyrill's comments into account (use "Armv7" instead of "7",
> > code factorization, use preprocessor instead of hard-coding "r9",
> > remove leftover code for thumb1 support, fixed comments)
> > - rebase over recent trunk
> > - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> > 14 (rebase), 19 (rebase)
> >
> > Changes between v1 and v2:
> > - fix GNU coding style
> > - exit with an error for pre-Armv7
> > - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> > - remove unsupported attempts of pre-Armv7/thumb1 support
> > - add instructions in comments next to opcodes
> > - merge patches 11 and 13
> > - fixed protected visibility handling in patch 8
> > - merged legitimize_tls_address_fdpic and
> > legitimize_tls_address_not_fdpic as requested
> >
> > Thanks,
> >
> > Christophe.
> >
> >
> > [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> > [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> > [3] https://github.com/mickael-guene/fdpic_manifest
> > [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> > [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> > [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
> >
> > Christophe Lyon (21):
> > [ARM] FDPIC: Add -mfdpic option support
> > [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> > [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> > [ARM] FDPIC: Add support for FDPIC for arm architecture
> > [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> > [ARM] FDPIC: Add support for c++ exceptions
> > [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> > [ARM] FDPIC: Enforce local/global binding for function descriptors
> > [ARM] FDPIC: Add support for taking address of nested function
> > [ARM] FDPIC: Implement TLS support.
> > [ARM] FDPIC: Add support to unwind FDPIC signal frame
> > [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> > [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> > [ARM][testsuite] FDPIC: Skip unsupported tests
> > [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> > [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> > [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> > [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> > [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> > [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> > FDPIC
> > [ARM] FDPIC: Handle stack-protector combined patterns
> >
> > config/futex.m4 | 2 +-
> > config/tls.m4 | 2 +-
> > gcc/config.gcc | 13 +-
> > gcc/config/arm/arm-c.c | 2 +
> > gcc/config/arm/arm-protos.h | 1 +
> > gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> > gcc/config/arm/arm.h | 16 +-
> > gcc/config/arm/arm.md | 151 ++++++-
> > gcc/config/arm/arm.opt | 4 +
> > gcc/config/arm/bpabi.h | 4 +-
> > gcc/config/arm/linux-eabi.h | 7 +-
> > gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> > gcc/config/arm/unspecs.md | 1 +
> > gcc/doc/invoke.texi | 20 +-
> > gcc/ginclude/unwind-arm-common.h | 2 +-
> > gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> > gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> > gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> > gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> > gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> > gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> > gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> > gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> > gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> > gcc/testsuite/g++.dg/other/anon5.C | 1 +
> > gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> > gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> > gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> > gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> > gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> > gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> > gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> > gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> > gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> > gcc/testsuite/gcc.dg/const-1.c | 2 +-
> > gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> > gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> > gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> > gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> > gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> > gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> > gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> > gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> > gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> > gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> > gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> > gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> > gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> > gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> > gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> > gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> > gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> > gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> > gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> > gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> > gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> > gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> > gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> > .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> > .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> > gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> > gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> > gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> > gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> > gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> > gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> > gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> > gcc/testsuite/gcc.target/arm/g2.c | 1 +
> > gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> > gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> > gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> > gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> > gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> > gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> > gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> > gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> > gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> > gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> > gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> > gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> > gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> > gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> > gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> > gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> > .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> > gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> > gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> > gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> > gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> > gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> > gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> > gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> > gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> > gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> > gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> > gcc/testsuite/lib/target-supports.exp | 10 +
> > libatomic/configure | 8 +-
> > libatomic/configure.tgt | 2 +-
> > libgcc/config.host | 4 +-
> > libgcc/config/arm/linux-atomic.c | 55 ++-
> > libgcc/config/arm/unwind-arm.c | 5 +
> > libgcc/config/arm/unwind-arm.h | 31 +-
> > libgcc/crtstuff.c | 18 +
> > libgcc/unwind-arm-common.inc | 216 +++++++++
> > libgcc/unwind-pe.h | 17 +
> > libitm/configure | 20 +-
> > libitm/configure.tgt | 2 +-
> > libsanitizer/configure.tgt | 3 +
> > libstdc++-v3/acinclude.m4 | 12 +-
> > libstdc++-v3/configure | 36 +-
> > libstdc++-v3/configure.host | 6 +-
> > libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> > libtool.m4 | 14 +-
> > 156 files changed, 1233 insertions(+), 219 deletions(-)
> > create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
> >
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-06-04 12:57 ` Christophe Lyon
@ 2019-06-06 12:36 ` Christophe Lyon
2019-06-17 11:42 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-06-06 12:36 UTC (permalink / raw)
To: gcc Patches; +Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrylo Tkachov
Hi,
If this makes review easier, here are the areas covered by the patches:
- patches 1,3,4,7,8,9,10,12,21: target-specific
- patch 2: configure
- patch 5,6,11,13: generic parts, undef #if defined(__FDPIC__)
- patches 14-20: testsuite
Christophe
On Tue, 4 Jun 2019 at 14:57, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> Ping?
>
>
> On Thu, 23 May 2019 at 14:46, Christophe Lyon <christophe.lyon@st.com> wrote:
> >
> > Ping?
> >
> > Any feedback other than what I got on patch 03/21 ?
> >
> > Thanks,
> >
> > Christophe
> >
> >
> > On 15/05/2019 14:39, Christophe Lyon wrote:
> > > Hello,
> > >
> > > This patch series implements the GCC contribution of the FDPIC ABI for
> > > ARM targets.
> > >
> > > This ABI enables to run Linux on ARM MMU-less cores and supports
> > > shared libraries to reduce the memory footprint.
> > >
> > > Without MMU, text and data segments relative distances are different
> > > from one process to another, hence the need for a dedicated FDPIC
> > > register holding the start address of the data segment. One of the
> > > side effects is that function pointers require two words to be
> > > represented: the address of the code, and the data segment start
> > > address. These two words are designated as "Function Descriptor",
> > > hence the "FD PIC" name.
> > >
> > > On ARM, the FDPIC register is r9 [1], and the target name is
> > > arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> > > ABI and the BFLAT file format; it does not support code sharing.
> > > The -mfdpic option is enabled by default, and -mno-fdpic should be
> > > used to build the Linux kernel.
> > >
> > > This work was developed some time ago by STMicroelectronics, and was
> > > presented during Linaro Connect SFO15 (September 2015). You can watch
> > > the discussion and read the slides [2].
> > > This presentation was related to the toolchain published on github [3],
> > > which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> > > and qemu-2.3.0, and for which pre-built binaries are available [3].
> > >
> > > The ABI itself is described in details in [1].
> > >
> > > Our Linux kernel patches have been updated and committed by Nicolas
> > > Pitre (Linaro) in July 2017. They are required so that the loader is
> > > able to handle this new file type. Indeed, the ELF files are tagged
> > > with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> > > well as the new relocations involved.
> > >
> > > The binutils, QEMU and uclibc-ng patch series have been merged a few
> > > months ago. [4][5][6]
> > >
> > > This series provides support for architectures that support ARM and/or
> > > Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> > > as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> > > a few more failures than arm-linux-gnueabi, but is quite functional.
> > >
> > > I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> > > with linux-4.20.17 and ran successfully several tools.
> > >
> > > Are the GCC patches OK for inclusion in master?
> > >
> > > Changes between v4 and v5:
> > > - rebased on top of recent gcc-10 master (April 26th, 2019)
> > > - fixed handling of stack-protector combined patterns in FDPIC mode
> > >
> > > Changes between v3 and v4:
> > >
> > > - improved documentation (patch 1)
> > > - emit an error message (sorry) if the target architecture does not
> > > support arm nor thumb-2 modes (patch 4)
> > > - handle Richard's comments on patch 4 (comments, unspec)
> > > - added .align directive (patch 5)
> > > - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> > > - code factorization in patch 7
> > > - typos/internal function name in patch 8
> > > - improved patch 12
> > > - dropped patch 16
> > > - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> > > skip some tests
> > > - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> > > new tests, but a few regressions
> > > (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> > > - I compiled and executed several LTP tests to exercise pthreads and signals
> > > - I wrote and executed a simple testcase to change the interaction
> > > with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> > > implementation in libgcc as requested by Richard)
> > >
> > > Changes between v2 and v3:
> > > - added doc entry for -mfdpic new option
> > > - took Kyrill's comments into account (use "Armv7" instead of "7",
> > > code factorization, use preprocessor instead of hard-coding "r9",
> > > remove leftover code for thumb1 support, fixed comments)
> > > - rebase over recent trunk
> > > - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> > > 14 (rebase), 19 (rebase)
> > >
> > > Changes between v1 and v2:
> > > - fix GNU coding style
> > > - exit with an error for pre-Armv7
> > > - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> > > - remove unsupported attempts of pre-Armv7/thumb1 support
> > > - add instructions in comments next to opcodes
> > > - merge patches 11 and 13
> > > - fixed protected visibility handling in patch 8
> > > - merged legitimize_tls_address_fdpic and
> > > legitimize_tls_address_not_fdpic as requested
> > >
> > > Thanks,
> > >
> > > Christophe.
> > >
> > >
> > > [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> > > [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> > > [3] https://github.com/mickael-guene/fdpic_manifest
> > > [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> > > [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> > > [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
> > >
> > > Christophe Lyon (21):
> > > [ARM] FDPIC: Add -mfdpic option support
> > > [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> > > [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> > > [ARM] FDPIC: Add support for FDPIC for arm architecture
> > > [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> > > [ARM] FDPIC: Add support for c++ exceptions
> > > [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> > > [ARM] FDPIC: Enforce local/global binding for function descriptors
> > > [ARM] FDPIC: Add support for taking address of nested function
> > > [ARM] FDPIC: Implement TLS support.
> > > [ARM] FDPIC: Add support to unwind FDPIC signal frame
> > > [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> > > [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> > > [ARM][testsuite] FDPIC: Skip unsupported tests
> > > [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> > > [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> > > [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> > > [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> > > [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> > > [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> > > FDPIC
> > > [ARM] FDPIC: Handle stack-protector combined patterns
> > >
> > > config/futex.m4 | 2 +-
> > > config/tls.m4 | 2 +-
> > > gcc/config.gcc | 13 +-
> > > gcc/config/arm/arm-c.c | 2 +
> > > gcc/config/arm/arm-protos.h | 1 +
> > > gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> > > gcc/config/arm/arm.h | 16 +-
> > > gcc/config/arm/arm.md | 151 ++++++-
> > > gcc/config/arm/arm.opt | 4 +
> > > gcc/config/arm/bpabi.h | 4 +-
> > > gcc/config/arm/linux-eabi.h | 7 +-
> > > gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> > > gcc/config/arm/unspecs.md | 1 +
> > > gcc/doc/invoke.texi | 20 +-
> > > gcc/ginclude/unwind-arm-common.h | 2 +-
> > > gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> > > gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> > > gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> > > gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> > > gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> > > gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> > > gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> > > gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> > > gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> > > gcc/testsuite/g++.dg/other/anon5.C | 1 +
> > > gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> > > gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> > > gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> > > gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> > > gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> > > gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> > > gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> > > gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> > > gcc/testsuite/gcc.dg/const-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> > > gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> > > gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> > > gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> > > gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> > > gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> > > gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> > > gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> > > gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> > > gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> > > gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> > > .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> > > .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> > > gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> > > gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> > > gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> > > gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> > > gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> > > gcc/testsuite/gcc.target/arm/g2.c | 1 +
> > > gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> > > gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> > > gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> > > gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> > > gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> > > gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> > > gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> > > gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> > > gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> > > .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> > > gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> > > gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> > > gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> > > gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> > > gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> > > gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> > > gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> > > gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> > > gcc/testsuite/lib/target-supports.exp | 10 +
> > > libatomic/configure | 8 +-
> > > libatomic/configure.tgt | 2 +-
> > > libgcc/config.host | 4 +-
> > > libgcc/config/arm/linux-atomic.c | 55 ++-
> > > libgcc/config/arm/unwind-arm.c | 5 +
> > > libgcc/config/arm/unwind-arm.h | 31 +-
> > > libgcc/crtstuff.c | 18 +
> > > libgcc/unwind-arm-common.inc | 216 +++++++++
> > > libgcc/unwind-pe.h | 17 +
> > > libitm/configure | 20 +-
> > > libitm/configure.tgt | 2 +-
> > > libsanitizer/configure.tgt | 3 +
> > > libstdc++-v3/acinclude.m4 | 12 +-
> > > libstdc++-v3/configure | 36 +-
> > > libstdc++-v3/configure.host | 6 +-
> > > libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> > > libtool.m4 | 14 +-
> > > 156 files changed, 1233 insertions(+), 219 deletions(-)
> > > create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
> > >
> >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-06-06 12:36 ` Christophe Lyon
@ 2019-06-17 11:42 ` Christophe Lyon
2019-07-01 12:16 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-06-17 11:42 UTC (permalink / raw)
To: gcc Patches
Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrylo Tkachov, nick clifton
ping^3 ?
On Thu, 6 Jun 2019 at 14:36, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> Hi,
>
> If this makes review easier, here are the areas covered by the patches:
>
> - patches 1,3,4,7,8,9,10,12,21: target-specific
> - patch 2: configure
> - patch 5,6,11,13: generic parts, undef #if defined(__FDPIC__)
> - patches 14-20: testsuite
>
> Christophe
>
> On Tue, 4 Jun 2019 at 14:57, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> >
> > Ping?
> >
> >
> > On Thu, 23 May 2019 at 14:46, Christophe Lyon <christophe.lyon@st.com> wrote:
> > >
> > > Ping?
> > >
> > > Any feedback other than what I got on patch 03/21 ?
> > >
> > > Thanks,
> > >
> > > Christophe
> > >
> > >
> > > On 15/05/2019 14:39, Christophe Lyon wrote:
> > > > Hello,
> > > >
> > > > This patch series implements the GCC contribution of the FDPIC ABI for
> > > > ARM targets.
> > > >
> > > > This ABI enables to run Linux on ARM MMU-less cores and supports
> > > > shared libraries to reduce the memory footprint.
> > > >
> > > > Without MMU, text and data segments relative distances are different
> > > > from one process to another, hence the need for a dedicated FDPIC
> > > > register holding the start address of the data segment. One of the
> > > > side effects is that function pointers require two words to be
> > > > represented: the address of the code, and the data segment start
> > > > address. These two words are designated as "Function Descriptor",
> > > > hence the "FD PIC" name.
> > > >
> > > > On ARM, the FDPIC register is r9 [1], and the target name is
> > > > arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> > > > ABI and the BFLAT file format; it does not support code sharing.
> > > > The -mfdpic option is enabled by default, and -mno-fdpic should be
> > > > used to build the Linux kernel.
> > > >
> > > > This work was developed some time ago by STMicroelectronics, and was
> > > > presented during Linaro Connect SFO15 (September 2015). You can watch
> > > > the discussion and read the slides [2].
> > > > This presentation was related to the toolchain published on github [3],
> > > > which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> > > > and qemu-2.3.0, and for which pre-built binaries are available [3].
> > > >
> > > > The ABI itself is described in details in [1].
> > > >
> > > > Our Linux kernel patches have been updated and committed by Nicolas
> > > > Pitre (Linaro) in July 2017. They are required so that the loader is
> > > > able to handle this new file type. Indeed, the ELF files are tagged
> > > > with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> > > > well as the new relocations involved.
> > > >
> > > > The binutils, QEMU and uclibc-ng patch series have been merged a few
> > > > months ago. [4][5][6]
> > > >
> > > > This series provides support for architectures that support ARM and/or
> > > > Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> > > > as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> > > > a few more failures than arm-linux-gnueabi, but is quite functional.
> > > >
> > > > I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> > > > with linux-4.20.17 and ran successfully several tools.
> > > >
> > > > Are the GCC patches OK for inclusion in master?
> > > >
> > > > Changes between v4 and v5:
> > > > - rebased on top of recent gcc-10 master (April 26th, 2019)
> > > > - fixed handling of stack-protector combined patterns in FDPIC mode
> > > >
> > > > Changes between v3 and v4:
> > > >
> > > > - improved documentation (patch 1)
> > > > - emit an error message (sorry) if the target architecture does not
> > > > support arm nor thumb-2 modes (patch 4)
> > > > - handle Richard's comments on patch 4 (comments, unspec)
> > > > - added .align directive (patch 5)
> > > > - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> > > > - code factorization in patch 7
> > > > - typos/internal function name in patch 8
> > > > - improved patch 12
> > > > - dropped patch 16
> > > > - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> > > > skip some tests
> > > > - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> > > > new tests, but a few regressions
> > > > (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> > > > - I compiled and executed several LTP tests to exercise pthreads and signals
> > > > - I wrote and executed a simple testcase to change the interaction
> > > > with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> > > > implementation in libgcc as requested by Richard)
> > > >
> > > > Changes between v2 and v3:
> > > > - added doc entry for -mfdpic new option
> > > > - took Kyrill's comments into account (use "Armv7" instead of "7",
> > > > code factorization, use preprocessor instead of hard-coding "r9",
> > > > remove leftover code for thumb1 support, fixed comments)
> > > > - rebase over recent trunk
> > > > - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> > > > 14 (rebase), 19 (rebase)
> > > >
> > > > Changes between v1 and v2:
> > > > - fix GNU coding style
> > > > - exit with an error for pre-Armv7
> > > > - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> > > > - remove unsupported attempts of pre-Armv7/thumb1 support
> > > > - add instructions in comments next to opcodes
> > > > - merge patches 11 and 13
> > > > - fixed protected visibility handling in patch 8
> > > > - merged legitimize_tls_address_fdpic and
> > > > legitimize_tls_address_not_fdpic as requested
> > > >
> > > > Thanks,
> > > >
> > > > Christophe.
> > > >
> > > >
> > > > [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> > > > [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> > > > [3] https://github.com/mickael-guene/fdpic_manifest
> > > > [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> > > > [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> > > > [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
> > > >
> > > > Christophe Lyon (21):
> > > > [ARM] FDPIC: Add -mfdpic option support
> > > > [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> > > > [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> > > > [ARM] FDPIC: Add support for FDPIC for arm architecture
> > > > [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> > > > [ARM] FDPIC: Add support for c++ exceptions
> > > > [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> > > > [ARM] FDPIC: Enforce local/global binding for function descriptors
> > > > [ARM] FDPIC: Add support for taking address of nested function
> > > > [ARM] FDPIC: Implement TLS support.
> > > > [ARM] FDPIC: Add support to unwind FDPIC signal frame
> > > > [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> > > > [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> > > > [ARM][testsuite] FDPIC: Skip unsupported tests
> > > > [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> > > > [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> > > > [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> > > > [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> > > > [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> > > > [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> > > > FDPIC
> > > > [ARM] FDPIC: Handle stack-protector combined patterns
> > > >
> > > > config/futex.m4 | 2 +-
> > > > config/tls.m4 | 2 +-
> > > > gcc/config.gcc | 13 +-
> > > > gcc/config/arm/arm-c.c | 2 +
> > > > gcc/config/arm/arm-protos.h | 1 +
> > > > gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> > > > gcc/config/arm/arm.h | 16 +-
> > > > gcc/config/arm/arm.md | 151 ++++++-
> > > > gcc/config/arm/arm.opt | 4 +
> > > > gcc/config/arm/bpabi.h | 4 +-
> > > > gcc/config/arm/linux-eabi.h | 7 +-
> > > > gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> > > > gcc/config/arm/unspecs.md | 1 +
> > > > gcc/doc/invoke.texi | 20 +-
> > > > gcc/ginclude/unwind-arm-common.h | 2 +-
> > > > gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> > > > gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> > > > gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> > > > gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> > > > gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> > > > gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> > > > gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> > > > gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> > > > gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> > > > gcc/testsuite/g++.dg/other/anon5.C | 1 +
> > > > gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> > > > gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> > > > gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> > > > gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> > > > gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> > > > gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> > > > gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> > > > gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> > > > gcc/testsuite/gcc.dg/const-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> > > > gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> > > > gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> > > > gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> > > > gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> > > > gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> > > > gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> > > > gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> > > > gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> > > > gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> > > > .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> > > > .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/g2.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> > > > gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> > > > gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> > > > gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> > > > gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> > > > gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> > > > gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> > > > .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> > > > gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> > > > gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> > > > gcc/testsuite/lib/target-supports.exp | 10 +
> > > > libatomic/configure | 8 +-
> > > > libatomic/configure.tgt | 2 +-
> > > > libgcc/config.host | 4 +-
> > > > libgcc/config/arm/linux-atomic.c | 55 ++-
> > > > libgcc/config/arm/unwind-arm.c | 5 +
> > > > libgcc/config/arm/unwind-arm.h | 31 +-
> > > > libgcc/crtstuff.c | 18 +
> > > > libgcc/unwind-arm-common.inc | 216 +++++++++
> > > > libgcc/unwind-pe.h | 17 +
> > > > libitm/configure | 20 +-
> > > > libitm/configure.tgt | 2 +-
> > > > libsanitizer/configure.tgt | 3 +
> > > > libstdc++-v3/acinclude.m4 | 12 +-
> > > > libstdc++-v3/configure | 36 +-
> > > > libstdc++-v3/configure.host | 6 +-
> > > > libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> > > > libtool.m4 | 14 +-
> > > > 156 files changed, 1233 insertions(+), 219 deletions(-)
> > > > create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
> > > >
> > >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-06-17 11:42 ` Christophe Lyon
@ 2019-07-01 12:16 ` Christophe Lyon
2019-07-08 14:28 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-07-01 12:16 UTC (permalink / raw)
To: gcc Patches
Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrylo Tkachov, nick clifton
ping^4 ?
https://gcc.gnu.org/ml/gcc-patches/2019-05/msg00817.html
On Mon, 17 Jun 2019 at 13:41, Christophe Lyon
<christophe.lyon@linaro.org> wrote:
>
> ping^3 ?
>
> On Thu, 6 Jun 2019 at 14:36, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> >
> > Hi,
> >
> > If this makes review easier, here are the areas covered by the patches:
> >
> > - patches 1,3,4,7,8,9,10,12,21: target-specific
> > - patch 2: configure
> > - patch 5,6,11,13: generic parts, undef #if defined(__FDPIC__)
> > - patches 14-20: testsuite
> >
> > Christophe
> >
> > On Tue, 4 Jun 2019 at 14:57, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> > >
> > > Ping?
> > >
> > >
> > > On Thu, 23 May 2019 at 14:46, Christophe Lyon <christophe.lyon@st.com> wrote:
> > > >
> > > > Ping?
> > > >
> > > > Any feedback other than what I got on patch 03/21 ?
> > > >
> > > > Thanks,
> > > >
> > > > Christophe
> > > >
> > > >
> > > > On 15/05/2019 14:39, Christophe Lyon wrote:
> > > > > Hello,
> > > > >
> > > > > This patch series implements the GCC contribution of the FDPIC ABI for
> > > > > ARM targets.
> > > > >
> > > > > This ABI enables to run Linux on ARM MMU-less cores and supports
> > > > > shared libraries to reduce the memory footprint.
> > > > >
> > > > > Without MMU, text and data segments relative distances are different
> > > > > from one process to another, hence the need for a dedicated FDPIC
> > > > > register holding the start address of the data segment. One of the
> > > > > side effects is that function pointers require two words to be
> > > > > represented: the address of the code, and the data segment start
> > > > > address. These two words are designated as "Function Descriptor",
> > > > > hence the "FD PIC" name.
> > > > >
> > > > > On ARM, the FDPIC register is r9 [1], and the target name is
> > > > > arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> > > > > ABI and the BFLAT file format; it does not support code sharing.
> > > > > The -mfdpic option is enabled by default, and -mno-fdpic should be
> > > > > used to build the Linux kernel.
> > > > >
> > > > > This work was developed some time ago by STMicroelectronics, and was
> > > > > presented during Linaro Connect SFO15 (September 2015). You can watch
> > > > > the discussion and read the slides [2].
> > > > > This presentation was related to the toolchain published on github [3],
> > > > > which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> > > > > and qemu-2.3.0, and for which pre-built binaries are available [3].
> > > > >
> > > > > The ABI itself is described in details in [1].
> > > > >
> > > > > Our Linux kernel patches have been updated and committed by Nicolas
> > > > > Pitre (Linaro) in July 2017. They are required so that the loader is
> > > > > able to handle this new file type. Indeed, the ELF files are tagged
> > > > > with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> > > > > well as the new relocations involved.
> > > > >
> > > > > The binutils, QEMU and uclibc-ng patch series have been merged a few
> > > > > months ago. [4][5][6]
> > > > >
> > > > > This series provides support for architectures that support ARM and/or
> > > > > Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> > > > > as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> > > > > a few more failures than arm-linux-gnueabi, but is quite functional.
> > > > >
> > > > > I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> > > > > with linux-4.20.17 and ran successfully several tools.
> > > > >
> > > > > Are the GCC patches OK for inclusion in master?
> > > > >
> > > > > Changes between v4 and v5:
> > > > > - rebased on top of recent gcc-10 master (April 26th, 2019)
> > > > > - fixed handling of stack-protector combined patterns in FDPIC mode
> > > > >
> > > > > Changes between v3 and v4:
> > > > >
> > > > > - improved documentation (patch 1)
> > > > > - emit an error message (sorry) if the target architecture does not
> > > > > support arm nor thumb-2 modes (patch 4)
> > > > > - handle Richard's comments on patch 4 (comments, unspec)
> > > > > - added .align directive (patch 5)
> > > > > - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> > > > > - code factorization in patch 7
> > > > > - typos/internal function name in patch 8
> > > > > - improved patch 12
> > > > > - dropped patch 16
> > > > > - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> > > > > skip some tests
> > > > > - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> > > > > new tests, but a few regressions
> > > > > (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> > > > > - I compiled and executed several LTP tests to exercise pthreads and signals
> > > > > - I wrote and executed a simple testcase to change the interaction
> > > > > with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> > > > > implementation in libgcc as requested by Richard)
> > > > >
> > > > > Changes between v2 and v3:
> > > > > - added doc entry for -mfdpic new option
> > > > > - took Kyrill's comments into account (use "Armv7" instead of "7",
> > > > > code factorization, use preprocessor instead of hard-coding "r9",
> > > > > remove leftover code for thumb1 support, fixed comments)
> > > > > - rebase over recent trunk
> > > > > - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> > > > > 14 (rebase), 19 (rebase)
> > > > >
> > > > > Changes between v1 and v2:
> > > > > - fix GNU coding style
> > > > > - exit with an error for pre-Armv7
> > > > > - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> > > > > - remove unsupported attempts of pre-Armv7/thumb1 support
> > > > > - add instructions in comments next to opcodes
> > > > > - merge patches 11 and 13
> > > > > - fixed protected visibility handling in patch 8
> > > > > - merged legitimize_tls_address_fdpic and
> > > > > legitimize_tls_address_not_fdpic as requested
> > > > >
> > > > > Thanks,
> > > > >
> > > > > Christophe.
> > > > >
> > > > >
> > > > > [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> > > > > [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> > > > > [3] https://github.com/mickael-guene/fdpic_manifest
> > > > > [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> > > > > [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> > > > > [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
> > > > >
> > > > > Christophe Lyon (21):
> > > > > [ARM] FDPIC: Add -mfdpic option support
> > > > > [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> > > > > [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> > > > > [ARM] FDPIC: Add support for FDPIC for arm architecture
> > > > > [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> > > > > [ARM] FDPIC: Add support for c++ exceptions
> > > > > [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> > > > > [ARM] FDPIC: Enforce local/global binding for function descriptors
> > > > > [ARM] FDPIC: Add support for taking address of nested function
> > > > > [ARM] FDPIC: Implement TLS support.
> > > > > [ARM] FDPIC: Add support to unwind FDPIC signal frame
> > > > > [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> > > > > [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> > > > > [ARM][testsuite] FDPIC: Skip unsupported tests
> > > > > [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> > > > > [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> > > > > [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> > > > > [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> > > > > [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> > > > > [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> > > > > FDPIC
> > > > > [ARM] FDPIC: Handle stack-protector combined patterns
> > > > >
> > > > > config/futex.m4 | 2 +-
> > > > > config/tls.m4 | 2 +-
> > > > > gcc/config.gcc | 13 +-
> > > > > gcc/config/arm/arm-c.c | 2 +
> > > > > gcc/config/arm/arm-protos.h | 1 +
> > > > > gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> > > > > gcc/config/arm/arm.h | 16 +-
> > > > > gcc/config/arm/arm.md | 151 ++++++-
> > > > > gcc/config/arm/arm.opt | 4 +
> > > > > gcc/config/arm/bpabi.h | 4 +-
> > > > > gcc/config/arm/linux-eabi.h | 7 +-
> > > > > gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> > > > > gcc/config/arm/unspecs.md | 1 +
> > > > > gcc/doc/invoke.texi | 20 +-
> > > > > gcc/ginclude/unwind-arm-common.h | 2 +-
> > > > > gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> > > > > gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> > > > > gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> > > > > gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> > > > > gcc/testsuite/g++.dg/other/anon5.C | 1 +
> > > > > gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> > > > > gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> > > > > gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> > > > > gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/const-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> > > > > gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> > > > > gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> > > > > .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> > > > > .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/g2.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> > > > > gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> > > > > gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> > > > > gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> > > > > gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> > > > > gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> > > > > gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> > > > > .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> > > > > gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> > > > > gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> > > > > gcc/testsuite/lib/target-supports.exp | 10 +
> > > > > libatomic/configure | 8 +-
> > > > > libatomic/configure.tgt | 2 +-
> > > > > libgcc/config.host | 4 +-
> > > > > libgcc/config/arm/linux-atomic.c | 55 ++-
> > > > > libgcc/config/arm/unwind-arm.c | 5 +
> > > > > libgcc/config/arm/unwind-arm.h | 31 +-
> > > > > libgcc/crtstuff.c | 18 +
> > > > > libgcc/unwind-arm-common.inc | 216 +++++++++
> > > > > libgcc/unwind-pe.h | 17 +
> > > > > libitm/configure | 20 +-
> > > > > libitm/configure.tgt | 2 +-
> > > > > libsanitizer/configure.tgt | 3 +
> > > > > libstdc++-v3/acinclude.m4 | 12 +-
> > > > > libstdc++-v3/configure | 36 +-
> > > > > libstdc++-v3/configure.host | 6 +-
> > > > > libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> > > > > libtool.m4 | 14 +-
> > > > > 156 files changed, 1233 insertions(+), 219 deletions(-)
> > > > > create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
> > > > >
> > > >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-07-01 12:16 ` Christophe Lyon
@ 2019-07-08 14:28 ` Christophe Lyon
2019-07-16 9:13 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-07-08 14:28 UTC (permalink / raw)
To: gcc Patches
Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrylo Tkachov, nick clifton
ping^5?
On Mon, 1 Jul 2019 at 14:15, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> ping^4 ?
> https://gcc.gnu.org/ml/gcc-patches/2019-05/msg00817.html
>
> On Mon, 17 Jun 2019 at 13:41, Christophe Lyon
> <christophe.lyon@linaro.org> wrote:
> >
> > ping^3 ?
> >
> > On Thu, 6 Jun 2019 at 14:36, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> > >
> > > Hi,
> > >
> > > If this makes review easier, here are the areas covered by the patches:
> > >
> > > - patches 1,3,4,7,8,9,10,12,21: target-specific
> > > - patch 2: configure
> > > - patch 5,6,11,13: generic parts, undef #if defined(__FDPIC__)
> > > - patches 14-20: testsuite
> > >
> > > Christophe
> > >
> > > On Tue, 4 Jun 2019 at 14:57, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> > > >
> > > > Ping?
> > > >
> > > >
> > > > On Thu, 23 May 2019 at 14:46, Christophe Lyon <christophe.lyon@st.com> wrote:
> > > > >
> > > > > Ping?
> > > > >
> > > > > Any feedback other than what I got on patch 03/21 ?
> > > > >
> > > > > Thanks,
> > > > >
> > > > > Christophe
> > > > >
> > > > >
> > > > > On 15/05/2019 14:39, Christophe Lyon wrote:
> > > > > > Hello,
> > > > > >
> > > > > > This patch series implements the GCC contribution of the FDPIC ABI for
> > > > > > ARM targets.
> > > > > >
> > > > > > This ABI enables to run Linux on ARM MMU-less cores and supports
> > > > > > shared libraries to reduce the memory footprint.
> > > > > >
> > > > > > Without MMU, text and data segments relative distances are different
> > > > > > from one process to another, hence the need for a dedicated FDPIC
> > > > > > register holding the start address of the data segment. One of the
> > > > > > side effects is that function pointers require two words to be
> > > > > > represented: the address of the code, and the data segment start
> > > > > > address. These two words are designated as "Function Descriptor",
> > > > > > hence the "FD PIC" name.
> > > > > >
> > > > > > On ARM, the FDPIC register is r9 [1], and the target name is
> > > > > > arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> > > > > > ABI and the BFLAT file format; it does not support code sharing.
> > > > > > The -mfdpic option is enabled by default, and -mno-fdpic should be
> > > > > > used to build the Linux kernel.
> > > > > >
> > > > > > This work was developed some time ago by STMicroelectronics, and was
> > > > > > presented during Linaro Connect SFO15 (September 2015). You can watch
> > > > > > the discussion and read the slides [2].
> > > > > > This presentation was related to the toolchain published on github [3],
> > > > > > which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> > > > > > and qemu-2.3.0, and for which pre-built binaries are available [3].
> > > > > >
> > > > > > The ABI itself is described in details in [1].
> > > > > >
> > > > > > Our Linux kernel patches have been updated and committed by Nicolas
> > > > > > Pitre (Linaro) in July 2017. They are required so that the loader is
> > > > > > able to handle this new file type. Indeed, the ELF files are tagged
> > > > > > with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> > > > > > well as the new relocations involved.
> > > > > >
> > > > > > The binutils, QEMU and uclibc-ng patch series have been merged a few
> > > > > > months ago. [4][5][6]
> > > > > >
> > > > > > This series provides support for architectures that support ARM and/or
> > > > > > Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> > > > > > as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> > > > > > a few more failures than arm-linux-gnueabi, but is quite functional.
> > > > > >
> > > > > > I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> > > > > > with linux-4.20.17 and ran successfully several tools.
> > > > > >
> > > > > > Are the GCC patches OK for inclusion in master?
> > > > > >
> > > > > > Changes between v4 and v5:
> > > > > > - rebased on top of recent gcc-10 master (April 26th, 2019)
> > > > > > - fixed handling of stack-protector combined patterns in FDPIC mode
> > > > > >
> > > > > > Changes between v3 and v4:
> > > > > >
> > > > > > - improved documentation (patch 1)
> > > > > > - emit an error message (sorry) if the target architecture does not
> > > > > > support arm nor thumb-2 modes (patch 4)
> > > > > > - handle Richard's comments on patch 4 (comments, unspec)
> > > > > > - added .align directive (patch 5)
> > > > > > - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> > > > > > - code factorization in patch 7
> > > > > > - typos/internal function name in patch 8
> > > > > > - improved patch 12
> > > > > > - dropped patch 16
> > > > > > - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> > > > > > skip some tests
> > > > > > - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> > > > > > new tests, but a few regressions
> > > > > > (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> > > > > > - I compiled and executed several LTP tests to exercise pthreads and signals
> > > > > > - I wrote and executed a simple testcase to change the interaction
> > > > > > with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> > > > > > implementation in libgcc as requested by Richard)
> > > > > >
> > > > > > Changes between v2 and v3:
> > > > > > - added doc entry for -mfdpic new option
> > > > > > - took Kyrill's comments into account (use "Armv7" instead of "7",
> > > > > > code factorization, use preprocessor instead of hard-coding "r9",
> > > > > > remove leftover code for thumb1 support, fixed comments)
> > > > > > - rebase over recent trunk
> > > > > > - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> > > > > > 14 (rebase), 19 (rebase)
> > > > > >
> > > > > > Changes between v1 and v2:
> > > > > > - fix GNU coding style
> > > > > > - exit with an error for pre-Armv7
> > > > > > - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> > > > > > - remove unsupported attempts of pre-Armv7/thumb1 support
> > > > > > - add instructions in comments next to opcodes
> > > > > > - merge patches 11 and 13
> > > > > > - fixed protected visibility handling in patch 8
> > > > > > - merged legitimize_tls_address_fdpic and
> > > > > > legitimize_tls_address_not_fdpic as requested
> > > > > >
> > > > > > Thanks,
> > > > > >
> > > > > > Christophe.
> > > > > >
> > > > > >
> > > > > > [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> > > > > > [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> > > > > > [3] https://github.com/mickael-guene/fdpic_manifest
> > > > > > [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> > > > > > [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> > > > > > [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
> > > > > >
> > > > > > Christophe Lyon (21):
> > > > > > [ARM] FDPIC: Add -mfdpic option support
> > > > > > [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> > > > > > [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> > > > > > [ARM] FDPIC: Add support for FDPIC for arm architecture
> > > > > > [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> > > > > > [ARM] FDPIC: Add support for c++ exceptions
> > > > > > [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> > > > > > [ARM] FDPIC: Enforce local/global binding for function descriptors
> > > > > > [ARM] FDPIC: Add support for taking address of nested function
> > > > > > [ARM] FDPIC: Implement TLS support.
> > > > > > [ARM] FDPIC: Add support to unwind FDPIC signal frame
> > > > > > [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> > > > > > [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> > > > > > [ARM][testsuite] FDPIC: Skip unsupported tests
> > > > > > [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> > > > > > [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> > > > > > [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> > > > > > [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> > > > > > [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> > > > > > [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> > > > > > FDPIC
> > > > > > [ARM] FDPIC: Handle stack-protector combined patterns
> > > > > >
> > > > > > config/futex.m4 | 2 +-
> > > > > > config/tls.m4 | 2 +-
> > > > > > gcc/config.gcc | 13 +-
> > > > > > gcc/config/arm/arm-c.c | 2 +
> > > > > > gcc/config/arm/arm-protos.h | 1 +
> > > > > > gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> > > > > > gcc/config/arm/arm.h | 16 +-
> > > > > > gcc/config/arm/arm.md | 151 ++++++-
> > > > > > gcc/config/arm/arm.opt | 4 +
> > > > > > gcc/config/arm/bpabi.h | 4 +-
> > > > > > gcc/config/arm/linux-eabi.h | 7 +-
> > > > > > gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> > > > > > gcc/config/arm/unspecs.md | 1 +
> > > > > > gcc/doc/invoke.texi | 20 +-
> > > > > > gcc/ginclude/unwind-arm-common.h | 2 +-
> > > > > > gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> > > > > > gcc/testsuite/g++.dg/other/anon5.C | 1 +
> > > > > > gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> > > > > > gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> > > > > > gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> > > > > > gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/const-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> > > > > > gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> > > > > > gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> > > > > > .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> > > > > > .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/g2.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> > > > > > gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> > > > > > gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> > > > > > gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> > > > > > .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> > > > > > gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> > > > > > gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> > > > > > gcc/testsuite/lib/target-supports.exp | 10 +
> > > > > > libatomic/configure | 8 +-
> > > > > > libatomic/configure.tgt | 2 +-
> > > > > > libgcc/config.host | 4 +-
> > > > > > libgcc/config/arm/linux-atomic.c | 55 ++-
> > > > > > libgcc/config/arm/unwind-arm.c | 5 +
> > > > > > libgcc/config/arm/unwind-arm.h | 31 +-
> > > > > > libgcc/crtstuff.c | 18 +
> > > > > > libgcc/unwind-arm-common.inc | 216 +++++++++
> > > > > > libgcc/unwind-pe.h | 17 +
> > > > > > libitm/configure | 20 +-
> > > > > > libitm/configure.tgt | 2 +-
> > > > > > libsanitizer/configure.tgt | 3 +
> > > > > > libstdc++-v3/acinclude.m4 | 12 +-
> > > > > > libstdc++-v3/configure | 36 +-
> > > > > > libstdc++-v3/configure.host | 6 +-
> > > > > > libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> > > > > > libtool.m4 | 14 +-
> > > > > > 156 files changed, 1233 insertions(+), 219 deletions(-)
> > > > > > create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
> > > > > >
> > > > >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
2019-05-15 12:41 ` [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation Christophe Lyon
@ 2019-07-12 6:49 ` Richard Sandiford
2019-07-12 14:25 ` Christophe Lyon
2019-08-29 15:39 ` Christophe Lyon
0 siblings, 2 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-07-12 6:49 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
> are referenced by their address, not by pointers to the function
> descriptors.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Mickaël Guêné <mickael.guene@st.com>
>
> * libgcc/crtstuff.c: Add support for FDPIC.
>
> Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
>
> diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
> index 4927a9f..159b461 100644
> --- a/libgcc/crtstuff.c
> +++ b/libgcc/crtstuff.c
> @@ -429,9 +429,18 @@ __do_global_dtors_aux (void)
> #ifdef FINI_SECTION_ASM_OP
> CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
> #elif defined (FINI_ARRAY_SECTION_ASM_OP)
> +#if defined(__FDPIC__)
> +__asm__(
> + " .section .fini_array\n"
> + " .align 2\n"
> + " .word __do_global_dtors_aux\n"
> +);
> +asm (TEXT_SECTION_ASM_OP);
> +#else /* defined(__FDPIC__) */
> static func_ptr __do_global_dtors_aux_fini_array_entry[]
> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
> = { __do_global_dtors_aux };
> +#endif /* defined(__FDPIC__) */
> #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
> static void __attribute__((used))
> __do_global_dtors_aux_1 (void)
It'd be good to avoid hard-coding the pointer size. Would it work to do:
__asm__("\t.equ\.t__do_global_dtors_aux_alias, __do_global_dtors_aux\n");
extern char __do_global_dtors_aux_alias;
static void *__do_global_dtors_aux_fini_array_entry[]
__attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *))))
= { &__do_global_dtors_aux_alias };
? Similarly for the init_array.
AFAICT this and 02/21 are the only patches that aren't Arm-specific,
is that right?
Thanks,
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-05-15 12:41 ` [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts Christophe Lyon
@ 2019-07-12 7:44 ` Richard Sandiford
2019-07-12 13:25 ` Christophe Lyon
2019-08-29 15:14 ` Christophe Lyon
0 siblings, 2 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-07-12 7:44 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> The new arm-uclinuxfdpiceabi target behaves pretty much like
> arm-linux-gnueabi. In order the enable the same set of features, we
> have to update several configure scripts that generally match targets
> like *-*-linux*: in most places, we add *-uclinux* where there is
> already *-linux*, or uclinux* when there is already linux*.
>
> In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
> because there is already a different behaviour for *-*uclinux* target.
>
> In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
> libraries support is required, as uclinux does not guarantee that.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> config/
> * futex.m4: Handle *-uclinux*.
> * tls.m4 (GCC_CHECK_TLS): Likewise.
>
> gcc/
> * config.gcc: Handle *-*-uclinuxfdpiceabi.
>
> libatomic/
> * configure.tgt: Handle arm*-*-uclinux*.
> * configure: Regenerate.
>
> libgcc/
> * config.host: Handle *-*-uclinuxfdpiceabi.
>
> libitm/
> * configure.tgt: Handle *-*-uclinux*.
> * configure: Regenerate.
>
> libstdc++-v3/
> * acinclude.m4: Handle uclinux*.
> * configure: Regenerate.
> * configure.host: Handle uclinux*
>
> * libtool.m4: Handle uclinux*.
Has the libtool.m4 patch been submitted to upstream libtool?
I think this is supposed to be handled by submitting there first
and then cherry-picking into gcc, so that the change isn't lost
by a future import.
> [...]
>
> diff --git a/config/tls.m4 b/config/tls.m4
> index 1a5fc59..a487aa4 100644
> --- a/config/tls.m4
> +++ b/config/tls.m4
> @@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
> dnl Shared library options may depend on the host; this check
> dnl is only known to be needed for GNU/Linux.
> case $host in
> - *-*-linux*)
> + *-*-linux* | -*-uclinux*)
> LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
> ;;
> esac
Is this right for all uclinux targets?
> diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
> index 84258d8..cb0fdc5 100644
> --- a/libstdc++-v3/acinclude.m4
> +++ b/libstdc++-v3/acinclude.m4
It'd probably be worth splitting out the libstdc++-v3 bits and
submitting them separately, cc:ing libstdc++@gcc.gnu.org. But...
> @@ -1404,7 +1404,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
> ac_has_nanosleep=yes
> ac_has_sched_yield=yes
> ;;
> - gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
> + gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
> AC_MSG_CHECKING([for at least GNU libc 2.17])
> AC_TRY_COMPILE(
> [#include <features.h>],
is this the right thing to do? It seems odd to be testing the glibc
version for uclibc.
Do you want to support multiple possible settings of
ac_has_clock_monotonic and ac_has_clock_realtime? Or could you just
hard-code the values, given particular baseline assumptions about the
version of uclibc etc.? Hard-coding would then make....
> @@ -1526,7 +1526,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
>
> if test x"$ac_has_clock_monotonic" != x"yes"; then
> case ${target_os} in
> - linux*)
> + linux* | uclinux*)
> AC_MSG_CHECKING([for clock_gettime syscall])
> AC_TRY_COMPILE(
> [#include <unistd.h>
...this redundant.
> @@ -2415,7 +2415,7 @@ AC_DEFUN([GLIBCXX_ENABLE_CLOCALE], [
> # Default to "generic".
> if test $enable_clocale_flag = auto; then
> case ${target_os} in
> - linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
> + linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
> enable_clocale_flag=gnu
> ;;
> darwin*)
This too seems to be choosing a glibc setting for a uclibc target.
> @@ -2661,7 +2661,7 @@ AC_DEFUN([GLIBCXX_ENABLE_ALLOCATOR], [
> # Default to "new".
> if test $enable_libstdcxx_allocator_flag = auto; then
> case ${target_os} in
> - linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
> + linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
> enable_libstdcxx_allocator_flag=new
> ;;
> *)
The full case is:
# Probe for host-specific support if no specific model is specified.
# Default to "new".
if test $enable_libstdcxx_allocator_flag = auto; then
case ${target_os} in
linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
enable_libstdcxx_allocator_flag=new
;;
*)
enable_libstdcxx_allocator_flag=new
;;
esac
fi
which looks a bit redundant :-)
Thanks,
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-07-12 7:44 ` Richard Sandiford
@ 2019-07-12 13:25 ` Christophe Lyon
2019-07-12 13:28 ` Richard Sandiford
2019-08-29 15:14 ` Christophe Lyon
1 sibling, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-07-12 13:25 UTC (permalink / raw)
To: Christophe Lyon, gcc Patches, Richard Sandiford
On Fri, 12 Jul 2019 at 08:49, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Christophe Lyon <christophe.lyon@st.com> writes:
> > The new arm-uclinuxfdpiceabi target behaves pretty much like
> > arm-linux-gnueabi. In order the enable the same set of features, we
> > have to update several configure scripts that generally match targets
> > like *-*-linux*: in most places, we add *-uclinux* where there is
> > already *-linux*, or uclinux* when there is already linux*.
> >
> > In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
> > because there is already a different behaviour for *-*uclinux* target.
> >
> > In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
> > libraries support is required, as uclinux does not guarantee that.
> >
> > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> >
> > config/
> > * futex.m4: Handle *-uclinux*.
> > * tls.m4 (GCC_CHECK_TLS): Likewise.
> >
> > gcc/
> > * config.gcc: Handle *-*-uclinuxfdpiceabi.
> >
> > libatomic/
> > * configure.tgt: Handle arm*-*-uclinux*.
> > * configure: Regenerate.
> >
> > libgcc/
> > * config.host: Handle *-*-uclinuxfdpiceabi.
> >
> > libitm/
> > * configure.tgt: Handle *-*-uclinux*.
> > * configure: Regenerate.
> >
> > libstdc++-v3/
> > * acinclude.m4: Handle uclinux*.
> > * configure: Regenerate.
> > * configure.host: Handle uclinux*
> >
> > * libtool.m4: Handle uclinux*.
>
> Has the libtool.m4 patch been submitted to upstream libtool?
> I think this is supposed to be handled by submitting there first
> and then cherry-picking into gcc, so that the change isn't lost
> by a future import.
Yes, this was raised by Joseph when I first posted this patch series last year:
https://gcc.gnu.org/ml/gcc-patches/2018-05/msg01507.html
I sent a patch there:
https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html
but didn't get any feedback :-(
>
> > [...]
> >
> > diff --git a/config/tls.m4 b/config/tls.m4
> > index 1a5fc59..a487aa4 100644
> > --- a/config/tls.m4
> > +++ b/config/tls.m4
> > @@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
> > dnl Shared library options may depend on the host; this check
> > dnl is only known to be needed for GNU/Linux.
> > case $host in
> > - *-*-linux*)
> > + *-*-linux* | -*-uclinux*)
> > LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
> > ;;
> > esac
>
> Is this right for all uclinux targets?
So...... Let me bring back a bit of history/context. When we developed
FDPIC support in ST several years ago, we used arm-linux-uclibceabi as
triplet.
But when I posted the binutils patch series, Joseph said it wasn't
appropriate and suggested arm-*-uclinuxfdpiceabi instead.
https://sourceware.org/ml/binutils/2018-03/msg00324.html
This had an impact on the GCC side, because some parts weren't enabled
anymore after the triplet change, so I had to introduce this
configure* patch to restore the missing features.
Then, I wondered about the impact on other uclinux targets, but it was
hard to find a supported-supposed-to-work one.
I asked for help on the gcc list
(https://gcc.gnu.org/ml/gcc/2018-10/msg00154.html), and finally
managed to build and test an xtensa toolchain.
And this has an impact on the results on xtensa, as I reported in V3
of this patch:
https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html
But given the little feedback, I'm wondering whether uclinux targets
are actually still alive/maintained?
>
> > diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
> > index 84258d8..cb0fdc5 100644
> > --- a/libstdc++-v3/acinclude.m4
> > +++ b/libstdc++-v3/acinclude.m4
>
> It'd probably be worth splitting out the libstdc++-v3 bits and
> submitting them separately, cc:ing libstdc++@gcc.gnu.org. But...
>
> > @@ -1404,7 +1404,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
> > ac_has_nanosleep=yes
> > ac_has_sched_yield=yes
> > ;;
> > - gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
> > + gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
> > AC_MSG_CHECKING([for at least GNU libc 2.17])
> > AC_TRY_COMPILE(
> > [#include <features.h>],
>
> is this the right thing to do? It seems odd to be testing the glibc
> version for uclibc.
As said above, I needed to set ac_has_nanosleep and ac_has_sched_yield so that
tests continue to pass after the triplet change. Looks like I got the
effect I wanted, but
not in the right way indeed.
> Do you want to support multiple possible settings of
> ac_has_clock_monotonic and ac_has_clock_realtime? Or could you just
> hard-code the values, given particular baseline assumptions about the
> version of uclibc etc.? Hard-coding would then make....
Right, I think it could be hardcoded.
>
> > @@ -1526,7 +1526,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
> >
> > if test x"$ac_has_clock_monotonic" != x"yes"; then
> > case ${target_os} in
> > - linux*)
> > + linux* | uclinux*)
> > AC_MSG_CHECKING([for clock_gettime syscall])
> > AC_TRY_COMPILE(
> > [#include <unistd.h>
>
> ...this redundant.
Indeed.
>
> > @@ -2415,7 +2415,7 @@ AC_DEFUN([GLIBCXX_ENABLE_CLOCALE], [
> > # Default to "generic".
> > if test $enable_clocale_flag = auto; then
> > case ${target_os} in
> > - linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
> > + linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
> > enable_clocale_flag=gnu
> > ;;
> > darwin*)
>
> This too seems to be choosing a glibc setting for a uclibc target.
Indeed, but I'd have to re-run the tests without this hunk to remember
which ones fail with enable_clocale_flag=generic.
>
> > @@ -2661,7 +2661,7 @@ AC_DEFUN([GLIBCXX_ENABLE_ALLOCATOR], [
> > # Default to "new".
> > if test $enable_libstdcxx_allocator_flag = auto; then
> > case ${target_os} in
> > - linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
> > + linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
> > enable_libstdcxx_allocator_flag=new
> > ;;
> > *)
>
> The full case is:
>
> # Probe for host-specific support if no specific model is specified.
> # Default to "new".
> if test $enable_libstdcxx_allocator_flag = auto; then
> case ${target_os} in
> linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
> enable_libstdcxx_allocator_flag=new
> ;;
> *)
> enable_libstdcxx_allocator_flag=new
> ;;
> esac
> fi
>
> which looks a bit redundant :-)
Good catch
Thanks a lot for your feedback.
Christophe
>
> Thanks,
> Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-07-12 13:25 ` Christophe Lyon
@ 2019-07-12 13:28 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-07-12 13:28 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc Patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> On Fri, 12 Jul 2019 at 08:49, Richard Sandiford
> <richard.sandiford@arm.com> wrote:
>>
>> Christophe Lyon <christophe.lyon@st.com> writes:
>> > The new arm-uclinuxfdpiceabi target behaves pretty much like
>> > arm-linux-gnueabi. In order the enable the same set of features, we
>> > have to update several configure scripts that generally match targets
>> > like *-*-linux*: in most places, we add *-uclinux* where there is
>> > already *-linux*, or uclinux* when there is already linux*.
>> >
>> > In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
>> > because there is already a different behaviour for *-*uclinux* target.
>> >
>> > In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
>> > libraries support is required, as uclinux does not guarantee that.
>> >
>> > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>> >
>> > config/
>> > * futex.m4: Handle *-uclinux*.
>> > * tls.m4 (GCC_CHECK_TLS): Likewise.
>> >
>> > gcc/
>> > * config.gcc: Handle *-*-uclinuxfdpiceabi.
>> >
>> > libatomic/
>> > * configure.tgt: Handle arm*-*-uclinux*.
>> > * configure: Regenerate.
>> >
>> > libgcc/
>> > * config.host: Handle *-*-uclinuxfdpiceabi.
>> >
>> > libitm/
>> > * configure.tgt: Handle *-*-uclinux*.
>> > * configure: Regenerate.
>> >
>> > libstdc++-v3/
>> > * acinclude.m4: Handle uclinux*.
>> > * configure: Regenerate.
>> > * configure.host: Handle uclinux*
>> >
>> > * libtool.m4: Handle uclinux*.
>>
>> Has the libtool.m4 patch been submitted to upstream libtool?
>> I think this is supposed to be handled by submitting there first
>> and then cherry-picking into gcc, so that the change isn't lost
>> by a future import.
>
> Yes, this was raised by Joseph when I first posted this patch series last year:
> https://gcc.gnu.org/ml/gcc-patches/2018-05/msg01507.html
> I sent a patch there:
> https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html
> but didn't get any feedback :-(
Ah, OK. In that case, it might be worth adding a comment to libtool.m4
that this has been submitted to libtool but not (yet?) accepted, so at
the moment it's a GCC-local change. That might help the next person
applying libtool patches to understand the history.
>> > diff --git a/config/tls.m4 b/config/tls.m4
>> > index 1a5fc59..a487aa4 100644
>> > --- a/config/tls.m4
>> > +++ b/config/tls.m4
>> > @@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
>> > dnl Shared library options may depend on the host; this check
>> > dnl is only known to be needed for GNU/Linux.
>> > case $host in
>> > - *-*-linux*)
>> > + *-*-linux* | -*-uclinux*)
>> > LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
>> > ;;
>> > esac
>>
>> Is this right for all uclinux targets?
>
> So...... Let me bring back a bit of history/context. When we developed
> FDPIC support in ST several years ago, we used arm-linux-uclibceabi as
> triplet.
> But when I posted the binutils patch series, Joseph said it wasn't
> appropriate and suggested arm-*-uclinuxfdpiceabi instead.
> https://sourceware.org/ml/binutils/2018-03/msg00324.html
>
> This had an impact on the GCC side, because some parts weren't enabled
> anymore after the triplet change, so I had to introduce this
> configure* patch to restore the missing features.
>
> Then, I wondered about the impact on other uclinux targets, but it was
> hard to find a supported-supposed-to-work one.
> I asked for help on the gcc list
> (https://gcc.gnu.org/ml/gcc/2018-10/msg00154.html), and finally
> managed to build and test an xtensa toolchain.
>
> And this has an impact on the results on xtensa, as I reported in V3
> of this patch:
> https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html
>
> But given the little feedback, I'm wondering whether uclinux targets
> are actually still alive/maintained?
Well, maybe not maintained :-)
But while supporting -shared is AIUI the main goal of FDPIC, I'd be
surprised if it was the right thing to test for all uclinux targets.
Testing *-*-uclinuxfdpic* would be more obvious IMO. (But there again,
I'm not an expert on this stuff.)
Thanks,
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
2019-07-12 6:49 ` Richard Sandiford
@ 2019-07-12 14:25 ` Christophe Lyon
2019-08-29 15:39 ` Christophe Lyon
1 sibling, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-07-12 14:25 UTC (permalink / raw)
To: Christophe Lyon, gcc Patches, Richard Sandiford
On Fri, 12 Jul 2019 at 08:06, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Christophe Lyon <christophe.lyon@st.com> writes:
> > In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
> > are referenced by their address, not by pointers to the function
> > descriptors.
> >
> > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > Mickaël Guêné <mickael.guene@st.com>
> >
> > * libgcc/crtstuff.c: Add support for FDPIC.
> >
> > Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
> >
> > diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
> > index 4927a9f..159b461 100644
> > --- a/libgcc/crtstuff.c
> > +++ b/libgcc/crtstuff.c
> > @@ -429,9 +429,18 @@ __do_global_dtors_aux (void)
> > #ifdef FINI_SECTION_ASM_OP
> > CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
> > #elif defined (FINI_ARRAY_SECTION_ASM_OP)
> > +#if defined(__FDPIC__)
> > +__asm__(
> > + " .section .fini_array\n"
> > + " .align 2\n"
> > + " .word __do_global_dtors_aux\n"
> > +);
> > +asm (TEXT_SECTION_ASM_OP);
> > +#else /* defined(__FDPIC__) */
> > static func_ptr __do_global_dtors_aux_fini_array_entry[]
> > __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
> > = { __do_global_dtors_aux };
> > +#endif /* defined(__FDPIC__) */
> > #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
> > static void __attribute__((used))
> > __do_global_dtors_aux_1 (void)
>
> It'd be good to avoid hard-coding the pointer size. Would it work to do:
>
> __asm__("\t.equ\.t__do_global_dtors_aux_alias, __do_global_dtors_aux\n");
> extern char __do_global_dtors_aux_alias;
> static void *__do_global_dtors_aux_fini_array_entry[]
> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *))))
> = { &__do_global_dtors_aux_alias };
>
> ? Similarly for the init_array.
>
I'll take a look, thanks.
> AFAICT this and 02/21 are the only patches that aren't Arm-specific,
> is that right?
Yes for compiler/libs changes.
There are also testsuite changes that potentially include other
targets in patches 16,17,18.
Thanks,
Christophe
> Thanks,
> Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-07-08 14:28 ` Christophe Lyon
@ 2019-07-16 9:13 ` Christophe Lyon
0 siblings, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-07-16 9:13 UTC (permalink / raw)
To: gcc Patches
Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrylo Tkachov, nick clifton
Ping^6?
Le lun. 8 juil. 2019 à 16:27, Christophe Lyon <christophe.lyon@linaro.org>
a écrit :
> ping^5?
>
> On Mon, 1 Jul 2019 at 14:15, Christophe Lyon <christophe.lyon@linaro.org>
> wrote:
> >
> > ping^4 ?
> > https://gcc.gnu.org/ml/gcc-patches/2019-05/msg00817.html
> >
> > On Mon, 17 Jun 2019 at 13:41, Christophe Lyon
> > <christophe.lyon@linaro.org> wrote:
> > >
> > > ping^3 ?
> > >
> > > On Thu, 6 Jun 2019 at 14:36, Christophe Lyon <
> christophe.lyon@linaro.org> wrote:
> > > >
> > > > Hi,
> > > >
> > > > If this makes review easier, here are the areas covered by the
> patches:
> > > >
> > > > - patches 1,3,4,7,8,9,10,12,21: target-specific
> > > > - patch 2: configure
> > > > - patch 5,6,11,13: generic parts, undef #if defined(__FDPIC__)
> > > > - patches 14-20: testsuite
> > > >
> > > > Christophe
> > > >
> > > > On Tue, 4 Jun 2019 at 14:57, Christophe Lyon <
> christophe.lyon@linaro.org> wrote:
> > > > >
> > > > > Ping?
> > > > >
> > > > >
> > > > > On Thu, 23 May 2019 at 14:46, Christophe Lyon <
> christophe.lyon@st.com> wrote:
> > > > > >
> > > > > > Ping?
> > > > > >
> > > > > > Any feedback other than what I got on patch 03/21 ?
> > > > > >
> > > > > > Thanks,
> > > > > >
> > > > > > Christophe
> > > > > >
> > > > > >
> > > > > > On 15/05/2019 14:39, Christophe Lyon wrote:
> > > > > > > Hello,
> > > > > > >
> > > > > > > This patch series implements the GCC contribution of the FDPIC
> ABI for
> > > > > > > ARM targets.
> > > > > > >
> > > > > > > This ABI enables to run Linux on ARM MMU-less cores and
> supports
> > > > > > > shared libraries to reduce the memory footprint.
> > > > > > >
> > > > > > > Without MMU, text and data segments relative distances are
> different
> > > > > > > from one process to another, hence the need for a dedicated
> FDPIC
> > > > > > > register holding the start address of the data segment. One of
> the
> > > > > > > side effects is that function pointers require two words to be
> > > > > > > represented: the address of the code, and the data segment
> start
> > > > > > > address. These two words are designated as "Function
> Descriptor",
> > > > > > > hence the "FD PIC" name.
> > > > > > >
> > > > > > > On ARM, the FDPIC register is r9 [1], and the target name is
> > > > > > > arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses
> another
> > > > > > > ABI and the BFLAT file format; it does not support code
> sharing.
> > > > > > > The -mfdpic option is enabled by default, and -mno-fdpic
> should be
> > > > > > > used to build the Linux kernel.
> > > > > > >
> > > > > > > This work was developed some time ago by STMicroelectronics,
> and was
> > > > > > > presented during Linaro Connect SFO15 (September 2015). You
> can watch
> > > > > > > the discussion and read the slides [2].
> > > > > > > This presentation was related to the toolchain published on
> github [3],
> > > > > > > which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2,
> gdb-7.5.1
> > > > > > > and qemu-2.3.0, and for which pre-built binaries are available
> [3].
> > > > > > >
> > > > > > > The ABI itself is described in details in [1].
> > > > > > >
> > > > > > > Our Linux kernel patches have been updated and committed by
> Nicolas
> > > > > > > Pitre (Linaro) in July 2017. They are required so that the
> loader is
> > > > > > > able to handle this new file type. Indeed, the ELF files are
> tagged
> > > > > > > with ELFOSABI_ARM_FDPIC. This new tag has been allocated by
> ARM, as
> > > > > > > well as the new relocations involved.
> > > > > > >
> > > > > > > The binutils, QEMU and uclibc-ng patch series have been merged
> a few
> > > > > > > months ago. [4][5][6]
> > > > > > >
> > > > > > > This series provides support for architectures that support
> ARM and/or
> > > > > > > Thumb-2 and has been tested on arm-linux-gnueabi without
> regression,
> > > > > > > as well as arm-uclinuxfdpiceabi, using QEMU.
> arm-uclinuxfdpiceabi has
> > > > > > > a few more failures than arm-linux-gnueabi, but is quite
> functional.
> > > > > > >
> > > > > > > I have also booted an STM32 board (stm32f469) which uses a
> cortex-m4
> > > > > > > with linux-4.20.17 and ran successfully several tools.
> > > > > > >
> > > > > > > Are the GCC patches OK for inclusion in master?
> > > > > > >
> > > > > > > Changes between v4 and v5:
> > > > > > > - rebased on top of recent gcc-10 master (April 26th, 2019)
> > > > > > > - fixed handling of stack-protector combined patterns in FDPIC
> mode
> > > > > > >
> > > > > > > Changes between v3 and v4:
> > > > > > >
> > > > > > > - improved documentation (patch 1)
> > > > > > > - emit an error message (sorry) if the target architecture
> does not
> > > > > > > support arm nor thumb-2 modes (patch 4)
> > > > > > > - handle Richard's comments on patch 4 (comments, unspec)
> > > > > > > - added .align directive (patch 5)
> > > > > > > - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb)
> (patch 6)
> > > > > > > - code factorization in patch 7
> > > > > > > - typos/internal function name in patch 8
> > > > > > > - improved patch 12
> > > > > > > - dropped patch 16
> > > > > > > - patch 20 introduces arm_arch*_thumb_ok effective targets to
> help
> > > > > > > skip some tests
> > > > > > > - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds
> many
> > > > > > > new tests, but a few regressions
> > > > > > > (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> > > > > > > - I compiled and executed several LTP tests to exercise
> pthreads and signals
> > > > > > > - I wrote and executed a simple testcase to change the
> interaction
> > > > > > > with __kernel_cmpxchg (ie. call the kernel helper rather
> than use an
> > > > > > > implementation in libgcc as requested by Richard)
> > > > > > >
> > > > > > > Changes between v2 and v3:
> > > > > > > - added doc entry for -mfdpic new option
> > > > > > > - took Kyrill's comments into account (use "Armv7" instead of
> "7",
> > > > > > > code factorization, use preprocessor instead of hard-coding
> "r9",
> > > > > > > remove leftover code for thumb1 support, fixed comments)
> > > > > > > - rebase over recent trunk
> > > > > > > - patches with changes: 1, 2 (commit message), 3 (rebase), 4,
> 6, 7, 9,
> > > > > > > 14 (rebase), 19 (rebase)
> > > > > > >
> > > > > > > Changes between v1 and v2:
> > > > > > > - fix GNU coding style
> > > > > > > - exit with an error for pre-Armv7
> > > > > > > - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> > > > > > > - remove unsupported attempts of pre-Armv7/thumb1 support
> > > > > > > - add instructions in comments next to opcodes
> > > > > > > - merge patches 11 and 13
> > > > > > > - fixed protected visibility handling in patch 8
> > > > > > > - merged legitimize_tls_address_fdpic and
> > > > > > > legitimize_tls_address_not_fdpic as requested
> > > > > > >
> > > > > > > Thanks,
> > > > > > >
> > > > > > > Christophe.
> > > > > > >
> > > > > > >
> > > > > > > [1]
> https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> > > > > > > [2]
> http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> > > > > > > [3] https://github.com/mickael-guene/fdpic_manifest
> > > > > > > [4]
> https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> > > > > > > [5]
> https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> > > > > > > [6]
> https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
> > > > > > >
> > > > > > > Christophe Lyon (21):
> > > > > > > [ARM] FDPIC: Add -mfdpic option support
> > > > > > > [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure
> scripts
> > > > > > > [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic
> is provided
> > > > > > > [ARM] FDPIC: Add support for FDPIC for arm architecture
> > > > > > > [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy
> generation
> > > > > > > [ARM] FDPIC: Add support for c++ exceptions
> > > > > > > [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is
> read-only
> > > > > > > [ARM] FDPIC: Enforce local/global binding for function
> descriptors
> > > > > > > [ARM] FDPIC: Add support for taking address of nested
> function
> > > > > > > [ARM] FDPIC: Implement TLS support.
> > > > > > > [ARM] FDPIC: Add support to unwind FDPIC signal frame
> > > > > > > [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> > > > > > > [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> > > > > > > [ARM][testsuite] FDPIC: Skip unsupported tests
> > > > > > > [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> > > > > > > [ARM][testsuite] FDPIC: Skip tests that don't work in PIC
> mode
> > > > > > > [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> > > > > > > [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> > > > > > > [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash
> with uclibc.
> > > > > > > [ARM][testsuite] FDPIC: Skip tests using architectures
> unsupported by
> > > > > > > FDPIC
> > > > > > > [ARM] FDPIC: Handle stack-protector combined patterns
> > > > > > >
> > > > > > > config/futex.m4 | 2 +-
> > > > > > > config/tls.m4 | 2 +-
> > > > > > > gcc/config.gcc | 13 +-
> > > > > > > gcc/config/arm/arm-c.c | 2 +
> > > > > > > gcc/config/arm/arm-protos.h | 1 +
> > > > > > > gcc/config/arm/arm.c | 485
> ++++++++++++++++++---
> > > > > > > gcc/config/arm/arm.h | 16 +-
> > > > > > > gcc/config/arm/arm.md | 151
> ++++++-
> > > > > > > gcc/config/arm/arm.opt | 4 +
> > > > > > > gcc/config/arm/bpabi.h | 4 +-
> > > > > > > gcc/config/arm/linux-eabi.h | 7 +-
> > > > > > > gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> > > > > > > gcc/config/arm/unspecs.md | 1 +
> > > > > > > gcc/doc/invoke.texi | 20 +-
> > > > > > > gcc/ginclude/unwind-arm-common.h | 2 +-
> > > > > > > gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> > > > > > > gcc/testsuite/g++.dg/other/anon5.C | 1 +
> > > > > > > gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> > > > > > > gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> > > > > > > gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> > > > > > > gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/const-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> > > > > > > gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> > > > > > > gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> > > > > > > .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> > > > > > > .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/g2.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> > > > > > > gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> > > > > > > gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> > > > > > > gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> > > > > > > .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> > > > > > > gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> > > > > > > gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> > > > > > > gcc/testsuite/lib/target-supports.exp | 10 +
> > > > > > > libatomic/configure | 8 +-
> > > > > > > libatomic/configure.tgt | 2 +-
> > > > > > > libgcc/config.host | 4 +-
> > > > > > > libgcc/config/arm/linux-atomic.c | 55 ++-
> > > > > > > libgcc/config/arm/unwind-arm.c | 5 +
> > > > > > > libgcc/config/arm/unwind-arm.h | 31 +-
> > > > > > > libgcc/crtstuff.c | 18 +
> > > > > > > libgcc/unwind-arm-common.inc | 216
> +++++++++
> > > > > > > libgcc/unwind-pe.h | 17 +
> > > > > > > libitm/configure | 20 +-
> > > > > > > libitm/configure.tgt | 2 +-
> > > > > > > libsanitizer/configure.tgt | 3 +
> > > > > > > libstdc++-v3/acinclude.m4 | 12 +-
> > > > > > > libstdc++-v3/configure | 36 +-
> > > > > > > libstdc++-v3/configure.host | 6 +-
> > > > > > > libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> > > > > > > libtool.m4 | 14 +-
> > > > > > > 156 files changed, 1233 insertions(+), 219 deletions(-)
> > > > > > > create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
> > > > > > >
> > > > > >
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support
2019-05-15 12:40 ` [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support Christophe Lyon
@ 2019-07-16 10:18 ` Richard Sandiford
2019-08-29 15:08 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Richard Sandiford @ 2019-07-16 10:18 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
[This isn't really something that should be reviewed under global
reviewership, but if it's either that or nothing, I'll do it anyway...]
Christophe Lyon <christophe.lyon@st.com> writes:
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Mickaël Guêné <mickael.guene@st.com>
>
> gcc/
> * config/arm/arm.opt: Add -mfdpic option.
> * doc/invoke.texi: Add documentation for -mfdpic.
>
> Change-Id: I0eabd1d11c9406fd4a43c4333689ebebbfcc4fe8
>
> diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
> index 9067d49..2ed3bd5 100644
> --- a/gcc/config/arm/arm.opt
> +++ b/gcc/config/arm/arm.opt
> @@ -306,3 +306,7 @@ Cost to assume for a branch insn.
> mgeneral-regs-only
> Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
> Generate code which uses the core registers only (r0-r14).
> +
> +mfdpic
> +Target Report Mask(FDPIC)
> +Enable Function Descriptor PIC mode.
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 29585cf..805d7cc 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -703,7 +703,8 @@ Objective-C and Objective-C++ Dialects}.
> -mrestrict-it @gol
> -mverbose-cost-dump @gol
> -mpure-code @gol
> --mcmse}
> +-mcmse @gol
> +-mfdpic}
>
> @emph{AVR Options}
> @gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol
> @@ -17912,6 +17913,23 @@ MOVT instruction.
> Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
> Development Tools Engineering Specification", which can be found on
> @url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
> +
> +@item -mfdpic
> +@itemx -mno-fdpic
> +@opindex mfdpic
> +@opindex mno-fdpic
> +Select the FDPIC ABI, which uses function descriptors to represent
Maybe "64-bit function descriptors"? Just a suggestion, might not be useful.
OK with that change, thanks.
Richard
> +pointers to functions. When the compiler is configured for
> +@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default
> +and implies @option{-fPIE} if none of the PIC/PIE-related options is
> +provided. On other targets, it only enables the FDPIC-specific code
> +generation features, and the user should explicitly provide the
> +PIC/PIE-related options as needed.
> +
> +The opposite @option{-mno-fdpic} option is useful (and required) to
> +build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi})
> +toolchain as the one used to build the userland programs.
> +
> @end table
>
> @node AVR Options
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-05-23 12:45 ` Christophe Lyon
@ 2019-07-16 10:38 ` Richard Sandiford
2019-07-16 20:00 ` Rich Felker
` (2 more replies)
0 siblings, 3 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-07-16 10:38 UTC (permalink / raw)
To: Christophe Lyon
Cc: Christophe Lyon, Szabolcs Nagy, Rich Felker, nd, gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> On 22/05/2019 10:45, Christophe Lyon wrote:
>> On Wed, 22 May 2019 at 10:39, Szabolcs Nagy <Szabolcs.Nagy@arm.com> wrote:
>>>
>>> On 21/05/2019 16:28, Christophe Lyon wrote:
>>>> --- a/gcc/config/arm/linux-eabi.h
>>>> +++ b/gcc/config/arm/linux-eabi.h
>>>> @@ -89,7 +89,7 @@
>>>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
>>>> #endif
>>>> #define MUSL_DYNAMIC_LINKER \
>>>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
>>>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
>>>> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>>>
>>> the line break seems wrong (either needs \ or no newline)
>>>
>> Sorry, that's a mailer artifact.
>>
>>>> --- a/libsanitizer/configure.tgt
>>>> +++ b/libsanitizer/configure.tgt
>>>> @@ -45,7 +45,7 @@ case "${target}" in
>>>> ;;
>>>> sparc*-*-solaris2.11*)
>>>> ;;
>>>> - arm*-*-uclinuxfdpiceabi)
>>>> + arm*-*-fdpiceabi)
>>>
>>> should be *fdpiceabi instead of *-fdpiceabi i think.
>>
>> Indeed, thanks
>> .
>>
> FWIW, here is the updated patch:
> - handles musl -fdpic suffix
> - disables sanitizers for arm*-*-fdpiceabi
> - does not handle -static in a special way, so using -static produces binaries that request the non-existing /usr/lib/ld.so.1, thus effectively making -static broken/unsupported (this does lead to a few more FAIL in the testsuite)
>
> The plan is to work -static-pie later, as discussed.
Could you make -static without -mno-fdpic an error via a %e spec,
so that the failure mode is a bit more user-friendly?
I realise this isn't your preferred option, sorry.
> diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
> index e1bacf4..6c25a1a 100644
> --- a/gcc/config/arm/bpabi.h
> +++ b/gcc/config/arm/bpabi.h
> @@ -55,6 +55,8 @@
> #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
> "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
>
> +#define TARGET_FDPIC_ASM_SPEC ""
Formatting nit: should be a single space before ""
> +
> #define BE8_LINK_SPEC \
> "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \
> " %{mbig-endian:big}" \
> @@ -64,7 +66,7 @@
> /* Tell the assembler to build BPABI binaries. */
> #undef SUBTARGET_EXTRA_ASM_SPEC
> #define SUBTARGET_EXTRA_ASM_SPEC \
> - "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
> + "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC TARGET_FDPIC_ASM_SPEC
Long line.
> diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
> index 66ec0ea..d7cc923 100644
> --- a/gcc/config/arm/linux-eabi.h
> +++ b/gcc/config/arm/linux-eabi.h
> @@ -89,7 +89,7 @@
> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> #endif
> #define MUSL_DYNAMIC_LINKER \
> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>
> /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
> use the GNU/Linux version, not the generic BPABI version. */
Rich, could you confirm that this is (going to be?) the correct name?
> diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
> index 66ec0ea..d7cc923 100644
> --- a/gcc/config/arm/linux-eabi.h
> +++ b/gcc/config/arm/linux-eabi.h
> @@ -89,7 +89,7 @@
> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> #endif
> #define MUSL_DYNAMIC_LINKER \
> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>
> /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
> use the GNU/Linux version, not the generic BPABI version. */
> @@ -101,11 +101,14 @@
> #undef ASAN_CC1_SPEC
> #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
>
> +#define FDPIC_CC1_SPEC ""
> +
> #undef CC1_SPEC
> #define CC1_SPEC \
> - LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
> + LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
> + FDPIC_CC1_SPEC, \
> GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
> - ANDROID_CC1_SPEC)
> + ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
>
> #define CC1PLUS_SPEC \
> LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
Does it make sense to add FDPIC_CC1_SPEC to the Android version?
> diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
> new file mode 100644
> index 0000000..3180bcd
> --- /dev/null
> +++ b/gcc/config/arm/uclinuxfdpiceabi.h
> @@ -0,0 +1,52 @@
> +/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
> + Copyright (C) 2018 Free Software Foundation, Inc.
> + Contributed by STMicroelectronics.
> +
> + This file is part of GCC.
> +
> + GCC is free software; you can redistribute it and/or modify it
> + under the terms of the GNU General Public License as published
> + by the Free Software Foundation; either version 3, or (at your
> + option) any later version.
> +
> + GCC is distributed in the hope that it will be useful, but WITHOUT
> + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
> + License for more details.
> +
> + You should have received a copy of the GNU General Public License
> + along with GCC; see the file COPYING3. If not see
> + <http://www.gnu.org/licenses/>. */
> +
> +/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
> + which also means we produce PIE code by default. */
> +#undef FDPIC_CC1_SPEC
> +#define FDPIC_CC1_SPEC \
> + "%{!mno-fdpic:-mfdpic %{!no-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
Looks like the !no-PIE should be !fno-PIE.
> +/* Add --fdpic assembler flag by default. */
> +#undef TARGET_FDPIC_ASM_SPEC
> +#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
Single space before the ".
Thanks,
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
2019-05-15 12:42 ` [ARM/FDPIC v5 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only Christophe Lyon
@ 2019-07-16 10:42 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-16 10:42 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> 2019-XX-XXÂ Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/
> Â Â Â Â Â Â Â * config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
> Â Â Â Â Â Â Â * config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
> Â Â Â Â Â Â Â FDPIC.
>
Ok once the rest of the series is approved.
Thanks,
Kyrill
> Change-Id: I0f3b2023ab2a2a0433dfe081dac6bbb194b7a76c
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index d9397b5..dbd1671 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -19651,9 +19651,7 @@ arm_compute_save_reg0_reg12_mask (void)
> Â Â Â Â Â Â Â Â Â Â save_reg_mask |= (1 << reg);
>
>       /* Also save the pic base register if necessary. */
> -Â Â Â Â Â if (flag_pic
> -Â Â Â Â Â Â Â Â && !TARGET_SINGLE_PIC_BASE
> -Â Â Â Â Â Â Â Â && arm_pic_register != INVALID_REGNUM
> +Â Â Â Â Â if (PIC_REGISTER_MAY_NEED_SAVING
> Â Â Â Â Â Â Â Â Â Â && crtl->uses_pic_offset_table)
> Â Â Â Â Â Â Â Â save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
> Â Â Â Â }
> @@ -19685,9 +19683,7 @@ arm_compute_save_reg0_reg12_mask (void)
>
> Â Â Â Â Â Â /* If we aren't loading the PIC register,
>          don't stack it even though it may be live. */
> -Â Â Â Â Â if (flag_pic
> -Â Â Â Â Â Â Â Â && !TARGET_SINGLE_PIC_BASE
> -Â Â Â Â Â Â Â Â && arm_pic_register != INVALID_REGNUM
> +Â Â Â Â Â if (PIC_REGISTER_MAY_NEED_SAVING
> Â Â Â Â Â Â Â Â Â Â && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â || crtl->uses_pic_offset_table))
> Â Â Â Â Â Â Â Â save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index 7b50ef5..45c0e2b 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -1967,6 +1967,13 @@ extern unsigned arm_pic_register;
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â || label_mentioned_p (get_pool_constant
> (X)))))Â Â Â Â Â Â \
> Â Â Â Â Â Â Â Â Â || tls_mentioned_p (X))
>
> +/* We may want to save the PIC register if it is a dedicated one. */
> +#define PIC_REGISTER_MAY_NEED_SAVINGÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> + (flag_pic                                           \
> +Â Â && !TARGET_SINGLE_PIC_BASEÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> +Â Â && !TARGET_FDPICÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> +Â Â && arm_pic_register != INVALID_REGNUM)
> +
> Â /* We need to know when we are making a constant pool; this determines
> Â Â Â whether data needs to be in the GOT or can be referenced via a GOT
>    offset. */
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 08/21] [ARM] FDPIC: Enforce local/global binding for function descriptors
2019-05-15 12:43 ` [ARM/FDPIC v5 08/21] [ARM] FDPIC: Enforce local/global binding for function descriptors Christophe Lyon
@ 2019-07-16 10:51 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-16 10:51 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe,
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Use local binding rules to decide whether we can use GOTOFFFUNCDESC to
> compute the function address.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/
> Â Â Â Â Â Â Â * config/arm/arm.c (arm_local_funcdesc_p): New function.
> Â Â Â Â Â Â Â (legitimize_pic_address): Enforce binding rules on function
> Â Â Â Â Â Â Â pointers in FDPIC mode.
> Â Â Â Â Â Â Â (arm_assemble_integer): Likewise.
>
> Change-Id: I3fa0b63bc0f672903f405aa72cc46052de1c0feb
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index dbd1671..40e3f3b 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -3790,6 +3790,42 @@ arm_options_perform_arch_sanity_checks (void)
> Â Â Â Â }
> Â }
>
> +/* Test whether a local function descriptor is canonical, i.e.,
> +Â Â whether we can use GOTOFFFUNCDESC to compute the address of the
> +  function. */
> +static bool
> +arm_fdpic_local_funcdesc_p (rtx fnx)
> +{
> +Â tree fn;
> +Â enum symbol_visibility vis;
> +Â bool ret;
> +
> +Â if (!TARGET_FDPIC)
> +Â Â Â return TRUE;
> +
> +Â if (! SYMBOL_REF_LOCAL_P (fnx))
> +Â Â Â return FALSE;
> +
Please use normal C 'true' and 'false' in this patch.
Ok with that change once the rest is approved.
Thanks,
Kyrill
> +Â fn = SYMBOL_REF_DECL (fnx);
> +
> +Â if (! fn)
> +Â Â Â return FALSE;
> +
> +Â vis = DECL_VISIBILITY (fn);
> +
> +Â if (vis == VISIBILITY_PROTECTED)
> +Â Â Â /* Private function descriptors for protected functions are not
> +      canonical. Temporarily change the visibility to global so that
> +      we can ensure uniqueness of funcdesc pointers. */
> +Â Â Â DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
> +
> +Â ret = default_binds_local_p_1 (fn, flag_pic);
> +
> +Â DECL_VISIBILITY (fn) = vis;
> +
> +Â return ret;
> +}
> +
> Â static void
> Â arm_add_gc_roots (void)
> Â {
> @@ -7563,7 +7599,9 @@ legitimize_pic_address (rtx orig, machine_mode
> mode, rtx reg, rtx pic_reg,
> Â Â Â Â Â Â Â Â Â Â Â || (GET_CODE (orig) == SYMBOL_REF
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && SYMBOL_REF_LOCAL_P (orig)
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && (SYMBOL_REF_DECL (orig)
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)))
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â && (!SYMBOL_REF_FUNCTION_P (orig)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â || arm_fdpic_local_funcdesc_p (orig))))
> Â Â Â Â Â Â Â Â Â Â && NEED_GOT_RELOC
> Â Â Â Â Â Â Â Â Â Â && arm_pic_data_is_text_relative)
> Â Â Â Â Â Â Â Â insn = arm_pic_static_addr (orig, reg);
> @@ -23231,7 +23269,9 @@ arm_assemble_integer (rtx x, unsigned int
> size, int aligned_p)
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â || (GET_CODE (x) == SYMBOL_REF
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && (!SYMBOL_REF_LOCAL_P (x)
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â || (SYMBOL_REF_DECL (x)
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â || (SYMBOL_REF_FUNCTION_P (x)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && !arm_fdpic_local_funcdesc_p (x)))))
> Â Â Â Â Â Â Â Â Â Â Â Â {
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â fputs ("(GOTFUNCDESC)", asm_out_file);
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
2019-05-15 12:43 ` [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function Christophe Lyon
@ 2019-07-16 11:53 ` Kyrill Tkachov
2019-07-16 13:31 ` Kyrill Tkachov
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-16 11:53 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> In FDPIC mode, the trampoline generated to support pointers to nested
> functions looks like:
>
> Â Â Â Â Â Â Â Â Â Â .word trampoline address
> Â Â Â Â Â Â Â Â Â Â .word trampoline GOT address
>           ldr           r12, [pc, #8]
>           ldr           r9, [pc, #8]
>           ldr          pc, [pc, #8]
> Â Â Â Â Â Â Â Â Â Â .word static chain value
> Â Â Â Â Â Â Â Â Â Â .word GOT address
> Â Â Â Â Â Â Â Â Â Â .word function's address
>
> because in FDPIC function pointers are actually pointers to function
> descriptors, we have to actually generate a function descriptor for
> the trampoline.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/
> Â Â Â Â Â Â Â * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
> Â Â Â Â Â Â Â support.
> Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
> Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
> Â Â Â Â Â Â Â * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
>
> Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 40e3f3b..99d13bf 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
> Â Â Â Â Â Â Â Â Â Â Â .word static chain value
> Â Â Â Â Â Â Â Â Â Â Â .word function's address
>    XXX FIXME: When the trampoline returns, r8 will be clobbered. */
> +/* In FDPIC mode, the trampoline looks like:
> +Â Â Â Â Â Â Â Â Â .word trampoline address
> +Â Â Â Â Â Â Â Â Â .word trampoline GOT address
> +         ldr           r12, [pc, #8] ; #4 for Thumb2
> +         ldr           r9, [pc, #8] ; #4 for Thumb2
> +         ldr          pc, [pc, #8] ; #4 for Thumb2
> +Â Â Â Â Â Â Â Â Â .word static chain value
> +Â Â Â Â Â Â Â Â Â .word GOT address
> +Â Â Â Â Â Â Â Â Â .word function's address
> +*/
I think this comment is not right for Thumb2.
These load instructionshave 32-bit encodings, even in Thumb2 (they use
high registers).
Also, please merge this comment with the one above (no separate /**/)
>
> Â static void
> Â arm_asm_trampoline_template (FILE *f)
> Â {
> Â Â fprintf (f, "\t.syntax unified\n");
>
> -Â if (TARGET_ARM)
> +Â if (TARGET_FDPIC)
> +Â Â Â {
> +Â Â Â Â Â /* The first two words are a function descriptor pointing to the
> +       trampoline code just below. */
> +Â Â Â Â Â if (TARGET_ARM)
> +Â Â Â Â Â Â fprintf (f, "\t.arm\n");
> +Â Â Â Â Â else if (TARGET_THUMB2)
> +Â Â Â Â Â Â fprintf (f, "\t.thumb\n");
> +Â Â Â Â Â else
> +      /* Only ARM and Thumb-2 are supported. */
> +Â Â Â Â Â Â gcc_unreachable ();
> +
> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> +Â Â Â Â Â /* Trampoline code which sets the static chain register but also
> +       PIC register before jumping into real code. */
> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â STATIC_CHAIN_REGNUM, PC_REGNUM,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PC_REGNUM, PC_REGNUM,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
As above, I think the offset should be 8 for both Arm and Thumb2.
Thanks,
Kyrill
> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> +Â Â Â }
> +Â else if (TARGET_ARM)
> Â Â Â Â {
> Â Â Â Â Â Â fprintf (f, "\t.arm\n");
> Â Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM,
> PC_REGNUM);
> @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
> rtx chain_value)
> Â Â emit_block_move (m_tramp, assemble_trampoline_template (),
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
>
> -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
> -Â emit_move_insn (mem, chain_value);
> +Â if (TARGET_FDPIC)
> +Â Â Â {
> +Â Â Â Â Â rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
> +Â Â Â Â Â rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
> +Â Â Â Â Â rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode,
> funcdesc, 4));
> +Â Â Â Â Â /* The function start address is at offset 8, but in Thumb mode
> +Â Â Â Â Â Â Â we want bit 0 set to 1 to indicate Thumb-ness, hence 9
> +       below. */
> +Â Â Â Â Â rtx trampoline_code_start
> +Â Â Â Â Â Â = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
> +
> +     /* Write initial funcdesc which points to the trampoline. */
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 0);
> +Â Â Â Â Â emit_move_insn (mem, trampoline_code_start);
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 4);
> +Â Â Â Â Â emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
> +     /* Setup static chain. */
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 20);
> +Â Â Â Â Â emit_move_insn (mem, chain_value);
> +     /* GOT + real function entry point. */
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 24);
> +Â Â Â Â Â emit_move_insn (mem, gotaddr);
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 28);
> +Â Â Â Â Â emit_move_insn (mem, fnaddr);
> +Â Â Â }
> +Â else
> +Â Â Â {
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
> +Â Â Â Â Â emit_move_insn (mem, chain_value);
>
> -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
> -Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
> -Â emit_move_insn (mem, fnaddr);
> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
> +Â Â Â Â Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
> +Â Â Â Â Â emit_move_insn (mem, fnaddr);
> +Â Â Â }
>
> Â Â a_tramp = XEXP (m_tramp, 0);
> Â Â emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
> @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
> rtx chain_value)
> Â static rtx
> Â arm_trampoline_adjust_address (rtx addr)
> Â {
> -Â if (TARGET_THUMB)
> +Â /* For FDPIC don't fix trampoline address since it's a function
> +    descriptor and not a function address. */
> +Â if (TARGET_THUMB && !TARGET_FDPIC)
> Â Â Â Â addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â NULL, 0, OPTAB_LIB_WIDEN);
> Â Â return addr;
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index 45c0e2b..f80df63 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -1602,7 +1602,7 @@ typedef struct
> Â #define INIT_EXPANDERSÂ arm_init_expanders ()
>
>  /* Length in units of the trampoline for entering a nested function. */
> -#define TRAMPOLINE_SIZEÂ (TARGET_32BIT ? 16 : 20)
> +#define TRAMPOLINE_SIZEÂ (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
>
>  /* Alignment required for a trampoline in bits. */
> Â #define TRAMPOLINE_ALIGNMENTÂ 32
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-05-15 12:41 ` [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture Christophe Lyon
@ 2019-07-16 12:33 ` Richard Sandiford
2019-08-20 17:13 ` Christophe Lyon
2019-08-29 15:39 ` Christophe Lyon
0 siblings, 2 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-07-16 12:33 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> The FDPIC register is hard-coded to r9, as defined in the ABI.
>
> We have to disable tailcall optimizations if we don't know if the
> target function is in the same module. If not, we have to set r9 to
> the value associated with the target module.
>
> When generating a symbol address, we have to take into account whether
> it is a pointer to data or to a function, because different
> relocations are needed.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Mickaël Guêné <mickael.guene@st.com>
>
> * config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
> in FDPIC mode.
> * config/arm/arm-protos.h (arm_load_function_descriptor): Declare
> new function.
> * config/arm/arm.c (arm_option_override): Define pic register to
> FDPIC_REGNUM.
> (arm_function_ok_for_sibcall): Disable sibcall optimization if we
> have no decl or go through PLT.
> (arm_load_pic_register): Handle TARGET_FDPIC.
> (arm_is_segment_info_known): New function.
> (arm_pic_static_addr): Add support for FDPIC.
> (arm_load_function_descriptor): New function.
> (arm_assemble_integer): Add support for FDPIC.
> * config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
> Define. (FDPIC_REGNUM): New define.
> * config/arm/arm.md (call): Add support for FDPIC.
> (call_value): Likewise.
> (*restore_pic_register_after_call): New pattern.
> (untyped_call): Disable if FDPIC.
> (untyped_return): Likewise.
> * config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
>
> Change-Id: I8fb1a6b85ace672184013568c5d28fbda2f7fda4
>
> diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
> index 6e256ee..34695fa 100644
> --- a/gcc/config/arm/arm-c.c
> +++ b/gcc/config/arm/arm-c.c
> @@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
> builtin_define ("__ARM_EABI__");
> }
>
> + def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
> +
> def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
> def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
>
> diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
> index 485bc68..272968a 100644
> --- a/gcc/config/arm/arm-protos.h
> +++ b/gcc/config/arm/arm-protos.h
> @@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
> extern int arm_const_double_inline_cost (rtx);
> extern bool arm_const_double_by_parts (rtx);
> extern bool arm_const_double_by_immediates (rtx);
> +extern rtx arm_load_function_descriptor (rtx funcdesc);
> extern void arm_emit_call_insn (rtx, rtx, bool);
> bool detect_cmse_nonsecure_call (tree);
> extern const char *output_call (rtx *);
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 45abcd8..d9397b5 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -3485,6 +3485,15 @@ arm_option_override (void)
> if (flag_pic && TARGET_VXWORKS_RTP)
> arm_pic_register = 9;
>
> + /* If in FDPIC mode then force arm_pic_register to be r9. */
> + if (TARGET_FDPIC)
> + {
> + arm_pic_register = FDPIC_REGNUM;
> + if (! TARGET_ARM && ! TARGET_THUMB2)
> + sorry ("FDPIC mode is supported on architecture versions that "
> + "support ARM or Thumb-2 only.");
> + }
> +
> if (arm_pic_register_string != NULL)
> {
> int pic_register = decode_reg_name (arm_pic_register_string);
Isn't this equivalent to rejecting Thumb-1? I think that would be
clearer in both the condition and the error message.
How does this interact with arm_pic_data_is_text_relative? Are both
values supported?
> @@ -7295,6 +7304,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
> if (cfun->machine->sibcall_blocked)
> return false;
>
> + if (TARGET_FDPIC)
> + {
> + /* In FDPIC, never tailcall something for which we have no decl:
> + the target function could be in a different module, requiring
> + a different FDPIC register value. */
> + if (decl == NULL)
> + return false;
> +
> + /* Don't tailcall if we go through the PLT since the FDPIC
> + register is then corrupted and we don't restore it after
> + static function calls. */
> + if (!targetm.binds_local_p (decl))
> + return false;
> + }
> +
> /* Never tailcall something if we are generating code for Thumb-1. */
> if (TARGET_THUMB1)
> return false;
> @@ -7711,7 +7735,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
> {
> rtx l1, labelno, pic_tmp, pic_rtx;
>
> - if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
> + if (crtl->uses_pic_offset_table == 0
> + || TARGET_SINGLE_PIC_BASE
> + || TARGET_FDPIC)
> return;
>
> gcc_assert (flag_pic);
> @@ -7780,28 +7806,142 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
> emit_use (pic_reg);
> }
>
> +/* Try to determine whether an object, referenced via ORIG, will be
> + placed in the text or data segment. This is used in FDPIC mode, to
> + decide which relocations to use when accessing ORIG. IS_READONLY
> + is set to true if ORIG is a read-only location, false otherwise.
> + Return true if we could determine the location of ORIG, false
> + otherwise. IS_READONLY is valid only when we return true. */
Maybe *IS_READONLY in both cases?
> +static bool
> +arm_is_segment_info_known (rtx orig, bool *is_readonly)
> +{
> + bool res = false;
> +
> + *is_readonly = false;
> +
> + if (GET_CODE (orig) == LABEL_REF)
> + {
> + res = true;
> + *is_readonly = true;
> + }
Think this function would be easier to read with early returns.
> + else if (SYMBOL_REF_P (orig))
...so "if" rather than "else if" here.
> + {
> + if (CONSTANT_POOL_ADDRESS_P (orig))
> + {
> + res = true;
> + *is_readonly = true;
> + }
> + else if (SYMBOL_REF_LOCAL_P (orig)
> + && !SYMBOL_REF_EXTERNAL_P (orig)
> + && SYMBOL_REF_DECL (orig)
> + && (!DECL_P (SYMBOL_REF_DECL (orig))
> + || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
> + {
> + tree decl = SYMBOL_REF_DECL (orig);
> + tree init = (TREE_CODE (decl) == VAR_DECL)
> + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
> + ? decl : 0;
> + int reloc = 0;
> + bool named_section, readonly;
> +
> + if (init && init != error_mark_node)
> + reloc = compute_reloc_for_constant (init);
> +
> + named_section = TREE_CODE (decl) == VAR_DECL
> + && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
Here too I think it would be better to return false early.
How much variation do you support here for named sections? E.g. can a
linker script really put SECTION_WRITE sections in the text segment?
Seems like there are some cases that could be handled.
(Just asking, not suggesting you should change anything.)
> + readonly = decl_readonly_section (decl, reloc);
> +
> + /* We don't know where the link script will put a named
> + section, so return false in such a case. */
> + res = !named_section;
> +
> + if (!named_section)
> + *is_readonly = readonly;
> + }
> + else
> + {
> + /* We don't know. */
> + res = false;
> + }
> + }
> + else
> + gcc_unreachable ();
> +
> + return res;
> +}
> +
> /* Generate code to load the address of a static var when flag_pic is set. */
> static rtx_insn *
> arm_pic_static_addr (rtx orig, rtx reg)
> {
> rtx l1, labelno, offset_rtx;
> + rtx_insn *insn;
>
> gcc_assert (flag_pic);
>
> - /* We use an UNSPEC rather than a LABEL_REF because this label
> - never appears in the code stream. */
> - labelno = GEN_INT (pic_labelno++);
> - l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
> - l1 = gen_rtx_CONST (VOIDmode, l1);
> + bool is_readonly = false;
> + bool info_known = false;
>
> - /* On the ARM the PC register contains 'dot + 8' at the time of the
> - addition, on the Thumb it is 'dot + 4'. */
> - offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
> - offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
> - UNSPEC_SYMBOL_OFFSET);
> - offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
> + if (TARGET_FDPIC
> + && SYMBOL_REF_P (orig)
> + && !SYMBOL_REF_FUNCTION_P (orig))
> + info_known = arm_is_segment_info_known (orig, &is_readonly);
Excess indendentation. Feels like it might be slightly simpler
to handle SYMBOL_REF_FUNCTION_P in arm_is_segment_info_known,
but I guess the idea is that it might not then be clear whether
the caller is asking about a descriptor or the function itself.
>
> - return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
> + if (TARGET_FDPIC
> + && SYMBOL_REF_P (orig)
> + && !SYMBOL_REF_FUNCTION_P (orig)
> + && !info_known)
> + {
> + /* We don't know where orig is stored, so we have be
> + pessimistic and use a GOT relocation. */
> + rtx pat;
> + rtx mem;
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +
> + pat = gen_calculate_pic_address (reg, pic_reg, orig);
> +
> + /* Make the MEM as close to a constant as possible. */
> + mem = SET_SRC (pat);
> + gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
> + MEM_READONLY_P (mem) = 1;
> + MEM_NOTRAP_P (mem) = 1;
> +
> + insn = emit_insn (pat);
Think "pat = ..." onwards should be split out into a helper, since it's
a cut-&-paste of the code in legitimize_pic_address.
> + }
> + else if (TARGET_FDPIC
> + && SYMBOL_REF_P (orig)
> + && (SYMBOL_REF_FUNCTION_P (orig)
> + || (info_known && !is_readonly)))
> + {
> + /* We use the GOTOFF relocation. */
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +
> + rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
> + emit_insn (gen_movsi (reg, l1));
> + insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
> + }
> + else
> + {
> + /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
> + PC-relative access. */
> + /* We use an UNSPEC rather than a LABEL_REF because this label
> + never appears in the code stream. */
> + labelno = GEN_INT (pic_labelno++);
> + l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
> + l1 = gen_rtx_CONST (VOIDmode, l1);
> +
> + /* On the ARM the PC register contains 'dot + 8' at the time of the
> + addition, on the Thumb it is 'dot + 4'. */
> + offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
> + offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
> + UNSPEC_SYMBOL_OFFSET);
> + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
> +
> + insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
> + labelno));
> + }
> +
> + return insn;
> }
>
> /* Return nonzero if X is valid as an ARM state addressing register. */
> @@ -16112,9 +16252,36 @@ get_jump_table_size (rtx_jump_table_data *insn)
> return 0;
> }
>
> +/* Emit insns to load the function address from FUNCDESC (an FDPIC
> + function descriptor) into a register and the GOT address into the
> + FDPIC register, returning an rtx for the register holding the
> + function address. */
> +
> +rtx
> +arm_load_function_descriptor (rtx funcdesc)
> +{
> + rtx fnaddr_reg = gen_reg_rtx (Pmode);
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
> + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
> +
> + emit_move_insn (fnaddr_reg, fnaddr);
> + /* The ABI requires the entry point address to be loaded first, so
> + prevent the load from being moved after that of the GOT
> + address. */
Do you mean that the move insn above has to come before the
pattern below? If so, I think that should be enforced by making this...
> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
> + gen_rtvec (2, pic_reg, gotaddr),
> + UNSPEC_PIC_RESTORE);
> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gotaddr);
> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, pic_reg);
> + emit_insn (par);
> +
> + return fnaddr_reg;
> +}
> +
...use fnaddr_reg.
Does the instruction actually use pic_reg? We only get here for
non-symbolic addresses after all.
It seems simpler to make *restore_pic_register_after_call a named pattern
and use gen_restore_pic_register_after_call instead.
> /* Return the maximum amount of padding that will be inserted before
> label LABEL. */
> -
> static HOST_WIDE_INT
> get_label_padding (rtx label)
> {
> @@ -23069,9 +23236,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
> && (!SYMBOL_REF_LOCAL_P (x)
> || (SYMBOL_REF_DECL (x)
> ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
> - fputs ("(GOT)", asm_out_file);
> + {
> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> + fputs ("(GOTFUNCDESC)", asm_out_file);
> + else
> + fputs ("(GOT)", asm_out_file);
> + }
> else
> - fputs ("(GOTOFF)", asm_out_file);
> + {
> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> + fputs ("(GOTOFFFUNCDESC)", asm_out_file);
> + else
> + {
> + bool is_readonly;
> +
> + if (arm_is_segment_info_known (x, &is_readonly))
> + fputs ("(GOTOFF)", asm_out_file);
> + else
> + fputs ("(GOT)", asm_out_file);
> + }
> + }
> + }
> +
> + /* For FDPIC we also have to mark symbol for .data section. */
> + if (TARGET_FDPIC
> + && NEED_GOT_RELOC
> + && flag_pic
> + && !making_const_table
> + && SYMBOL_REF_P (x))
> + {
> + if (SYMBOL_REF_FUNCTION_P (x))
> + fputs ("(FUNCDESC)", asm_out_file);
> }
> fputc ('\n', asm_out_file);
> return true;
Do you expect to reach here for LABEL_REFs with TARGET_FDPIC? The second
block of code tests for SYMBOL_REF_P but the first tests
SYMBOL_REF_FUNCTION_P without checking SYMBOL_REF_P first.
Can NEED_GOT_RELOC or flag_pic be false for TARGET_FDPIC?
Is !flag_pic TARGET_FDPIC supported?
> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
> index 0aecd03..9036255 100644
> --- a/gcc/config/arm/arm.md
> +++ b/gcc/config/arm/arm.md
> @@ -8127,6 +8127,23 @@
> rtx callee, pat;
> tree addr = MEM_EXPR (operands[0]);
>
> + /* Force FDPIC register (r9) before call. */
> + if (TARGET_FDPIC)
> + {
> + /* No need to update r9 if calling a static function.
> + In other words: set r9 for indirect or non-local calls. */
> + callee = XEXP (operands[0], 0);
> + if (!SYMBOL_REF_P (callee)
> + || !SYMBOL_REF_LOCAL_P (callee)
> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
IMO it would be better to calculate this once rather than repeat
it below.
> + {
> + emit_insn (gen_blockage ());
Why's the blockage needed? Seems worth a comment.
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
> + emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
Is this use keeping the register live for the call? If so,
I think it'd be better to attach it to the CALL_INSN_FUNCTION_USAGE
instead.
> + }
> + }
> +
> /* In an untyped call, we can get NULL for operand 2. */
> if (operands[2] == NULL_RTX)
> operands[2] = const0_rtx;
> @@ -8140,6 +8157,13 @@
> : !REG_P (callee))
> XEXP (operands[0], 0) = force_reg (Pmode, callee);
>
> + if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
> + {
> + /* Indirect call: set r9 with FDPIC value of callee. */
> + XEXP (operands[0], 0)
> + = arm_load_function_descriptor (XEXP (operands[0], 0));
> + }
> +
> if (detect_cmse_nonsecure_call (addr))
> {
> pat = gen_nonsecure_call_internal (operands[0], operands[1],
Redundant braces.
> @@ -8151,10 +8175,38 @@
> pat = gen_call_internal (operands[0], operands[1], operands[2]);
> arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
> }
> +
> + /* Restore FDPIC register (r9) after call. */
> + if (TARGET_FDPIC)
> + {
> + /* No need to update r9 if calling a static function. */
> + if (!SYMBOL_REF_P (callee)
> + || !SYMBOL_REF_LOCAL_P (callee)
> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
> + {
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
> + emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
> + emit_insn (gen_blockage ());
> + }
> + }
> DONE;
> }"
> )
What's the general assumption about the validity of r9? Seems odd that
we need to load this value both before and after the call.
>
> +(define_insn "*restore_pic_register_after_call"
> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
> + (match_operand:SI 1 "nonimmediate_operand" "r,m")]
> + UNSPEC_PIC_RESTORE)
> + (use (match_dup 1))
> + (clobber (match_dup 0))])
> + ]
> + ""
> + "@
> + mov\t%0, %1
> + ldr\t%0, %1"
> +)
> +
> (define_expand "call_internal"
> [(parallel [(call (match_operand 0 "memory_operand" "")
> (match_operand 1 "general_operand" ""))
Since operand 0 is significant after the instruction, I think this
should be:
(define_insn "*restore_pic_register_after_call"
[(set (match_operand:SI 0 "s_register_operand" "+r,r")
(unspec:SI [(match_dup 0)
(match_operand:SI 1 "nonimmediate_operand" "r,m")]
UNSPEC_PIC_RESTORE))]
...
The (use (match_dup 1)) looks redundant, since the unspec itself
uses operand 1.
> @@ -8215,6 +8267,30 @@
> rtx pat, callee;
> tree addr = MEM_EXPR (operands[1]);
>
> + /* Force FDPIC register (r9) before call. */
> + if (TARGET_FDPIC)
> + {
> + /* No need to update the FDPIC register (r9) if calling a static function.
> + In other words: set r9 for indirect or non-local calls. */
> + callee = XEXP (operands[1], 0);
> + if (!SYMBOL_REF_P (callee)
> + || !SYMBOL_REF_LOCAL_P (callee)
> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
> + {
> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
> + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + rtx initial_fdpic_reg =
> + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
> +
> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
> + gen_rtvec (2, fdpic_reg, initial_fdpic_reg),
> + UNSPEC_PIC_RESTORE);
> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
> + emit_insn (par);
> + }
> + }
> +
It's not obvious why this code is different from the call-without-value
case above, which doesn't use UNSPEC_PIC_RESTORE. I think it should be
split out into a helper function that's used for both call and call_value.
I think it would also be good to have more comments about what
conditions the UNSPEC_PIC_RESTORE pattern is enforcing.
Thanks,
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
2019-07-16 11:53 ` Kyrill Tkachov
@ 2019-07-16 13:31 ` Kyrill Tkachov
2019-07-31 14:48 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-16 13:31 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 7/16/19 12:18 PM, Kyrill Tkachov wrote:
> Hi Christophe
>
> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > In FDPIC mode, the trampoline generated to support pointers to nested
> > functions looks like:
> >
> > Â Â Â Â Â Â Â Â Â Â .word trampoline address
> > Â Â Â Â Â Â Â Â Â Â .word trampoline GOT address
> >           ldr           r12, [pc, #8]
> >           ldr           r9, [pc, #8]
> >           ldr          pc, [pc, #8]
> > Â Â Â Â Â Â Â Â Â Â .word static chain value
> > Â Â Â Â Â Â Â Â Â Â .word GOT address
> > Â Â Â Â Â Â Â Â Â Â .word function's address
> >
> > because in FDPIC function pointers are actually pointers to function
> > descriptors, we have to actually generate a function descriptor for
> > the trampoline.
> >
> > 2019-XX-XXÂ Christophe Lyon <christophe.lyon@st.com>
> >        Mickaël Guêné <mickael.guene@st.com>
> >
> > Â Â Â Â Â Â Â gcc/
> > Â Â Â Â Â Â Â * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
> > Â Â Â Â Â Â Â support.
> > Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
> > Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
> > Â Â Â Â Â Â Â * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
> >
> > Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
> >
> > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> > index 40e3f3b..99d13bf 100644
> > --- a/gcc/config/arm/arm.c
> > +++ b/gcc/config/arm/arm.c
> > @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
> > Â Â Â Â Â Â Â Â Â Â Â .word static chain value
> > Â Â Â Â Â Â Â Â Â Â Â .word function's address
> >    XXX FIXME: When the trampoline returns, r8 will be clobbered. */
> > +/* In FDPIC mode, the trampoline looks like:
> > +Â Â Â Â Â Â Â Â Â .word trampoline address
> > +Â Â Â Â Â Â Â Â Â .word trampoline GOT address
> > +         ldr           r12, [pc, #8] ; #4 for Thumb2
> > +         ldr           r9, [pc, #8] ; #4 for Thumb2
> > +         ldr          pc, [pc, #8] ; #4 for Thumb2
> > +Â Â Â Â Â Â Â Â Â .word static chain value
> > +Â Â Â Â Â Â Â Â Â .word GOT address
> > +Â Â Â Â Â Â Â Â Â .word function's address
> > +*/
>
>
> I think this comment is not right for Thumb2.
>
> These load instructionshave 32-bit encodings, even in Thumb2 (they use
> high registers).
Andre and Wilco pointed out to me offline that the offset should be #4
for Arm mode.
The Arm ARM at E1.2.3 says:
PC, the program counter
* When executing an A32 instruction, PC reads as the address of the
current instruction plus 8.
* When executing a T32 instruction, PC reads as the address of the
current instruction plus 4.
Thanks,
Kyrill
>
> Also, please merge this comment with the one above (no separate /**/)
>
> >
> > Â static void
> > Â arm_asm_trampoline_template (FILE *f)
> > Â {
> > Â Â fprintf (f, "\t.syntax unified\n");
> >
> > -Â if (TARGET_ARM)
> > +Â if (TARGET_FDPIC)
> > +Â Â Â {
> > +Â Â Â Â Â /* The first two words are a function descriptor pointing to the
> > +       trampoline code just below. */
> > +Â Â Â Â Â if (TARGET_ARM)
> > +Â Â Â Â Â Â fprintf (f, "\t.arm\n");
> > +Â Â Â Â Â else if (TARGET_THUMB2)
> > +Â Â Â Â Â Â fprintf (f, "\t.thumb\n");
> > +Â Â Â Â Â else
> > +      /* Only ARM and Thumb-2 are supported. */
> > +Â Â Â Â Â Â gcc_unreachable ();
> > +
> > +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> > +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> > +Â Â Â Â Â /* Trampoline code which sets the static chain register but also
> > +Â Â Â Â Â Â Â PIC register before jumping into real code. */
> > +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â STATIC_CHAIN_REGNUM, PC_REGNUM,
> > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
> > +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
> > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
> > +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PC_REGNUM, PC_REGNUM,
> > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>
>
> As above, I think the offset should be 8 for both Arm and Thumb2.
>
> Thanks,
>
> Kyrill
>
>
> > +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> > +Â Â Â }
> > +Â else if (TARGET_ARM)
> > Â Â Â Â {
> > Â Â Â Â Â Â fprintf (f, "\t.arm\n");
> > Â Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM,
> > PC_REGNUM);
> > @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
> > rtx chain_value)
> > Â Â emit_block_move (m_tramp, assemble_trampoline_template (),
> > Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
> >
> > -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
> > -Â emit_move_insn (mem, chain_value);
> > +Â if (TARGET_FDPIC)
> > +Â Â Â {
> > +Â Â Â Â Â rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
> > +Â Â Â Â Â rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
> > +Â Â Â Â Â rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode,
> > funcdesc, 4));
> > +Â Â Â Â Â /* The function start address is at offset 8, but in Thumb mode
> > +Â Â Â Â Â Â Â we want bit 0 set to 1 to indicate Thumb-ness, hence 9
> > +       below. */
> > +Â Â Â Â Â rtx trampoline_code_start
> > +Â Â Â Â Â Â = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9
> : 8);
> > +
> > +     /* Write initial funcdesc which points to the trampoline. */
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 0);
> > +Â Â Â Â Â emit_move_insn (mem, trampoline_code_start);
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 4);
> > +Â Â Â Â Â emit_move_insn (mem, gen_rtx_REG (Pmode,
> PIC_OFFSET_TABLE_REGNUM));
> > +     /* Setup static chain. */
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 20);
> > +Â Â Â Â Â emit_move_insn (mem, chain_value);
> > +     /* GOT + real function entry point. */
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 24);
> > +Â Â Â Â Â emit_move_insn (mem, gotaddr);
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 28);
> > +Â Â Â Â Â emit_move_insn (mem, fnaddr);
> > +Â Â Â }
> > +Â else
> > +Â Â Â {
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
> > +Â Â Â Â Â emit_move_insn (mem, chain_value);
> >
> > -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
> > -Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
> > -Â emit_move_insn (mem, fnaddr);
> > +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
> > +Â Â Â Â Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
> > +Â Â Â Â Â emit_move_insn (mem, fnaddr);
> > +Â Â Â }
> >
> > Â Â a_tramp = XEXP (m_tramp, 0);
> > Â Â emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
> > @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
> > rtx chain_value)
> > Â static rtx
> > Â arm_trampoline_adjust_address (rtx addr)
> > Â {
> > -Â if (TARGET_THUMB)
> > +Â /* For FDPIC don't fix trampoline address since it's a function
> > +    descriptor and not a function address. */
> > +Â if (TARGET_THUMB && !TARGET_FDPIC)
> > Â Â Â Â addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
> > Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â NULL, 0, OPTAB_LIB_WIDEN);
> > Â Â return addr;
> > diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> > index 45c0e2b..f80df63 100644
> > --- a/gcc/config/arm/arm.h
> > +++ b/gcc/config/arm/arm.h
> > @@ -1602,7 +1602,7 @@ typedef struct
> > Â #define INIT_EXPANDERSÂ arm_init_expanders ()
> >
> > Â /* Length in units of the trampoline for entering a nested
> function. */
> > -#define TRAMPOLINE_SIZEÂ (TARGET_32BIT ? 16 : 20)
> > +#define TRAMPOLINE_SIZEÂ (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
> >
> >  /* Alignment required for a trampoline in bits. */
> > Â #define TRAMPOLINE_ALIGNMENTÂ 32
> > --
> > 2.6.3
> >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-07-16 10:38 ` Richard Sandiford
@ 2019-07-16 20:00 ` Rich Felker
2019-08-01 10:13 ` Christophe Lyon
2019-08-29 15:14 ` Christophe Lyon
2 siblings, 0 replies; 109+ messages in thread
From: Rich Felker @ 2019-07-16 20:00 UTC (permalink / raw)
To: Christophe Lyon, Christophe Lyon, Szabolcs Nagy, nd, gcc-patches,
richard.sandiford
On Tue, Jul 16, 2019 at 11:34:06AM +0100, Richard Sandiford wrote:
> > diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
> > index 66ec0ea..d7cc923 100644
> > --- a/gcc/config/arm/linux-eabi.h
> > +++ b/gcc/config/arm/linux-eabi.h
> > @@ -89,7 +89,7 @@
> > #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> > #endif
> > #define MUSL_DYNAMIC_LINKER \
> > - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> > + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
> >
> > /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
> > use the GNU/Linux version, not the generic BPABI version. */
>
> Rich, could you confirm that this is (going to be?) the correct name?
Yes, as I understand the above logic, which should yield:
/lib/ld-musl-arm-fdpic.so.1
/lib/ld-musl-armhf-fdpic.so.1
/lib/ld-musl-armeb-fdpic.so.1
/lib/ld-musl-armebhf-fdpic.so.1
Rich
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests
2019-05-15 12:45 ` [ARM/FDPIC v5 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests Christophe Lyon
@ 2019-07-19 8:52 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 8:52 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe,
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Several tests cannot work on ARM-FDPIC for various reasons: skip them,
> or skip some directives.
>
> gcc.dg/20020312-2.c: Skip since it forces -fno-pic.
>
> gcc.target/arm/:
> * Skip since r9 is clobbered by assembly code:
> Â 20051215-1.c
> Â mmx-1.c
> Â pr61948.c
> Â pr77933-1.c
> Â pr77933-2.c
>
> * Skip since the test forces armv5te which is not supported by FDPIC:
> Â pr40887.c
> Â pr19599.c
>
> * Skip since FDPIC disables sibcall to external functions:
> Â sibcall-1.c
> Â tail-long-call
> Â vfp-longcall-apcs
>
> * Skip size check since it's different for FDPIC:
> Â ivopts-2.c
> Â ivopts-3.c
> Â ivopts-4.c
> Â ivopts-5.c
> Â pr43597.c
> Â pr43920-2.c
>
> * Disable assembler scanning invalid for FDPIC:
> Â pr45701-1.c
> Â pr45701-2.c
> Â stack-red-zone.c
>
> * gnu2 TLS dialect is not supported by FDPIC:
> Â tlscall.c
>
> * Test relies on symbols not generated in FDPIC:
> Â data-rel-2.c
> Â data-rel-3.c
>
Thanks for the summary.
Ok once the rest is approved.
Kyrill
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/testsuite/
> Â Â Â Â Â Â Â * gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi.
> Â Â Â Â Â Â Â * gcc.target/arm/20051215-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/mmx-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr19599.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr40887.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr61948.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr77933-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr77933-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/sibcall-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/data-rel-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/data-rel-3.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/tail-long-call: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/tlscall.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/vfp-longcall-apcs: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ivopts-2.c: Skip object-size test on
> Â Â Â Â Â Â Â arm*-*-uclinuxfdpiceabi.
> Â Â Â Â Â Â Â * gcc.target/arm/ivopts-3.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ivopts-4.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ivopts-5.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr43597.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr43920-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr45701-1.c: Skip scan-assembler on
> Â Â Â Â Â Â Â arm*-*-uclinuxfdpiceabi.
> Â Â Â Â Â Â Â * gcc.target/arm/pr45701-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/stack-red-zone.c: Likewise.
>
> Change-Id: Icada7ce52537901fdac10403e7997571b7e2c509
>
> diff --git a/gcc/testsuite/gcc.dg/20020312-2.c
> b/gcc/testsuite/gcc.dg/20020312-2.c
> index c584d35..3df99d9 100644
> --- a/gcc/testsuite/gcc.dg/20020312-2.c
> +++ b/gcc/testsuite/gcc.dg/20020312-2.c
> @@ -9,6 +9,7 @@
> Â /* { dg-options "-O -fno-pic" } */
> Â /* { dg-additional-options "-no-pie" { target pie_enabled } } */
> Â /* { dg-require-effective-target nonlocal_goto } */
> +/* { dg-skip-if "" { arm*-*-uclinuxfdpiceabi } "*" "" } */
>
> Â extern void abort (void);
>
> diff --git a/gcc/testsuite/gcc.target/arm/20051215-1.c
> b/gcc/testsuite/gcc.target/arm/20051215-1.c
> index 0519dc7..cc07693 100644
> --- a/gcc/testsuite/gcc.target/arm/20051215-1.c
> +++ b/gcc/testsuite/gcc.target/arm/20051215-1.c
> @@ -3,6 +3,7 @@
>    the call would need an output reload. */
> Â /* { dg-do run } */
> Â /* { dg-options "-O2 -fno-omit-frame-pointer" } */
> +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
> Â extern void abort (void);
> Â typedef void (*callback) (void);
>
> diff --git a/gcc/testsuite/gcc.target/arm/data-rel-2.c
> b/gcc/testsuite/gcc.target/arm/data-rel-2.c
> index 6ba47d6..7d37a8c 100644
> --- a/gcc/testsuite/gcc.target/arm/data-rel-2.c
> +++ b/gcc/testsuite/gcc.target/arm/data-rel-2.c
> @@ -1,3 +1,4 @@
> +/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
> Â /* { dg-options "-fPIC -mno-pic-data-is-text-relative
> -mno-single-pic-base" } */
> Â /* { dg-final { scan-assembler-not "j-\\(.LPIC"Â } } */
> Â /* { dg-final { scan-assembler "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
> diff --git a/gcc/testsuite/gcc.target/arm/data-rel-3.c
> b/gcc/testsuite/gcc.target/arm/data-rel-3.c
> index 2ce1e66..534c6c4 100644
> --- a/gcc/testsuite/gcc.target/arm/data-rel-3.c
> +++ b/gcc/testsuite/gcc.target/arm/data-rel-3.c
> @@ -1,3 +1,4 @@
> +/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
> Â /* { dg-options "-fPIC -mpic-data-is-text-relative" } */
> Â /* { dg-final { scan-assembler "j-\\(.LPIC"Â } } */
> Â /* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" }
> } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-2.c
> b/gcc/testsuite/gcc.target/arm/ivopts-2.c
> index afe91aa..f1d5edb 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-2.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-2.c
> @@ -14,4 +14,4 @@ tr4 (short array[], int n)
>
> Â /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */
> -/* { dg-final { object-size text <= 26 { target arm_thumb2 } } } */
> +/* { dg-final { object-size text <= 26 { target { arm_thumb2 && { !
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-3.c
> b/gcc/testsuite/gcc.target/arm/ivopts-3.c
> index faea996..357350c 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-3.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-3.c
> @@ -16,4 +16,4 @@ tr3 (short array[], unsigned int n)
> Â /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
> -/* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */
> +/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { !
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-4.c
> b/gcc/testsuite/gcc.target/arm/ivopts-4.c
> index b8101cb..2e866c0 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-4.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-4.c
> @@ -17,4 +17,4 @@ tr2 (int array[], int n)
> Â /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
> -/* { dg-final { object-size text <= 36 { target arm_thumb2 } } } */
> +/* { dg-final { object-size text <= 36 { target { arm_thumb2 && { !
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-5.c
> b/gcc/testsuite/gcc.target/arm/ivopts-5.c
> index f4f8c2c..4e8e380 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-5.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-5.c
> @@ -16,4 +16,4 @@ tr1 (int array[], unsigned int n)
> Â /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
> Â /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
> -/* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */
> +/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { !
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/mmx-1.c
> b/gcc/testsuite/gcc.target/arm/mmx-1.c
> index 6317cc0..8060dbd 100644
> --- a/gcc/testsuite/gcc.target/arm/mmx-1.c
> +++ b/gcc/testsuite/gcc.target/arm/mmx-1.c
> @@ -9,6 +9,7 @@
> Â /* { dg-require-effective-target arm32 } */
> Â /* { dg-require-effective-target arm_iwmmxt_ok } */
> Â /* { dg-final { scan-assembler "push.*ip,\[ ]*pc" } } */
> +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
>
> Â /* This function uses all the call-saved registers, namely r4, r5, r6,
>    r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd
> diff --git a/gcc/testsuite/gcc.target/arm/pr19599.c
> b/gcc/testsuite/gcc.target/arm/pr19599.c
> index c3ee220..a536548 100644
> --- a/gcc/testsuite/gcc.target/arm/pr19599.c
> +++ b/gcc/testsuite/gcc.target/arm/pr19599.c
> @@ -1,4 +1,5 @@
> Â /* { dg-skip-if "need at least armv5te" { *-*-* } {
> "-march=armv[234]*" "-mthumb" } { "" } } */
> +/* { dg-skip-if "FDPIC does not support armv5te" {
> arm*-*-uclinuxfdpiceabi } "*" "" } */
> Â /* { dg-options "-O2 -march=armv5te -marm" }Â */
> Â /* { dg-final { scan-assembler "bx" } } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/pr40887.c
> b/gcc/testsuite/gcc.target/arm/pr40887.c
> index 8c91cd9..832f676 100644
> --- a/gcc/testsuite/gcc.target/arm/pr40887.c
> +++ b/gcc/testsuite/gcc.target/arm/pr40887.c
> @@ -1,5 +1,6 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "need at least armv5" { *-*-* } { "-march=armv[234]*"
> } { "" } } */
> +/* { dg-skip-if "FDPIC does not support armv5te" {
> arm*-*-uclinuxfdpiceabi } "*" "" } */
> Â /* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-options "-O2" }Â */
> Â /* { dg-add-options arm_arch_v5te } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr43597.c
> b/gcc/testsuite/gcc.target/arm/pr43597.c
> index 3fdea98..6c9d419 100644
> --- a/gcc/testsuite/gcc.target/arm/pr43597.c
> +++ b/gcc/testsuite/gcc.target/arm/pr43597.c
> @@ -24,4 +24,4 @@ foo4 ()
>
> Â /* { dg-final { scan-assembler-times "sub" 1 } } */
> Â /* { dg-final { scan-assembler-times "cmp" 0 } } */
> -/* { dg-final { object-size text <= 30 } } */
> +/* { dg-final { object-size text <= 30 { target { !
> arm*-*-uclinuxfdpiceabi } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr43920-2.c
> b/gcc/testsuite/gcc.target/arm/pr43920-2.c
> index f5e8f48..c367d6b 100644
> --- a/gcc/testsuite/gcc.target/arm/pr43920-2.c
> +++ b/gcc/testsuite/gcc.target/arm/pr43920-2.c
> @@ -29,4 +29,4 @@ int getFileStartAndLength (int fd, int *start_,
> size_t *length_)
>
> Â /* { dg-final { scan-assembler-times "pop" 2 } } */
> Â /* { dg-final { scan-assembler-times "beq" 3 } } */
> -/* { dg-final { object-size text <= 54 } } */
> +/* { dg-final { object-size text <= 54 { target { !
> arm*-*-uclinuxfdpiceabi } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr45701-1.c
> b/gcc/testsuite/gcc.target/arm/pr45701-1.c
> index 01db15a..b26011b 100644
> --- a/gcc/testsuite/gcc.target/arm/pr45701-1.c
> +++ b/gcc/testsuite/gcc.target/arm/pr45701-1.c
> @@ -1,8 +1,8 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
> Â /* { dg-options "-mthumb -Os" }Â */
> -/* { dg-final { scan-assembler "push\t\{r3" } } */
> -/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */
> +/* { dg-final { scan-assembler "push\t\{r3" { target { !
> arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler-not "\[^\-\]r8" { target { !
> arm*-*-uclinuxfdpiceabi } } } } */
>
> Â extern int hist_verify;
> Â extern int a1;
> diff --git a/gcc/testsuite/gcc.target/arm/pr45701-2.c
> b/gcc/testsuite/gcc.target/arm/pr45701-2.c
> index ce66d75..32eed4d 100644
> --- a/gcc/testsuite/gcc.target/arm/pr45701-2.c
> +++ b/gcc/testsuite/gcc.target/arm/pr45701-2.c
> @@ -1,8 +1,8 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
> Â /* { dg-options "-mthumb -Os" }Â */
> -/* { dg-final { scan-assembler "push\t\{r3" } } */
> -/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */
> +/* { dg-final { scan-assembler "push\t\{r3" { target { !
> arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler-not "\[^\-\]r8" { target { !
> arm*-*-uclinuxfdpiceabi } } } } */
>
> Â extern int hist_verify;
> Â extern int a1;
> diff --git a/gcc/testsuite/gcc.target/arm/pr61948.c
> b/gcc/testsuite/gcc.target/arm/pr61948.c
> index 411e898..3b2b72a 100644
> --- a/gcc/testsuite/gcc.target/arm/pr61948.c
> +++ b/gcc/testsuite/gcc.target/arm/pr61948.c
> @@ -1,5 +1,6 @@
> Â /* PR target/61948 */
> Â /* { dg-do compile } */
> +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
> Â /* { dg-require-effective-target arm_neon_ok } */
> Â /* { dg-require-effective-target arm_thumb2_ok } */
> Â /* { dg-options "-O2 -mthumb" } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr77933-1.c
> b/gcc/testsuite/gcc.target/arm/pr77933-1.c
> index 95cf68e..86b9507 100644
> --- a/gcc/testsuite/gcc.target/arm/pr77933-1.c
> +++ b/gcc/testsuite/gcc.target/arm/pr77933-1.c
> @@ -1,4 +1,5 @@
> Â /* { dg-do run } */
> +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
> Â /* { dg-options "-O2" } */
>
> Â __attribute__ ((noinline, noclone)) void
> diff --git a/gcc/testsuite/gcc.target/arm/pr77933-2.c
> b/gcc/testsuite/gcc.target/arm/pr77933-2.c
> index 9028c4f..a06c11a 100644
> --- a/gcc/testsuite/gcc.target/arm/pr77933-2.c
> +++ b/gcc/testsuite/gcc.target/arm/pr77933-2.c
> @@ -1,5 +1,6 @@
> Â /* { dg-do run } */
> Â /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
> +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi }
> "*" "" } */
> Â /* { dg-options "-mthumb -O2 -mtpcs-leaf-frame" } */
>
> Â __attribute__ ((noinline, noclone)) void
> diff --git a/gcc/testsuite/gcc.target/arm/sibcall-1.c
> b/gcc/testsuite/gcc.target/arm/sibcall-1.c
> index cf352c1..dcdd552 100644
> --- a/gcc/testsuite/gcc.target/arm/sibcall-1.c
> +++ b/gcc/testsuite/gcc.target/arm/sibcall-1.c
> @@ -1,5 +1,6 @@
> Â /* { dg-do compile { target { arm32 } } } */
> Â /* { dg-options "-O2" } */
> +/* { dg-skip-if "FDPIC does not support sibcall optimization" {
> arm*-*-uclinuxfdpiceabi } "*" "" } */
>
> Â #define noinline __attribute__((noinline))
>
> diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c
> b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
> index b29ed0b..3385d7d 100644
> --- a/gcc/testsuite/gcc.target/arm/stack-red-zone.c
> +++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
> @@ -1,7 +1,7 @@
>  /* No stack red zone. PR38644. */
> Â /* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok ||
> arm_thumb2_ok } } } */
> Â /* { dg-options "-mthumb -O2" } */
> -/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp"
> } } */
> +/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp"
> { target { ! arm*-*-uclinuxfdpiceabi } } } } */
>
> Â extern int doStreamReadBlock (int *, char *, int size, int);
>
> diff --git a/gcc/testsuite/gcc.target/arm/tail-long-call.c
> b/gcc/testsuite/gcc.target/arm/tail-long-call.c
> index 9b27468..f70e9cf 100644
> --- a/gcc/testsuite/gcc.target/arm/tail-long-call.c
> +++ b/gcc/testsuite/gcc.target/arm/tail-long-call.c
> @@ -1,4 +1,5 @@
> Â /* { dg-skip-if "need at least armv5te" { *-*-* } {
> "-march=armv[234]*" "-mthumb" } { "" } } */
> +/* { dg-skip-if "FDPIC does not support tailcall optimization" {
> arm*-*-uclinuxfdpiceabi } "*" "" } */
> Â /* { dg-options "-O2 -march=armv5te -marm" } */
> Â /* { dg-final { scan-assembler "bx" } } */
> Â /* { dg-final { scan-assembler-not "blx" } } */
> diff --git a/gcc/testsuite/gcc.target/arm/tlscall.c
> b/gcc/testsuite/gcc.target/arm/tlscall.c
> index 366c1ae..5f4d58b 100644
> --- a/gcc/testsuite/gcc.target/arm/tlscall.c
> +++ b/gcc/testsuite/gcc.target/arm/tlscall.c
> @@ -2,6 +2,7 @@
>
> Â /* { dg-do assemble } */
> Â /* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */
> +/* { dg-skip-if "FDPIC does not support gnu2 TLS dialect" {
> arm*-*-uclinuxfdpiceabi } "*" "" } */
>
> Â typedef struct _IO_FILE FILE;
>
> diff --git a/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
> b/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
> index fa22b4d..817d5d0 100644
> --- a/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
> +++ b/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c
> @@ -1,4 +1,5 @@
> Â /* { dg-do run } */
> +/* { dg-skip-if "FDPIC does not support sibcall optimization" {
> arm*-*-uclinuxfdpiceabi } "*" "" } */
> Â /* { dg-options "-mapcs-frame -O -foptimize-sibling-calls
> -ffunction-sections" } */
>
> Â extern void abort (void);
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
2019-05-15 12:45 ` [ARM/FDPIC v5 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns Christophe Lyon
@ 2019-07-19 8:54 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 8:54 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> In FDPIC mode, r9 is saved in addition to other registers, so update
> the expected patterns accordingly.
>
Ok.
Thanks,
Kyrill
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â * gcc/testsuite/
> Â Â Â Â Â Â Â * gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
> Â Â Â Â Â Â Â arm*-*-uclinuxfdpiceabi.
> Â Â Â Â Â Â Â * gcc.target/arm/interrupt-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr70830.c: Likewise.
>
> Change-Id: Id946b79bacc32be585c31e60a355191f104cc29e
>
> diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c
> b/gcc/testsuite/gcc.target/arm/interrupt-1.c
> index fe94877..493763d 100644
> --- a/gcc/testsuite/gcc.target/arm/interrupt-1.c
> +++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c
> @@ -13,5 +13,7 @@ void foo ()
> Â Â bar (0);
> Â }
>
> -/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip,
> lr}" } } */
> -/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp,
> ip, pc}\\^" } } */
> +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip,
> lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp,
> ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r9,
> fp, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */
> +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5,
> r9, fp, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c
> b/gcc/testsuite/gcc.target/arm/interrupt-2.c
> index 289eca0..5be1f16 100644
> --- a/gcc/testsuite/gcc.target/arm/interrupt-2.c
> +++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c
> @@ -15,5 +15,7 @@ void test()
> Â Â foo = 0;
> Â }
>
> -/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip,
> lr}" } } */
> -/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5,
> ip, pc}\\^" } } */
> +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip,
> lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5,
> ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r6,
> r9, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */
> +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5,
> r6, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr70830.c
> b/gcc/testsuite/gcc.target/arm/pr70830.c
> index cad903b..cd84c42 100644
> --- a/gcc/testsuite/gcc.target/arm/pr70830.c
> +++ b/gcc/testsuite/gcc.target/arm/pr70830.c
> @@ -11,4 +11,5 @@ void __attribute__ ((interrupt ("IRQ")))
> dm3730_IRQHandler(void)
> Â {
> Â Â Â Â prints("IRQ" );
> Â }
> -/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip,
> pc}\\^" } } */
> +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip,
> pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
> +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r9,
> ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 16/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
2019-05-15 12:45 ` [ARM/FDPIC v5 16/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode Christophe Lyon
@ 2019-07-19 8:56 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 8:56 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC
> code and they don't support it: skip them. They also fail on
> arm*-linux* when forcing -fPIC.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> Â Â Â Â Â Â Â gcc/testsuite/
> Â Â Â Â Â Â Â * gcc.target/arm/eliminate.c: Accept only nonpic targets.
> Â Â Â Â Â Â Â * g++.dg/other/anon5.C: Likewise.
>
Ok.
I think it's worth committing this now independently of the others.
Thanks,
Kyrill
> Change-Id: I8efb8d356ce25b020c44a84b07f79a996dca0358
>
> diff --git a/gcc/testsuite/g++.dg/other/anon5.C
> b/gcc/testsuite/g++.dg/other/anon5.C
> index ee4601e..dadd92e 100644
> --- a/gcc/testsuite/g++.dg/other/anon5.C
> +++ b/gcc/testsuite/g++.dg/other/anon5.C
> @@ -1,5 +1,6 @@
> Â // PR c++/34094
> Â // { dg-do link { target { ! { *-*-darwin* *-*-hpux* *-*-solaris2.* }
> } } }
> +// { dg-require-effective-target nonpic }
> Â // { dg-options "-gdwarf-2" }
> Â // Ignore additional message on powerpc-ibm-aix
> Â // { dg-prune-output "obtain more information" } */
> diff --git a/gcc/testsuite/gcc.target/arm/eliminate.c
> b/gcc/testsuite/gcc.target/arm/eliminate.c
> index f254dd8..299d4df 100644
> --- a/gcc/testsuite/gcc.target/arm/eliminate.c
> +++ b/gcc/testsuite/gcc.target/arm/eliminate.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile } */
> +/* { dg-do compile { target { nonpic } } } */
> Â /* { dg-options "-O2" }Â */
>
> Â struct X
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux*
2019-05-15 12:46 ` [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux* Christophe Lyon
@ 2019-07-19 8:57 ` Kyrill Tkachov
2019-07-22 19:37 ` Mike Stump
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 8:57 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches; +Cc: ro, mikestump
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Add *-*-uclinux* to tests that work on this target.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> Â Â Â Â Â Â Â gcc/testsuite/
> Â Â Â Â Â Â Â * g++.dg/abi/forced.C: Add *-*-uclinux*.
> Â Â Â Â Â Â Â * g++.dg/abi/guard2.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ext/cleanup-10.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ext/cleanup-11.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ext/cleanup-8.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ext/cleanup-9.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ext/sync-4.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/comdat.C: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/20041106-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/cleanup-10.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/cleanup-11.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/cleanup-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/cleanup-9.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/fdata-sections-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/fdata-sections-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr39323-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr39323-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr39323-3.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr65780-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr65780-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr67338.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr78185.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr83100-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr83100-4.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-12g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-14g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-14gf.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-16g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-17g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-18g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-1f.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-22g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-2f.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-31g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-33g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-4g.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strlenopt-4gf.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/strncmp-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/struct-ret-3.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/torture/pr69760.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/div64-unwinding.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/stack-checking.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/synchronize.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
> Â Â Â Â Â Â Â * lib/target-supports.exp (check_effective_target_pie): Likewise.
> Â Â Â Â Â Â Â (check_effective_target_sync_long_long_runtime): Likewise.
> Â Â Â Â Â Â Â (check_effective_target_sync_int_long): Likewise.
> Â Â Â Â Â Â Â (check_effective_target_sync_char_short): Likewise.
>
I think these are ok, but you're changing many generic test targets.
Are the testsuite maintainers ok with this change?
Thanks,
Kyrill
> Change-Id: I89bfea79d4490c5df0b6470def5a31d7f31ac2cc
>
> diff --git a/gcc/testsuite/g++.dg/abi/forced.C
> b/gcc/testsuite/g++.dg/abi/forced.C
> index 0e6be28..2d1ec53 100644
> --- a/gcc/testsuite/g++.dg/abi/forced.C
> +++ b/gcc/testsuite/g++.dg/abi/forced.C
> @@ -1,4 +1,4 @@
> -// { dg-do run { target *-*-linux* *-*-gnu* } }
> +// { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } }
> Â // { dg-options "-pthread" }
>
> Â #include <pthread.h>
> diff --git a/gcc/testsuite/g++.dg/abi/guard2.C
> b/gcc/testsuite/g++.dg/abi/guard2.C
> index c35fa7e..74139a8 100644
> --- a/gcc/testsuite/g++.dg/abi/guard2.C
> +++ b/gcc/testsuite/g++.dg/abi/guard2.C
> @@ -1,6 +1,6 @@
> Â // PR c++/41611
> Â // Test that the guard gets its own COMDAT group.
> -// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target
> *-*-linux* *-*-gnu* } } }
> +// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target
> *-*-linux* *-*-gnu* *-*-uclinux* } } }
>
> Â struct A {
> Â Â static int f()
> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-10.C
> b/gcc/testsuite/g++.dg/ext/cleanup-10.C
> index 66c7b76..56aeb66 100644
> --- a/gcc/testsuite/g++.dg/ext/cleanup-10.C
> +++ b/gcc/testsuite/g++.dg/ext/cleanup-10.C
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* Verify that cleanups work with exception handling through signal
> frames
>    on alternate stack. */
> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-11.C
> b/gcc/testsuite/g++.dg/ext/cleanup-11.C
> index 6e96521..c6d3560 100644
> --- a/gcc/testsuite/g++.dg/ext/cleanup-11.C
> +++ b/gcc/testsuite/g++.dg/ext/cleanup-11.C
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* Verify that cleanups work with exception handling through realtime
> signal
>    frames on alternate stack. */
> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-8.C
> b/gcc/testsuite/g++.dg/ext/cleanup-8.C
> index ccf9bef..e99508d 100644
> --- a/gcc/testsuite/g++.dg/ext/cleanup-8.C
> +++ b/gcc/testsuite/g++.dg/ext/cleanup-8.C
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* Verify that cleanups work with exception handling through signal
>    frames. */
> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-9.C
> b/gcc/testsuite/g++.dg/ext/cleanup-9.C
> index dcdfcae..45e5f90 100644
> --- a/gcc/testsuite/g++.dg/ext/cleanup-9.C
> +++ b/gcc/testsuite/g++.dg/ext/cleanup-9.C
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* Verify that cleanups work with exception handling through realtime
>    signal frames. */
> diff --git a/gcc/testsuite/g++.dg/ext/sync-4.C
> b/gcc/testsuite/g++.dg/ext/sync-4.C
> index 8a2de48..029afb0 100644
> --- a/gcc/testsuite/g++.dg/ext/sync-4.C
> +++ b/gcc/testsuite/g++.dg/ext/sync-4.C
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* FIXME The following additional option should be removed after the
> fix for radr://19802258.
> Â /* { dg-xfail-run-if "PR60563 radr://19802258" { *-*-darwin* } } */
> Â /* { dg-require-effective-target sync_long_long_runtime } */
> diff --git a/gcc/testsuite/g++.dg/ipa/comdat.C
> b/gcc/testsuite/g++.dg/ipa/comdat.C
> index 1945e32..f3df99a 100644
> --- a/gcc/testsuite/g++.dg/ipa/comdat.C
> +++ b/gcc/testsuite/g++.dg/ipa/comdat.C
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-ipa-comdats"Â } */
> Â #include <stdio.h>
> Â __attribute__ ((noinline))
> diff --git a/gcc/testsuite/gcc.dg/20041106-1.c
> b/gcc/testsuite/gcc.dg/20041106-1.c
> index cba4a06..95579ff 100644
> --- a/gcc/testsuite/gcc.dg/20041106-1.c
> +++ b/gcc/testsuite/gcc.dg/20041106-1.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* *-*-uclinux*
> } } */
> Â /* { dg-options -O2 } */
>
> Â #include <sys/types.h>
> diff --git a/gcc/testsuite/gcc.dg/cleanup-10.c
> b/gcc/testsuite/gcc.dg/cleanup-10.c
> index 1af63ea..9fc8658 100644
> --- a/gcc/testsuite/gcc.dg/cleanup-10.c
> +++ b/gcc/testsuite/gcc.dg/cleanup-10.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* { dg-require-effective-target exceptions } */
> Â /* Verify that cleanups work with exception handling through signal
> frames
> diff --git a/gcc/testsuite/gcc.dg/cleanup-11.c
> b/gcc/testsuite/gcc.dg/cleanup-11.c
> index c1f19fe..6b499d4 100644
> --- a/gcc/testsuite/gcc.dg/cleanup-11.c
> +++ b/gcc/testsuite/gcc.dg/cleanup-11.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* { dg-require-effective-target exceptions } */
> Â /* Verify that cleanups work with exception handling through realtime
> signal
> diff --git a/gcc/testsuite/gcc.dg/cleanup-8.c
> b/gcc/testsuite/gcc.dg/cleanup-8.c
> index 45abdb2..87f4186 100644
> --- a/gcc/testsuite/gcc.dg/cleanup-8.c
> +++ b/gcc/testsuite/gcc.dg/cleanup-8.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* { dg-require-effective-target exceptions } */
> Â /* Verify that cleanups work with exception handling through signal
> diff --git a/gcc/testsuite/gcc.dg/cleanup-9.c
> b/gcc/testsuite/gcc.dg/cleanup-9.c
> index 98dc268..d34ce12 100644
> --- a/gcc/testsuite/gcc.dg/cleanup-9.c
> +++ b/gcc/testsuite/gcc.dg/cleanup-9.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* } } */
> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu*
> powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
> Â /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
> Â /* { dg-require-effective-target exceptions } */
> Â /* Verify that cleanups work with exception handling through realtime
> diff --git a/gcc/testsuite/gcc.dg/fdata-sections-1.c
> b/gcc/testsuite/gcc.dg/fdata-sections-1.c
> index 51686b9..e8a6639 100644
> --- a/gcc/testsuite/gcc.dg/fdata-sections-1.c
> +++ b/gcc/testsuite/gcc.dg/fdata-sections-1.c
> @@ -1,7 +1,7 @@
> Â /* PR middle-end/15486 */
> Â /* Origin: Jonathan Larmour <jifl-bugzilla@jifvik.org> */
>
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-fdata-sections" } */
>
> Â int x;
> diff --git a/gcc/testsuite/gcc.dg/fdata-sections-2.c
> b/gcc/testsuite/gcc.dg/fdata-sections-2.c
> index dda90ba7..48d44a2 100644
> --- a/gcc/testsuite/gcc.dg/fdata-sections-2.c
> +++ b/gcc/testsuite/gcc.dg/fdata-sections-2.c
> @@ -4,7 +4,7 @@
> Â /* This checks that string constants are put in per-function rodata
>    sections, so that they can be garbage collected. */
>
> -/* { dg-do compile { target *-*-linux* } } */
> +/* { dg-do compile { target *-*-linux* *-*-uclinux* } } */
> Â /* { dg-options "-O -ffunction-sections -fdata-sections" } */
>
> Â const char *f1(void) { return "falderalde"; }
> diff --git a/gcc/testsuite/gcc.dg/pr39323-1.c
> b/gcc/testsuite/gcc.dg/pr39323-1.c
> index 7a7fd63..d84009c 100644
> --- a/gcc/testsuite/gcc.dg/pr39323-1.c
> +++ b/gcc/testsuite/gcc.dg/pr39323-1.c
> @@ -1,5 +1,5 @@
> Â /* PR c/39323 - MAX_OFILE_ALIGNMENT in elfos.h is too big */
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>
> Â int foo __attribute__ ((aligned(1 << 29))) =Â 20; /* { dg-error
> "requested alignment" } */
> Â typedef int __attribute__ ((aligned(1 << 29))) int29; /* { dg-error
> "requested alignment" } */
> diff --git a/gcc/testsuite/gcc.dg/pr39323-2.c
> b/gcc/testsuite/gcc.dg/pr39323-2.c
> index a870729..6b6cb2e 100644
> --- a/gcc/testsuite/gcc.dg/pr39323-2.c
> +++ b/gcc/testsuite/gcc.dg/pr39323-2.c
> @@ -1,5 +1,5 @@
> Â /* PR c/39323 */
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>
> Â int bar __attribute__ ((aligned(1 << 28))) =Â 20;
>
> diff --git a/gcc/testsuite/gcc.dg/pr39323-3.c
> b/gcc/testsuite/gcc.dg/pr39323-3.c
> index b452d3c..2e2c1a2 100644
> --- a/gcc/testsuite/gcc.dg/pr39323-3.c
> +++ b/gcc/testsuite/gcc.dg/pr39323-3.c
> @@ -1,5 +1,5 @@
> Â /* PR c/39323 */
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>
> Â typedef int __attribute__ ((aligned(1 << 28))) int28;
> Â int28 foo = 20;
> diff --git a/gcc/testsuite/gcc.dg/pr65780-1.c
> b/gcc/testsuite/gcc.dg/pr65780-1.c
> index b586211..5e3226e 100644
> --- a/gcc/testsuite/gcc.dg/pr65780-1.c
> +++ b/gcc/testsuite/gcc.dg/pr65780-1.c
> @@ -1,5 +1,5 @@
> Â /* PR target/65780 */
> -/* { dg-do link { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2" } */
>
> Â int optopt;
> diff --git a/gcc/testsuite/gcc.dg/pr65780-2.c
> b/gcc/testsuite/gcc.dg/pr65780-2.c
> index bff3323..932cbe1 100644
> --- a/gcc/testsuite/gcc.dg/pr65780-2.c
> +++ b/gcc/testsuite/gcc.dg/pr65780-2.c
> @@ -1,5 +1,5 @@
> Â /* PR target/65780 */
> -/* { dg-do link { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-require-effective-target pie } */
> Â /* { dg-options "-O2 -fpie" } */
>
> diff --git a/gcc/testsuite/gcc.dg/pr67338.c
> b/gcc/testsuite/gcc.dg/pr67338.c
> index 0fdc302..7bfbef2 100644
> --- a/gcc/testsuite/gcc.dg/pr67338.c
> +++ b/gcc/testsuite/gcc.dg/pr67338.c
> @@ -1,4 +1,4 @@
> Â /* PR c/67338 */
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>
> Â struct S { __attribute__((aligned (1 << 28))) double a; };
> diff --git a/gcc/testsuite/gcc.dg/pr78185.c
> b/gcc/testsuite/gcc.dg/pr78185.c
> index 405f748..d7781b2 100644
> --- a/gcc/testsuite/gcc.dg/pr78185.c
> +++ b/gcc/testsuite/gcc.dg/pr78185.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O" } */
>
> Â #include <unistd.h>
> diff --git a/gcc/testsuite/gcc.dg/pr83100-1.c
> b/gcc/testsuite/gcc.dg/pr83100-1.c
> index 233c1f6..ccfb8c6 100644
> --- a/gcc/testsuite/gcc.dg/pr83100-1.c
> +++ b/gcc/testsuite/gcc.dg/pr83100-1.c
> @@ -1,5 +1,5 @@
> Â /* PR target/83100 */
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fcommon -fdata-sections" } */
>
> Â const int a;
> diff --git a/gcc/testsuite/gcc.dg/pr83100-4.c
> b/gcc/testsuite/gcc.dg/pr83100-4.c
> index bb26735..2f83247 100644
> --- a/gcc/testsuite/gcc.dg/pr83100-4.c
> +++ b/gcc/testsuite/gcc.dg/pr83100-4.c
> @@ -1,5 +1,5 @@
> Â /* PR target/83100 */
> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fno-common -fdata-sections" } */
>
> Â const int a;
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-12g.c
> b/gcc/testsuite/gcc.dg/strlenopt-12g.c
> index f1dec1f..fb0eeb2 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-12g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-12g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy function. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-14g.c
> b/gcc/testsuite/gcc.dg/strlenopt-14g.c
> index 62a83bf..8bce645 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-14g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-14g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy and mempcpy
> functions. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
> Â /* Bionic targets don't have mempcpy */
> Â /* { dg-require-effective-target non_bionic } */
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-14gf.c
> b/gcc/testsuite/gcc.dg/strlenopt-14gf.c
> index 8b126fc..cc9092b 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-14gf.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-14gf.c
> @@ -1,6 +1,6 @@
> Â /* This test needs runtime that provides stpcpy, mempcpy and __*_chk
>    functions. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
> Â /* Bionic targets don't have mempcpy */
> Â /* { dg-require-effective-target non_bionic } */
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-16g.c
> b/gcc/testsuite/gcc.dg/strlenopt-16g.c
> index 0cf8410..8b8f0d6 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-16g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-16g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy function. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-17g.c
> b/gcc/testsuite/gcc.dg/strlenopt-17g.c
> index 184e530..0d5f559 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-17g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-17g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy function. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-18g.c
> b/gcc/testsuite/gcc.dg/strlenopt-18g.c
> index f734675..e3706d2 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-18g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-18g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy function. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-1f.c
> b/gcc/testsuite/gcc.dg/strlenopt-1f.c
> index 856774d..bb320ab 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-1f.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-1f.c
> @@ -1,5 +1,5 @@
>  /* This test needs runtime that provides __*_chk functions. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinu* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define FORTIFY_SOURCE 2
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-22g.c
> b/gcc/testsuite/gcc.dg/strlenopt-22g.c
> index 9c5d020..348903f 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-22g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-22g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy function. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-2f.c
> b/gcc/testsuite/gcc.dg/strlenopt-2f.c
> index 1e915da..f61a8ba 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-2f.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-2f.c
> @@ -1,5 +1,5 @@
>  /* This test needs runtime that provides __*_chk functions. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define FORTIFY_SOURCE 2
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-31g.c
> b/gcc/testsuite/gcc.dg/strlenopt-31g.c
> index 45cc29c..3588b06 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-31g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-31g.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-33g.c
> b/gcc/testsuite/gcc.dg/strlenopt-33g.c
> index 7d24d2b..8566782 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-33g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-33g.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-4g.c
> b/gcc/testsuite/gcc.dg/strlenopt-4g.c
> index 879d566..c6a2d6f 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-4g.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-4g.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy function. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strlenopt-4gf.c
> b/gcc/testsuite/gcc.dg/strlenopt-4gf.c
> index 7f261b7..2783c3b 100644
> --- a/gcc/testsuite/gcc.dg/strlenopt-4gf.c
> +++ b/gcc/testsuite/gcc.dg/strlenopt-4gf.c
> @@ -1,5 +1,5 @@
> Â /* This test needs runtime that provides stpcpy and __*_chk
> functions. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2 -fdump-tree-strlen" } */
>
> Â #define USE_GNU
> diff --git a/gcc/testsuite/gcc.dg/strncmp-2.c
> b/gcc/testsuite/gcc.dg/strncmp-2.c
> index f5555ba..6818b30 100644
> --- a/gcc/testsuite/gcc.dg/strncmp-2.c
> +++ b/gcc/testsuite/gcc.dg/strncmp-2.c
> @@ -1,5 +1,5 @@
> Â /* Test strncmp builtin expansion for compilation and proper
> execution. */
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-options "-O2" } */
> Â /* { dg-require-effective-target ptr32plus } */
>
> diff --git a/gcc/testsuite/gcc.dg/struct-ret-3.c
> b/gcc/testsuite/gcc.dg/struct-ret-3.c
> index 4083bb4..4c0a0e6 100644
> --- a/gcc/testsuite/gcc.dg/struct-ret-3.c
> +++ b/gcc/testsuite/gcc.dg/struct-ret-3.c
> @@ -1,7 +1,7 @@
> Â /* PR middle-end/31309 */
> Â /* Origin: Peeter Joot <peeterj@ca.ibm.com> */
>
> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
> Â /* { dg-add-options stack_size } */
>
> Â #include <sys/mman.h>
> diff --git a/gcc/testsuite/gcc.dg/torture/pr69760.c
> b/gcc/testsuite/gcc.dg/torture/pr69760.c
> index 8f24608..53733c7 100644
> --- a/gcc/testsuite/gcc.dg/torture/pr69760.c
> +++ b/gcc/testsuite/gcc.dg/torture/pr69760.c
> @@ -1,5 +1,5 @@
> Â /* PR tree-optimization/69760 */
> -/* { dg-do run { target { { *-*-linux* *-*-gnu* } && mmap } } } */
> +/* { dg-do run { target { { *-*-linux* *-*-gnu* *-*-uclinux* } &&
> mmap } } } */
> Â /* { dg-options "-O2" } */
>
> Â #include <unistd.h>
> diff --git a/gcc/testsuite/gcc.target/arm/div64-unwinding.c
> b/gcc/testsuite/gcc.target/arm/div64-unwinding.c
> index 7f112ee..0944281 100644
> --- a/gcc/testsuite/gcc.target/arm/div64-unwinding.c
> +++ b/gcc/testsuite/gcc.target/arm/div64-unwinding.c
> @@ -1,6 +1,6 @@
>  /* Performing a 64-bit division should not pull in the unwinder. */
>
> -/* { dg-do run { target { ! *-*-linux* } } } */
> +/* { dg-do run { target { { ! *-*-linux* } && { ! *-*-uclinux* } } } } */
> Â /* { dg-options "-O0" } */
>
> Â #include <stdlib.h>
> diff --git a/gcc/testsuite/gcc.target/arm/pr66912.c
> b/gcc/testsuite/gcc.target/arm/pr66912.c
> index 27e4c45..7e6294c 100644
> --- a/gcc/testsuite/gcc.target/arm/pr66912.c
> +++ b/gcc/testsuite/gcc.target/arm/pr66912.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target *-*-linux* } } */
> +/* { dg-do compile { target *-*-linux* arm*-*-uclinuxfdpiceabi } } */
> Â /* { dg-options "-O2 -fpic" } */
>
> Â __attribute__((visibility("protected")))
> diff --git a/gcc/testsuite/gcc.target/arm/stack-checking.c
> b/gcc/testsuite/gcc.target/arm/stack-checking.c
> index 4b53bed..9d1d2b0 100644
> --- a/gcc/testsuite/gcc.target/arm/stack-checking.c
> +++ b/gcc/testsuite/gcc.target/arm/stack-checking.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target { *-*-linux* } } } */
> +/* { dg-do run { target { *-*-linux* *-*-uclinux* } } } */
> Â /* { dg-require-stack-check "" } */
> Â /* { dg-options "-fstack-check" } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/synchronize.c
> b/gcc/testsuite/gcc.target/arm/synchronize.c
> index 7ef10e2..912f407 100644
> --- a/gcc/testsuite/gcc.target/arm/synchronize.c
> +++ b/gcc/testsuite/gcc.target/arm/synchronize.c
> @@ -1,4 +1,4 @@
> -/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target
> arm*-*-linux-* } } } */
> +/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target
> arm*-*-linux-* arm*-*-uclinux* } } } */
>
> Â void *foo (void)
> Â {
> diff --git a/gcc/testsuite/lib/target-supports.exp
> b/gcc/testsuite/lib/target-supports.exp
> index 4bb7da2..60d68f4 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -1189,6 +1189,7 @@ proc check_effective_target_pie { } {
> Â Â Â Â Â Â Â Â Â || [istarget *-*-dragonfly*]
> Â Â Â Â Â Â Â Â Â || [istarget *-*-freebsd*]
> Â Â Â Â Â Â Â Â Â || [istarget *-*-linux*]
> +Â Â Â Â Â Â Â || [istarget arm*-*-uclinuxfdpiceabi]
> Â Â Â Â Â Â Â Â Â || [istarget *-*-gnu*]
> Â Â Â Â Â Â Â Â Â || [istarget *-*-amdhsa]} {
> Â Â Â Â Â Â Â Â return 1;
> @@ -6752,6 +6753,7 @@ proc
> check_effective_target_sync_long_long_runtime { } {
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â } ""
> Â Â Â Â Â Â Â Â Â Â }])
> Â Â Â Â Â Â Â Â Â || [istarget aarch64*-*-*]
> +Â Â Â Â Â Â Â || [istarget arm*-*-uclinuxfdpiceabi]
> Â Â Â Â Â Â Â Â Â || ([istarget arm*-*-linux-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â && [check_runtime sync_longlong_runtime {
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #include <stdlib.h>
> @@ -6812,6 +6814,7 @@ proc check_effective_target_sync_int_long { } {
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget aarch64*-*-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget alpha*-*-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget arm*-*-linux-*]
> +Â Â Â Â Â Â Â Â Â Â Â || [istarget arm*-*-uclinuxfdpiceabi]
> Â Â Â Â Â Â Â Â Â Â Â Â Â || ([istarget arm*-*-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && [check_effective_target_arm_acq_rel])
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget bfin*-*linux*]
> @@ -6836,6 +6839,7 @@ proc check_effective_target_sync_char_short { } {
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget i?86-*-*] || [istarget x86_64-*-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget alpha*-*-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget arm*-*-linux-*]
> +Â Â Â Â Â Â Â Â Â Â Â || [istarget arm*-*-uclinuxfdpiceabi]
> Â Â Â Â Â Â Â Â Â Â Â Â Â || ([istarget arm*-*-*]
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && [check_effective_target_arm_acq_rel])
> Â Â Â Â Â Â Â Â Â Â Â Â Â || [istarget hppa*-*linux*]
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
2019-05-15 12:46 ` [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets Christophe Lyon
@ 2019-07-19 8:59 ` Kyrill Tkachov
2019-07-22 19:50 ` Mike Stump
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 8:59 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches; +Cc: ro, mikestump
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Some tests have the "nonpic" guard, but pass on
> arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
> than adding this target to all these tests, add the "pie_enabled"
> effective target.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> Â Â Â Â Â Â Â gcc/testsuite/
> Â Â Â Â Â Â Â * g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
> Â Â Â Â Â Â Â * g++.dg/ipa/devirt-c-7.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-1.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-2.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-3.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-4.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-5.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-7.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-8.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/ipa/ivinline-9.C: Likewise.
> Â Â Â Â Â Â Â * g++.dg/tls/pr79288.C: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/addr_equal-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/const-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/ipa/pure-const-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/noreturn-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/pr33826.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/torture/ipa-pta-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/tree-ssa/alias-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/tree-ssa/loadpre6.c: Likewise.
> Â Â Â Â Â Â Â * gcc.dg/uninit-19.c: Likewise.
>
Looks sensible, but this is not an arm-specific patch.
CC'ing testsuite maintainers.
Thanks,
Kyrill
> Change-Id: I1a0d836b892c23891f739fccdc467d0f354ab82c
>
> diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
> b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
> index 2d37867..906a44d 100644
> --- a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
> +++ b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
> @@ -1,6 +1,6 @@
> Â // Runtime test for noexcept-specification.
> Â // { dg-options "-Wnoexcept" }
> -// { dg-do run { target nonpic } }
> +// { dg-do run { target { nonpic || pie_enabled } } }
> Â // { dg-require-effective-target c++11 }
>
> Â #include <exception>
> diff --git a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
> b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
> index 2e76cbe..efb65c2 100644
> --- a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
> +++ b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
> @@ -1,7 +1,6 @@
> Â /* Verify that ipa-cp will not get confused by placement new
> constructing an
>    object within another one when looking for dynamic type change . */
> -/* { dg-do run } */
> -/* { dg-require-effective-target nonpic } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -Wno-attributes"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-1.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
> index 9b10d20..2d988bc 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-1.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
> @@ -1,6 +1,6 @@
> Â /* Verify that simple virtual calls are inlined even without early
>    inlining. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-2.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
> index 21cd46f..d978638 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-2.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
> @@ -1,6 +1,6 @@
> Â /* Verify that simple virtual calls using this pointer are inlined
>    even without early inlining.. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-3.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
> index 1e24644..f756a16 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-3.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
> @@ -1,6 +1,6 @@
> Â /* Verify that simple virtual calls on an object refrence are inlined
>    even without early inlining. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-4.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
> index cf0d980..5fbd3ef 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-4.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
> @@ -1,7 +1,7 @@
> Â /* Verify that simple virtual calls are inlined even without early
> Â Â Â inlining, even when a typecast to an ancestor is involved along the
>    way. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-5.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
> index f15ebf2..6c19907 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-5.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
> @@ -1,6 +1,6 @@
> Â /* Verify that virtual call inlining does not pick a wrong method when
>    there is a user defined ancestor in an object. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-7.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-7.C
> index a7b41e7..fd6aba6 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-7.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-7.C
> @@ -1,7 +1,7 @@
> Â /* Verify that simple virtual calls are inlined even without early
> Â Â Â inlining, even when a typecast to an ancestor is involved along the
>    way and that ancestor is not the first one with virtual functions. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-8.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-8.C
> index 5c3299f..bc81abf 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-8.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-8.C
> @@ -1,6 +1,6 @@
> Â /* Verify that virtual calls are inlined (ithout early inlining) even
>    when their caller is itself indirectly inlined. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-9.C
> b/gcc/testsuite/g++.dg/ipa/ivinline-9.C
> index 41b2381..0917f15 100644
> --- a/gcc/testsuite/g++.dg/ipa/ivinline-9.C
> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-9.C
> @@ -2,7 +2,7 @@
> Â Â Â inlining, even when a typecast to an ancestor is involved along the
> Â Â Â way and that ancestor itself has an ancestor wich is not the
>    primary base class. */
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining
> -fno-ipa-cp"Â } */
>
> Â extern "C" void abort (void);
> diff --git a/gcc/testsuite/g++.dg/tls/pr79288.C
> b/gcc/testsuite/g++.dg/tls/pr79288.C
> index 9f488df..da6751f 100644
> --- a/gcc/testsuite/g++.dg/tls/pr79288.C
> +++ b/gcc/testsuite/g++.dg/tls/pr79288.C
> @@ -1,5 +1,5 @@
> Â // PR c++/79288
> -// { dg-do compile { target nonpic } }
> +// { dg-do compile { target { nonpic || pie_enabled } } }
> Â // { dg-require-effective-target tls }
> Â // { dg-options "-O2" }
> Â // { dg-final { scan-assembler-not "@tpoff" { target i?86-*-*
> x86_64-*-* } } }
> diff --git a/gcc/testsuite/gcc.dg/addr_equal-1.c
> b/gcc/testsuite/gcc.dg/addr_equal-1.c
> index 18b0dc9..35fa010 100644
> --- a/gcc/testsuite/gcc.dg/addr_equal-1.c
> +++ b/gcc/testsuite/gcc.dg/addr_equal-1.c
> @@ -1,5 +1,4 @@
> -/* { dg-do run } */
> -/* { dg-require-effective-target nonpic } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-require-weak "" } */
> Â /* { dg-require-alias "" } */
> Â /* { dg-options "-O2 -fdelete-null-pointer-checks" } */
> diff --git a/gcc/testsuite/gcc.dg/const-1.c
> b/gcc/testsuite/gcc.dg/const-1.c
> index a5b2b16..aa20aad 100644
> --- a/gcc/testsuite/gcc.dg/const-1.c
> +++ b/gcc/testsuite/gcc.dg/const-1.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target nonpic } } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O2 -Wsuggest-attribute=const" } */
>
> Â extern int extern_const(int a) __attribute__ ((const));
> diff --git a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
> b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
> index 06b415e..dd58457 100644
> --- a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
> +++ b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target nonpic } } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-tree-local-pure-const1
> -fdump-ipa-pure-const -fdump-tree-optimized -fno-early-inlining
> -fgnu89-inline" } */
> Â void abort (void);
> Â int error_code;
> diff --git a/gcc/testsuite/gcc.dg/noreturn-8.c
> b/gcc/testsuite/gcc.dg/noreturn-8.c
> index 294800b..ce41cab 100644
> --- a/gcc/testsuite/gcc.dg/noreturn-8.c
> +++ b/gcc/testsuite/gcc.dg/noreturn-8.c
> @@ -1,4 +1,4 @@
> -/* { dg-do run { target nonpic } } */
> +/* { dg-do run { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O2" } */
> Â void exit (int);
> Â void noreturn_autodetection_failed ();
> diff --git a/gcc/testsuite/gcc.dg/pr33826.c
> b/gcc/testsuite/gcc.dg/pr33826.c
> index df83915..d222774 100644
> --- a/gcc/testsuite/gcc.dg/pr33826.c
> +++ b/gcc/testsuite/gcc.dg/pr33826.c
> @@ -1,8 +1,7 @@
> Â /* Regression test for PR middle-end/33826 */
>  /* Verify that recursive functions cannot be pure or const. */
>
> -/* { dg-do compile } */
> -/* { dg-require-effective-target nonpic } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O1 -fdump-tree-local-pure-const1
> -fdump-ipa-pure-const" } */
>
> Â int recurse1 (int);
> diff --git a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
> b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
> index 1bf4997..30156a3 100644
> --- a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
> +++ b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { nonpic } } } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-fipa-pta -fdump-ipa-pta2 -fno-ipa-icf" } */
> Â /* { dg-skip-if "" { *-*-* } { "-O0" "-fno-fat-lto-objects" } { "" } } */
>
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
> b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
> index e10a25d..f9d2dd4 100644
> --- a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { nonpic } } } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O2 -fdump-tree-optimized" } */
> Â static int a;
> Â int f;
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
> b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
> index 2d713d6..3b5a94f 100644
> --- a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target nonpic } } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O3 -fdump-tree-fnsplit -fdump-tree-optimized
> --param=builtin-expect-probability=100" } */
>
> Â struct a {int a,b;};
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
> b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
> index 028becd..b4e9296 100644
> --- a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target nonpic } } */
> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
> Â /* { dg-options "-O2 -fdump-tree-pre-stats -fdump-tree-fre1" } */
> Â #include <stddef.h>
>
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 19/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
2019-05-15 12:46 ` [ARM/FDPIC v5 19/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc Christophe Lyon
@ 2019-07-19 9:00 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 9:00 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> uclibc defines bswap_32, so use a different name in this test.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> Â Â Â Â Â Â Â gcc/testsuite/
> Â Â Â Â Â Â Â * gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32.
>
Ok.
This can go in independently of the others.
Thanks,
Kyrill
> Change-Id: I2591bd911030814331cabf97ee5cf6cf8124b4f3
>
> diff --git a/gcc/testsuite/gcc.target/arm/pr43698.c
> b/gcc/testsuite/gcc.target/arm/pr43698.c
> index 1fc497c..3b5dad0 100644
> --- a/gcc/testsuite/gcc.target/arm/pr43698.c
> +++ b/gcc/testsuite/gcc.target/arm/pr43698.c
> @@ -6,7 +6,7 @@
>
> Â char do_reverse_endian = 0;
>
> -#Â define bswap_32(x) \
> +#Â define my_bswap_32(x) \
> Â Â ((((x) & 0xff000000) >> 24) | \
> Â Â Â (((x) & 0x00ff0000) >>Â 8) | \
> Â Â Â (((x) & 0x0000ff00) <<Â 8) | \
> @@ -16,7 +16,7 @@ char do_reverse_endian = 0;
> Â Â (__extension__ ({ \
> Â Â Â Â Â Â uint64_t __res; \
> Â Â Â Â Â Â if (!do_reverse_endian) {Â Â Â __res = (X); \
> -Â Â Â Â Â } else if (sizeof(X) == 4) { __res = bswap_32((X)); \
> +Â Â Â Â Â } else if (sizeof(X) == 4) { __res = my_bswap_32((X)); \
> Â Â Â Â Â Â } \
> Â Â Â Â Â Â __res; \
> Â Â Â Â }))
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-05-15 12:47 ` [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC Christophe Lyon
@ 2019-07-19 9:03 ` Kyrill Tkachov
2019-09-06 8:01 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 9:03 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Since FDPIC currently supports arm and thumb-2 modes only, these tests
> fail because they enforce an architecture version that doesn't match
> these restrictions.
>
> This patch introduces new values for the arm_arch effective-target
> (v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
> needed, and adds them to the relevant tests. It also adds the
> corresponding non-thumb effective-target to the tests that were
> missing it.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> Â Â Â Â Â Â Â * lib/target-supports.exp
> Â Â Â Â Â Â Â (check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
> Â Â Â Â Â Â Â v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
> Â Â Â Â Â Â Â * gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
> Â Â Â Â Â Â Â effective-target.
> Â Â Â Â Â Â Â * gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/attr_arm-err.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv4-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv4t-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv5t-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv5te-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6k-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6z-arm.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/g2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/macro_defs1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr59858.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr65647-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr79058.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pr83712.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/pragma_arch_switch_2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/scd42-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/scd42-2.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/scd42-3.c: Likewise.
> Â Â Â Â Â Â Â * gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
>
Ok.
This looks like a good improvement on its own.
Thanks,
Kyrill
> Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
>
> diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> index d144b70..4e695cd 100644
> --- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> +++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> @@ -1,4 +1,4 @@
> -/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target
> arm*-*-* } } */
> Â /* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } {
> "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
> Â /* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" {
> target arm*-*-* } } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> index 88528f1..886a012 100644
> --- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> +++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6k" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> Â /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
> Â /* { dg-add-options arm_arch_v6k } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> index e1ed1c1..2eeb522 100644
> --- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> @@ -2,6 +2,7 @@
>    Verify that unaligned_access is correctly with attribute target. */
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6" } } */
> +/* { dg-require-effective-target arm_arch_v6_ok } */
> Â /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
> Â /* { dg-add-options arm_arch_v6 } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> index 630c06a..d410056 100644
> --- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> +++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> @@ -2,6 +2,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-require-effective-target arm_arm_ok } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6-m" } } */
> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> Â /* { dg-add-options arm_arch_v6m } */
>
> Â int __attribute__((target("arm")))
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> index 4b48ef8..447a8ec 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv4" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v4_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v4 } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> index 016506f..05db533 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv4t" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v4t_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v4t } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> index 9ef944e..78878f7 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv4t" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v4t } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> index a9403e9..bea25d09 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv5t" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v5t_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v5t } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> index f3ad07e..b25d17d 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv5t" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v5t } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> index f98c01a..7b37c7f 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv5te" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v5te } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> index 5d71787..27a64a2 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv5te" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v5te } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> index 88a5089..bfab765 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v6 } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> index 90ef9d2..15a6d75 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v6 } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> index 8de021a..721c9f9 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6k" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6k_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v6k } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> index c2fc270..b3b6ecf 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6k" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v6k } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> index ee075e2..27f71be 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6-m" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v6m } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> index 83b4bc4..259d2b5 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6t2" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v6t2 } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> index 1a1cbc5..e624ec5 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6t2" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v6t2 } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> index e2df0d4..66380bf 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6z" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6z_ok } */
> Â /* { dg-options "-marm" } */
> Â /* { dg-add-options arm_arch_v6z } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> index e4b94ef..23a4fcd 100644
> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6z" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
> Â /* { dg-options "-mthumb" } */
> Â /* { dg-add-options arm_arch_v6z } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/g2.c
> b/gcc/testsuite/gcc.target/arm/g2.c
> index e368017..da68c8b 100644
> --- a/gcc/testsuite/gcc.target/arm/g2.c
> +++ b/gcc/testsuite/gcc.target/arm/g2.c
> @@ -4,6 +4,7 @@
> Â /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> "-march=*" } { "-march=xscale" } } */
> Â /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> "-mcpu=*" } { "-mcpu=xscale" } } */
> Â /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> "-mthumb" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-require-effective-target arm32 } */
>
> Â /* Brett Gaines' test case. */
> diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> index 4cc9ae6..655ba93 100644
> --- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> +++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-march=*" } { "-march=armv6-m" } } */
> Â /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> "-marm" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> Â /* { dg-options "-march=armv6-m -mthumb" } */
>
> Â #ifdef __ARM_NEON_FP
> diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c
> b/gcc/testsuite/gcc.target/arm/pr59858.c
> index a944b9a..bcfd5d5 100644
> --- a/gcc/testsuite/gcc.target/arm/pr59858.c
> +++ b/gcc/testsuite/gcc.target/arm/pr59858.c
> @@ -1,6 +1,7 @@
> Â /* { dg-do compile } */
> Â /* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb
> -fno-stack-protector -Os -fno-tree-loop-optimize
> -fno-tree-dominator-opts -fPIC -w" } */
> Â /* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft
> -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
>
> Â typedef enum {
> Â REG_ENOSYS = -1,
> diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> index f2985f8..3d9e75f 100644
> --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> +++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> @@ -1,4 +1,5 @@
> Â /* { dg-do compile } */
> +/* { dg-require-effective-target arm_arch_v6_ok } */
> Â /* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
>
> Â typedef struct {
> diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c
> b/gcc/testsuite/gcc.target/arm/pr79058.c
> index 54a1d8a..7d078ac 100644
> --- a/gcc/testsuite/gcc.target/arm/pr79058.c
> +++ b/gcc/testsuite/gcc.target/arm/pr79058.c
> @@ -1,5 +1,6 @@
> Â /* { dg-do compile } */
> Â /* { dg-require-effective-target arm_arm_ok } */
> +/* { dg-require-effective-target arm_arch_v4_ok } */
> Â /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } {
> "-mcpu=arm7tdmi" } } */
> Â /* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
>
> diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c
> b/gcc/testsuite/gcc.target/arm/pr83712.c
> index 8ed8cdf..4902ec9 100644
> --- a/gcc/testsuite/gcc.target/arm/pr83712.c
> +++ b/gcc/testsuite/gcc.target/arm/pr83712.c
> @@ -1,4 +1,5 @@
> Â /* { dg-do compile } */
> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> Â /* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" }Â */
> Â #pragma GCC optimize ("-O2")
>
> diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> index b6211f9..c3361e7 100644
> --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> @@ -2,6 +2,7 @@
> Â /* { dg-skip-if "instruction not valid on thumb" { *-*-* } {
> "-mthumb" } { "" } } */
> Â /* { dg-do assemble } */
> Â /* { dg-require-effective-target arm_arm_ok } */
> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99
> -marm" } */
>
> Â #pragma GCC target ("arch=armv6")
> diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c
> b/gcc/testsuite/gcc.target/arm/scd42-1.c
> index be60e64..2b8fc0b 100644
> --- a/gcc/testsuite/gcc.target/arm/scd42-1.c
> +++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
> @@ -3,6 +3,7 @@
> Â /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> "-march=*" } { "-march=xscale" } } */
> Â /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> } { "-mcpu=xscale" } } */
> Â /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
>
> Â unsigned load1(void) __attribute__ ((naked));
> diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c
> b/gcc/testsuite/gcc.target/arm/scd42-2.c
> index 6d9e5e1..4181a75 100644
> --- a/gcc/testsuite/gcc.target/arm/scd42-2.c
> +++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
> @@ -4,6 +4,7 @@
> Â /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> "-mcpu=*" } { "-mcpu=xscale" } } */
> Â /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> "-mthumb" } { "" } } */
> Â /* { dg-require-effective-target arm32 } */
> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-options "-mcpu=xscale -O -marm" } */
>
> Â unsigned load2(void) __attribute__ ((naked));
> diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c
> b/gcc/testsuite/gcc.target/arm/scd42-3.c
> index e566cb2..0afd121 100644
> --- a/gcc/testsuite/gcc.target/arm/scd42-3.c
> +++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
> @@ -3,6 +3,7 @@
> Â /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> "-march=*" } { "-march=xscale" } } */
> Â /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> } { "-mcpu=xscale" } } */
> Â /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> Â /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
>
> Â unsigned load4(void) __attribute__ ((naked));
> diff --git a/gcc/testsuite/lib/target-supports.exp
> b/gcc/testsuite/lib/target-supports.exp
> index 60d68f4..3f091c5 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
> Â foreach { armfunc armflag armdefs } {
> Â Â Â Â Â Â Â Â v4 "-march=armv4 -marm" __ARM_ARCH_4__
> Â Â Â Â Â Â Â Â v4t "-march=armv4t" __ARM_ARCH_4T__
> +Â Â Â Â Â Â v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
> Â Â Â Â Â Â Â Â v5t "-march=armv5t" __ARM_ARCH_5T__
> +Â Â Â Â Â Â v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
> Â Â Â Â Â Â Â Â v5te "-march=armv5te" __ARM_ARCH_5TE__
> +Â Â Â Â Â Â v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
> Â Â Â Â Â Â Â Â v6 "-march=armv6" __ARM_ARCH_6__
> +Â Â Â Â Â Â v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
> Â Â Â Â Â Â Â Â v6k "-march=armv6k" __ARM_ARCH_6K__
> +Â Â Â Â Â Â v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> Â Â Â Â Â Â Â Â v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
> Â Â Â Â Â Â Â Â v6z "-march=armv6z" __ARM_ARCH_6Z__
> +Â Â Â Â Â Â v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
> Â Â Â Â Â Â Â Â v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
> Â Â Â Â Â Â Â Â v7a "-march=armv7-a" __ARM_ARCH_7A__
> Â Â Â Â Â Â Â Â v7r "-march=armv7-r" __ARM_ARCH_7R__
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns
2019-05-15 12:47 ` [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns Christophe Lyon
@ 2019-07-19 9:40 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-07-19 9:40 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> The recent stack_protect_combined_set_insn and
> stack_protect_combined_test_insn force recomputing of GOT base, but
> need to take into account that in FDPIC mode, the PIC register is
> fixed by the ABI (r9).
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> Â Â Â Â Â Â Â * config/arm/arm.md (stack_protect_combined_set_insn): Handle
> Â Â Â Â Â Â Â FDPIC mode.
> Â Â Â Â Â Â Â (stack_protect_combined_test_insn): Likewise.
>
> Change-Id: Ib243fab0791fc883ca7b1c1205af1e0893f3e8c5
>
> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
> index 0edcb1d..5a4dd00 100644
> --- a/gcc/config/arm/arm.md
> +++ b/gcc/config/arm/arm.md
> @@ -8869,8 +8869,19 @@
> Â {
> Â Â if (flag_pic)
> Â Â Â Â {
> +Â Â Â Â Â rtx pic_reg;
> +
> +Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +Â Â Â Â Â Â }
> +Â Â Â Â Â else
> +Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â pic_reg = operands[3];
> +Â Â Â Â Â Â }
Redundant braces here...
> +
>       /* Forces recomputing of GOT base now. */
> -Â Â Â Â Â legitimize_pic_address (operands[1], SImode, operands[2],
> operands[3],
> +Â Â Â Â Â legitimize_pic_address (operands[1], SImode, operands[2], pic_reg,
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â true /*compute_now*/);
> Â Â Â Â }
> Â Â else
> @@ -8943,8 +8954,19 @@
>
> Â Â if (flag_pic)
> Â Â Â Â {
> +Â Â Â Â Â rtx pic_reg;
> +
> +Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +Â Â Â Â Â Â Â }
> +Â Â Â Â Â else
> +Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â pic_reg = operands[4];
> +Â Â Â Â Â Â }
> +
... and here.
Ok with that fixed.
Thanks,
Kyrill
>       /* Forces recomputing of GOT base now. */
> -Â Â Â Â Â legitimize_pic_address (operands[1], SImode, operands[3],
> operands[4],
> +Â Â Â Â Â legitimize_pic_address (operands[1], SImode, operands[3], pic_reg,
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â true /*compute_now*/);
> Â Â Â Â }
> Â Â else
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux*
2019-07-19 8:57 ` Kyrill Tkachov
@ 2019-07-22 19:37 ` Mike Stump
0 siblings, 0 replies; 109+ messages in thread
From: Mike Stump @ 2019-07-22 19:37 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches, ro
On Jul 19, 2019, at 1:56 AM, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
>
> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>> Add *-*-uclinux* to tests that work on this target.
>>
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>
>> gcc/testsuite/
>> * g++.dg/abi/forced.C: Add *-*-uclinux*.
>> * g++.dg/abi/guard2.C: Likewise.
>> * g++.dg/ext/cleanup-10.C: Likewise.
>> * g++.dg/ext/cleanup-11.C: Likewise.
>> * g++.dg/ext/cleanup-8.C: Likewise.
>> * g++.dg/ext/cleanup-9.C: Likewise.
>> * g++.dg/ext/sync-4.C: Likewise.
>> * g++.dg/ipa/comdat.C: Likewise.
>> * gcc.dg/20041106-1.c: Likewise.
>> * gcc.dg/cleanup-10.c: Likewise.
>> * gcc.dg/cleanup-11.c: Likewise.
>> * gcc.dg/cleanup-8.c: Likewise.
>> * gcc.dg/cleanup-9.c: Likewise.
>> * gcc.dg/fdata-sections-1.c: Likewise.
>> * gcc.dg/fdata-sections-2.c: Likewise.
>> * gcc.dg/pr39323-1.c: Likewise.
>> * gcc.dg/pr39323-2.c: Likewise.
>> * gcc.dg/pr39323-3.c: Likewise.
>> * gcc.dg/pr65780-1.c: Likewise.
>> * gcc.dg/pr65780-2.c: Likewise.
>> * gcc.dg/pr67338.c: Likewise.
>> * gcc.dg/pr78185.c: Likewise.
>> * gcc.dg/pr83100-1.c: Likewise.
>> * gcc.dg/pr83100-4.c: Likewise.
>> * gcc.dg/strlenopt-12g.c: Likewise.
>> * gcc.dg/strlenopt-14g.c: Likewise.
>> * gcc.dg/strlenopt-14gf.c: Likewise.
>> * gcc.dg/strlenopt-16g.c: Likewise.
>> * gcc.dg/strlenopt-17g.c: Likewise.
>> * gcc.dg/strlenopt-18g.c: Likewise.
>> * gcc.dg/strlenopt-1f.c: Likewise.
>> * gcc.dg/strlenopt-22g.c: Likewise.
>> * gcc.dg/strlenopt-2f.c: Likewise.
>> * gcc.dg/strlenopt-31g.c: Likewise.
>> * gcc.dg/strlenopt-33g.c: Likewise.
>> * gcc.dg/strlenopt-4g.c: Likewise.
>> * gcc.dg/strlenopt-4gf.c: Likewise.
>> * gcc.dg/strncmp-2.c: Likewise.
>> * gcc.dg/struct-ret-3.c: Likewise.
>> * gcc.dg/torture/pr69760.c: Likewise.
>> * gcc.target/arm/div64-unwinding.c: Likewise.
>> * gcc.target/arm/stack-checking.c: Likewise.
>> * gcc.target/arm/synchronize.c: Likewise.
>> * gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
>> * lib/target-supports.exp (check_effective_target_pie): Likewise.
>> (check_effective_target_sync_long_long_runtime): Likewise.
>> (check_effective_target_sync_int_long): Likewise.
>> (check_effective_target_sync_char_short): Likewise.
>>
> I think these are ok, but you're changing many generic test targets.
>
> Are the testsuite maintainers ok with this change?
Yes. The patch is approved.
I looked them all over, they look fine. For these sorts of target changes, the target maintainers can just approve the usual and customary changes to the test suite. People can always ask for review for any reason they want, but as people skill up on usual and customary, the target maintains usually do a good job in this area. This patch to me seems usual and customary.
>> Change-Id: I89bfea79d4490c5df0b6470def5a31d7f31ac2cc
>>
>> diff --git a/gcc/testsuite/g++.dg/abi/forced.C b/gcc/testsuite/g++.dg/abi/forced.C
>> index 0e6be28..2d1ec53 100644
>> --- a/gcc/testsuite/g++.dg/abi/forced.C
>> +++ b/gcc/testsuite/g++.dg/abi/forced.C
>> @@ -1,4 +1,4 @@
>> -// { dg-do run { target *-*-linux* *-*-gnu* } }
>> +// { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } }
>> // { dg-options "-pthread" }
>>
>> #include <pthread.h>
>> diff --git a/gcc/testsuite/g++.dg/abi/guard2.C b/gcc/testsuite/g++.dg/abi/guard2.C
>> index c35fa7e..74139a8 100644
>> --- a/gcc/testsuite/g++.dg/abi/guard2.C
>> +++ b/gcc/testsuite/g++.dg/abi/guard2.C
>> @@ -1,6 +1,6 @@
>> // PR c++/41611
>> // Test that the guard gets its own COMDAT group.
>> -// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* } } }
>> +// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* *-*-uclinux* } } }
>>
>> struct A {
>> static int f()
>> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-10.C b/gcc/testsuite/g++.dg/ext/cleanup-10.C
>> index 66c7b76..56aeb66 100644
>> --- a/gcc/testsuite/g++.dg/ext/cleanup-10.C
>> +++ b/gcc/testsuite/g++.dg/ext/cleanup-10.C
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* Verify that cleanups work with exception handling through signal frames
>> on alternate stack. */
>> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-11.C b/gcc/testsuite/g++.dg/ext/cleanup-11.C
>> index 6e96521..c6d3560 100644
>> --- a/gcc/testsuite/g++.dg/ext/cleanup-11.C
>> +++ b/gcc/testsuite/g++.dg/ext/cleanup-11.C
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* Verify that cleanups work with exception handling through realtime signal
>> frames on alternate stack. */
>> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-8.C b/gcc/testsuite/g++.dg/ext/cleanup-8.C
>> index ccf9bef..e99508d 100644
>> --- a/gcc/testsuite/g++.dg/ext/cleanup-8.C
>> +++ b/gcc/testsuite/g++.dg/ext/cleanup-8.C
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* Verify that cleanups work with exception handling through signal
>> frames. */
>> diff --git a/gcc/testsuite/g++.dg/ext/cleanup-9.C b/gcc/testsuite/g++.dg/ext/cleanup-9.C
>> index dcdfcae..45e5f90 100644
>> --- a/gcc/testsuite/g++.dg/ext/cleanup-9.C
>> +++ b/gcc/testsuite/g++.dg/ext/cleanup-9.C
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* Verify that cleanups work with exception handling through realtime
>> signal frames. */
>> diff --git a/gcc/testsuite/g++.dg/ext/sync-4.C b/gcc/testsuite/g++.dg/ext/sync-4.C
>> index 8a2de48..029afb0 100644
>> --- a/gcc/testsuite/g++.dg/ext/sync-4.C
>> +++ b/gcc/testsuite/g++.dg/ext/sync-4.C
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* FIXME The following additional option should be removed after the fix for radr://19802258.
>> /* { dg-xfail-run-if "PR60563 radr://19802258" { *-*-darwin* } } */
>> /* { dg-require-effective-target sync_long_long_runtime } */
>> diff --git a/gcc/testsuite/g++.dg/ipa/comdat.C b/gcc/testsuite/g++.dg/ipa/comdat.C
>> index 1945e32..f3df99a 100644
>> --- a/gcc/testsuite/g++.dg/ipa/comdat.C
>> +++ b/gcc/testsuite/g++.dg/ipa/comdat.C
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-ipa-comdats" } */
>> #include <stdio.h>
>> __attribute__ ((noinline))
>> diff --git a/gcc/testsuite/gcc.dg/20041106-1.c b/gcc/testsuite/gcc.dg/20041106-1.c
>> index cba4a06..95579ff 100644
>> --- a/gcc/testsuite/gcc.dg/20041106-1.c
>> +++ b/gcc/testsuite/gcc.dg/20041106-1.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* *-*-uclinux* } } */
>> /* { dg-options -O2 } */
>>
>> #include <sys/types.h>
>> diff --git a/gcc/testsuite/gcc.dg/cleanup-10.c b/gcc/testsuite/gcc.dg/cleanup-10.c
>> index 1af63ea..9fc8658 100644
>> --- a/gcc/testsuite/gcc.dg/cleanup-10.c
>> +++ b/gcc/testsuite/gcc.dg/cleanup-10.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* { dg-require-effective-target exceptions } */
>> /* Verify that cleanups work with exception handling through signal frames
>> diff --git a/gcc/testsuite/gcc.dg/cleanup-11.c b/gcc/testsuite/gcc.dg/cleanup-11.c
>> index c1f19fe..6b499d4 100644
>> --- a/gcc/testsuite/gcc.dg/cleanup-11.c
>> +++ b/gcc/testsuite/gcc.dg/cleanup-11.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* { dg-require-effective-target exceptions } */
>> /* Verify that cleanups work with exception handling through realtime signal
>> diff --git a/gcc/testsuite/gcc.dg/cleanup-8.c b/gcc/testsuite/gcc.dg/cleanup-8.c
>> index 45abdb2..87f4186 100644
>> --- a/gcc/testsuite/gcc.dg/cleanup-8.c
>> +++ b/gcc/testsuite/gcc.dg/cleanup-8.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* { dg-require-effective-target exceptions } */
>> /* Verify that cleanups work with exception handling through signal
>> diff --git a/gcc/testsuite/gcc.dg/cleanup-9.c b/gcc/testsuite/gcc.dg/cleanup-9.c
>> index 98dc268..d34ce12 100644
>> --- a/gcc/testsuite/gcc.dg/cleanup-9.c
>> +++ b/gcc/testsuite/gcc.dg/cleanup-9.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */
>> +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */
>> /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
>> /* { dg-require-effective-target exceptions } */
>> /* Verify that cleanups work with exception handling through realtime
>> diff --git a/gcc/testsuite/gcc.dg/fdata-sections-1.c b/gcc/testsuite/gcc.dg/fdata-sections-1.c
>> index 51686b9..e8a6639 100644
>> --- a/gcc/testsuite/gcc.dg/fdata-sections-1.c
>> +++ b/gcc/testsuite/gcc.dg/fdata-sections-1.c
>> @@ -1,7 +1,7 @@
>> /* PR middle-end/15486 */
>> /* Origin: Jonathan Larmour <jifl-bugzilla@jifvik.org> */
>>
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-fdata-sections" } */
>>
>> int x;
>> diff --git a/gcc/testsuite/gcc.dg/fdata-sections-2.c b/gcc/testsuite/gcc.dg/fdata-sections-2.c
>> index dda90ba7..48d44a2 100644
>> --- a/gcc/testsuite/gcc.dg/fdata-sections-2.c
>> +++ b/gcc/testsuite/gcc.dg/fdata-sections-2.c
>> @@ -4,7 +4,7 @@
>> /* This checks that string constants are put in per-function rodata
>> sections, so that they can be garbage collected. */
>>
>> -/* { dg-do compile { target *-*-linux* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-uclinux* } } */
>> /* { dg-options "-O -ffunction-sections -fdata-sections" } */
>>
>> const char *f1(void) { return "falderalde"; }
>> diff --git a/gcc/testsuite/gcc.dg/pr39323-1.c b/gcc/testsuite/gcc.dg/pr39323-1.c
>> index 7a7fd63..d84009c 100644
>> --- a/gcc/testsuite/gcc.dg/pr39323-1.c
>> +++ b/gcc/testsuite/gcc.dg/pr39323-1.c
>> @@ -1,5 +1,5 @@
>> /* PR c/39323 - MAX_OFILE_ALIGNMENT in elfos.h is too big */
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>>
>> int foo __attribute__ ((aligned(1 << 29))) = 20; /* { dg-error "requested alignment" } */
>> typedef int __attribute__ ((aligned(1 << 29))) int29; /* { dg-error "requested alignment" } */
>> diff --git a/gcc/testsuite/gcc.dg/pr39323-2.c b/gcc/testsuite/gcc.dg/pr39323-2.c
>> index a870729..6b6cb2e 100644
>> --- a/gcc/testsuite/gcc.dg/pr39323-2.c
>> +++ b/gcc/testsuite/gcc.dg/pr39323-2.c
>> @@ -1,5 +1,5 @@
>> /* PR c/39323 */
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>>
>> int bar __attribute__ ((aligned(1 << 28))) = 20;
>>
>> diff --git a/gcc/testsuite/gcc.dg/pr39323-3.c b/gcc/testsuite/gcc.dg/pr39323-3.c
>> index b452d3c..2e2c1a2 100644
>> --- a/gcc/testsuite/gcc.dg/pr39323-3.c
>> +++ b/gcc/testsuite/gcc.dg/pr39323-3.c
>> @@ -1,5 +1,5 @@
>> /* PR c/39323 */
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>>
>> typedef int __attribute__ ((aligned(1 << 28))) int28;
>> int28 foo = 20;
>> diff --git a/gcc/testsuite/gcc.dg/pr65780-1.c b/gcc/testsuite/gcc.dg/pr65780-1.c
>> index b586211..5e3226e 100644
>> --- a/gcc/testsuite/gcc.dg/pr65780-1.c
>> +++ b/gcc/testsuite/gcc.dg/pr65780-1.c
>> @@ -1,5 +1,5 @@
>> /* PR target/65780 */
>> -/* { dg-do link { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2" } */
>>
>> int optopt;
>> diff --git a/gcc/testsuite/gcc.dg/pr65780-2.c b/gcc/testsuite/gcc.dg/pr65780-2.c
>> index bff3323..932cbe1 100644
>> --- a/gcc/testsuite/gcc.dg/pr65780-2.c
>> +++ b/gcc/testsuite/gcc.dg/pr65780-2.c
>> @@ -1,5 +1,5 @@
>> /* PR target/65780 */
>> -/* { dg-do link { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-require-effective-target pie } */
>> /* { dg-options "-O2 -fpie" } */
>>
>> diff --git a/gcc/testsuite/gcc.dg/pr67338.c b/gcc/testsuite/gcc.dg/pr67338.c
>> index 0fdc302..7bfbef2 100644
>> --- a/gcc/testsuite/gcc.dg/pr67338.c
>> +++ b/gcc/testsuite/gcc.dg/pr67338.c
>> @@ -1,4 +1,4 @@
>> /* PR c/67338 */
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>>
>> struct S { __attribute__((aligned (1 << 28))) double a; };
>> diff --git a/gcc/testsuite/gcc.dg/pr78185.c b/gcc/testsuite/gcc.dg/pr78185.c
>> index 405f748..d7781b2 100644
>> --- a/gcc/testsuite/gcc.dg/pr78185.c
>> +++ b/gcc/testsuite/gcc.dg/pr78185.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O" } */
>>
>> #include <unistd.h>
>> diff --git a/gcc/testsuite/gcc.dg/pr83100-1.c b/gcc/testsuite/gcc.dg/pr83100-1.c
>> index 233c1f6..ccfb8c6 100644
>> --- a/gcc/testsuite/gcc.dg/pr83100-1.c
>> +++ b/gcc/testsuite/gcc.dg/pr83100-1.c
>> @@ -1,5 +1,5 @@
>> /* PR target/83100 */
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fcommon -fdata-sections" } */
>>
>> const int a;
>> diff --git a/gcc/testsuite/gcc.dg/pr83100-4.c b/gcc/testsuite/gcc.dg/pr83100-4.c
>> index bb26735..2f83247 100644
>> --- a/gcc/testsuite/gcc.dg/pr83100-4.c
>> +++ b/gcc/testsuite/gcc.dg/pr83100-4.c
>> @@ -1,5 +1,5 @@
>> /* PR target/83100 */
>> -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fno-common -fdata-sections" } */
>>
>> const int a;
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-12g.c b/gcc/testsuite/gcc.dg/strlenopt-12g.c
>> index f1dec1f..fb0eeb2 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-12g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-12g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy function. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-14g.c b/gcc/testsuite/gcc.dg/strlenopt-14g.c
>> index 62a83bf..8bce645 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-14g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-14g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy and mempcpy functions. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>> /* Bionic targets don't have mempcpy */
>> /* { dg-require-effective-target non_bionic } */
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-14gf.c b/gcc/testsuite/gcc.dg/strlenopt-14gf.c
>> index 8b126fc..cc9092b 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-14gf.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-14gf.c
>> @@ -1,6 +1,6 @@
>> /* This test needs runtime that provides stpcpy, mempcpy and __*_chk
>> functions. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>> /* Bionic targets don't have mempcpy */
>> /* { dg-require-effective-target non_bionic } */
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-16g.c b/gcc/testsuite/gcc.dg/strlenopt-16g.c
>> index 0cf8410..8b8f0d6 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-16g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-16g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy function. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-17g.c b/gcc/testsuite/gcc.dg/strlenopt-17g.c
>> index 184e530..0d5f559 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-17g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-17g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy function. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-18g.c b/gcc/testsuite/gcc.dg/strlenopt-18g.c
>> index f734675..e3706d2 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-18g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-18g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy function. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-1f.c b/gcc/testsuite/gcc.dg/strlenopt-1f.c
>> index 856774d..bb320ab 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-1f.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-1f.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides __*_chk functions. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinu* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define FORTIFY_SOURCE 2
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-22g.c b/gcc/testsuite/gcc.dg/strlenopt-22g.c
>> index 9c5d020..348903f 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-22g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-22g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy function. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-2f.c b/gcc/testsuite/gcc.dg/strlenopt-2f.c
>> index 1e915da..f61a8ba 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-2f.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-2f.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides __*_chk functions. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define FORTIFY_SOURCE 2
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-31g.c b/gcc/testsuite/gcc.dg/strlenopt-31g.c
>> index 45cc29c..3588b06 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-31g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-31g.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-33g.c b/gcc/testsuite/gcc.dg/strlenopt-33g.c
>> index 7d24d2b..8566782 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-33g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-33g.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-4g.c b/gcc/testsuite/gcc.dg/strlenopt-4g.c
>> index 879d566..c6a2d6f 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-4g.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-4g.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy function. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strlenopt-4gf.c b/gcc/testsuite/gcc.dg/strlenopt-4gf.c
>> index 7f261b7..2783c3b 100644
>> --- a/gcc/testsuite/gcc.dg/strlenopt-4gf.c
>> +++ b/gcc/testsuite/gcc.dg/strlenopt-4gf.c
>> @@ -1,5 +1,5 @@
>> /* This test needs runtime that provides stpcpy and __*_chk functions. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2 -fdump-tree-strlen" } */
>>
>> #define USE_GNU
>> diff --git a/gcc/testsuite/gcc.dg/strncmp-2.c b/gcc/testsuite/gcc.dg/strncmp-2.c
>> index f5555ba..6818b30 100644
>> --- a/gcc/testsuite/gcc.dg/strncmp-2.c
>> +++ b/gcc/testsuite/gcc.dg/strncmp-2.c
>> @@ -1,5 +1,5 @@
>> /* Test strncmp builtin expansion for compilation and proper execution. */
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-options "-O2" } */
>> /* { dg-require-effective-target ptr32plus } */
>>
>> diff --git a/gcc/testsuite/gcc.dg/struct-ret-3.c b/gcc/testsuite/gcc.dg/struct-ret-3.c
>> index 4083bb4..4c0a0e6 100644
>> --- a/gcc/testsuite/gcc.dg/struct-ret-3.c
>> +++ b/gcc/testsuite/gcc.dg/struct-ret-3.c
>> @@ -1,7 +1,7 @@
>> /* PR middle-end/31309 */
>> /* Origin: Peeter Joot <peeterj@ca.ibm.com> */
>>
>> -/* { dg-do run { target *-*-linux* *-*-gnu* } } */
>> +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */
>> /* { dg-add-options stack_size } */
>>
>> #include <sys/mman.h>
>> diff --git a/gcc/testsuite/gcc.dg/torture/pr69760.c b/gcc/testsuite/gcc.dg/torture/pr69760.c
>> index 8f24608..53733c7 100644
>> --- a/gcc/testsuite/gcc.dg/torture/pr69760.c
>> +++ b/gcc/testsuite/gcc.dg/torture/pr69760.c
>> @@ -1,5 +1,5 @@
>> /* PR tree-optimization/69760 */
>> -/* { dg-do run { target { { *-*-linux* *-*-gnu* } && mmap } } } */
>> +/* { dg-do run { target { { *-*-linux* *-*-gnu* *-*-uclinux* } && mmap } } } */
>> /* { dg-options "-O2" } */
>>
>> #include <unistd.h>
>> diff --git a/gcc/testsuite/gcc.target/arm/div64-unwinding.c b/gcc/testsuite/gcc.target/arm/div64-unwinding.c
>> index 7f112ee..0944281 100644
>> --- a/gcc/testsuite/gcc.target/arm/div64-unwinding.c
>> +++ b/gcc/testsuite/gcc.target/arm/div64-unwinding.c
>> @@ -1,6 +1,6 @@
>> /* Performing a 64-bit division should not pull in the unwinder. */
>>
>> -/* { dg-do run { target { ! *-*-linux* } } } */
>> +/* { dg-do run { target { { ! *-*-linux* } && { ! *-*-uclinux* } } } } */
>> /* { dg-options "-O0" } */
>>
>> #include <stdlib.h>
>> diff --git a/gcc/testsuite/gcc.target/arm/pr66912.c b/gcc/testsuite/gcc.target/arm/pr66912.c
>> index 27e4c45..7e6294c 100644
>> --- a/gcc/testsuite/gcc.target/arm/pr66912.c
>> +++ b/gcc/testsuite/gcc.target/arm/pr66912.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target *-*-linux* } } */
>> +/* { dg-do compile { target *-*-linux* arm*-*-uclinuxfdpiceabi } } */
>> /* { dg-options "-O2 -fpic" } */
>>
>> __attribute__((visibility("protected")))
>> diff --git a/gcc/testsuite/gcc.target/arm/stack-checking.c b/gcc/testsuite/gcc.target/arm/stack-checking.c
>> index 4b53bed..9d1d2b0 100644
>> --- a/gcc/testsuite/gcc.target/arm/stack-checking.c
>> +++ b/gcc/testsuite/gcc.target/arm/stack-checking.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target { *-*-linux* } } } */
>> +/* { dg-do run { target { *-*-linux* *-*-uclinux* } } } */
>> /* { dg-require-stack-check "" } */
>> /* { dg-options "-fstack-check" } */
>>
>> diff --git a/gcc/testsuite/gcc.target/arm/synchronize.c b/gcc/testsuite/gcc.target/arm/synchronize.c
>> index 7ef10e2..912f407 100644
>> --- a/gcc/testsuite/gcc.target/arm/synchronize.c
>> +++ b/gcc/testsuite/gcc.target/arm/synchronize.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-* } } } */
>> +/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-* arm*-*-uclinux* } } } */
>>
>> void *foo (void)
>> {
>> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
>> index 4bb7da2..60d68f4 100644
>> --- a/gcc/testsuite/lib/target-supports.exp
>> +++ b/gcc/testsuite/lib/target-supports.exp
>> @@ -1189,6 +1189,7 @@ proc check_effective_target_pie { } {
>> || [istarget *-*-dragonfly*]
>> || [istarget *-*-freebsd*]
>> || [istarget *-*-linux*]
>> + || [istarget arm*-*-uclinuxfdpiceabi]
>> || [istarget *-*-gnu*]
>> || [istarget *-*-amdhsa]} {
>> return 1;
>> @@ -6752,6 +6753,7 @@ proc check_effective_target_sync_long_long_runtime { } {
>> } ""
>> }])
>> || [istarget aarch64*-*-*]
>> + || [istarget arm*-*-uclinuxfdpiceabi]
>> || ([istarget arm*-*-linux-*]
>> && [check_runtime sync_longlong_runtime {
>> #include <stdlib.h>
>> @@ -6812,6 +6814,7 @@ proc check_effective_target_sync_int_long { } {
>> || [istarget aarch64*-*-*]
>> || [istarget alpha*-*-*]
>> || [istarget arm*-*-linux-*]
>> + || [istarget arm*-*-uclinuxfdpiceabi]
>> || ([istarget arm*-*-*]
>> && [check_effective_target_arm_acq_rel])
>> || [istarget bfin*-*linux*]
>> @@ -6836,6 +6839,7 @@ proc check_effective_target_sync_char_short { } {
>> || [istarget i?86-*-*] || [istarget x86_64-*-*]
>> || [istarget alpha*-*-*]
>> || [istarget arm*-*-linux-*]
>> + || [istarget arm*-*-uclinuxfdpiceabi]
>> || ([istarget arm*-*-*]
>> && [check_effective_target_arm_acq_rel])
>> || [istarget hppa*-*linux*]
>> --
>> 2.6.3
>>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
2019-07-19 8:59 ` Kyrill Tkachov
@ 2019-07-22 19:50 ` Mike Stump
0 siblings, 0 replies; 109+ messages in thread
From: Mike Stump @ 2019-07-22 19:50 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches, ro
On Jul 19, 2019, at 1:57 AM, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
>
> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>> Some tests have the "nonpic" guard, but pass on
>> arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
>> than adding this target to all these tests, add the "pie_enabled"
>> effective target.
>>
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>
>> gcc/testsuite/
>> * g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
>> * g++.dg/ipa/devirt-c-7.C: Likewise.
>> * g++.dg/ipa/ivinline-1.C: Likewise.
>> * g++.dg/ipa/ivinline-2.C: Likewise.
>> * g++.dg/ipa/ivinline-3.C: Likewise.
>> * g++.dg/ipa/ivinline-4.C: Likewise.
>> * g++.dg/ipa/ivinline-5.C: Likewise.
>> * g++.dg/ipa/ivinline-7.C: Likewise.
>> * g++.dg/ipa/ivinline-8.C: Likewise.
>> * g++.dg/ipa/ivinline-9.C: Likewise.
>> * g++.dg/tls/pr79288.C: Likewise.
>> * gcc.dg/addr_equal-1.c: Likewise.
>> * gcc.dg/const-1.c: Likewise.
>> * gcc.dg/ipa/pure-const-1.c: Likewise.
>> * gcc.dg/noreturn-8.c: Likewise.
>> * gcc.dg/pr33826.c: Likewise.
>> * gcc.dg/torture/ipa-pta-1.c: Likewise.
>> * gcc.dg/tree-ssa/alias-2.c: Likewise.
>> * gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
>> * gcc.dg/tree-ssa/loadpre6.c: Likewise.
>> * gcc.dg/uninit-19.c: Likewise.
>>
> Looks sensible, but this is not an arm-specific patch.
>
> CC'ing testsuite maintainers.
Seem sensible to me as well. Darwin is a pie by default sort of platform as I recall, and as long as it doesn't trip up there (you can just watch for darwin fallout), should be fine.
Patch is approved. Do watch for darwin fallout, and if there is some, we'd have to think a little more about it. I'm not expecting any fall out (but I haven't tested).
>> Change-Id: I1a0d836b892c23891f739fccdc467d0f354ab82c
>>
>> diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
>> index 2d37867..906a44d 100644
>> --- a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
>> +++ b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
>> @@ -1,6 +1,6 @@
>> // Runtime test for noexcept-specification.
>> // { dg-options "-Wnoexcept" }
>> -// { dg-do run { target nonpic } }
>> +// { dg-do run { target { nonpic || pie_enabled } } }
>> // { dg-require-effective-target c++11 }
>>
>> #include <exception>
>> diff --git a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
>> index 2e76cbe..efb65c2 100644
>> --- a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
>> +++ b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
>> @@ -1,7 +1,6 @@
>> /* Verify that ipa-cp will not get confused by placement new constructing an
>> object within another one when looking for dynamic type change . */
>> -/* { dg-do run } */
>> -/* { dg-require-effective-target nonpic } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -Wno-attributes" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-1.C b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
>> index 9b10d20..2d988bc 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-1.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
>> @@ -1,6 +1,6 @@
>> /* Verify that simple virtual calls are inlined even without early
>> inlining. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-2.C b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
>> index 21cd46f..d978638 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-2.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
>> @@ -1,6 +1,6 @@
>> /* Verify that simple virtual calls using this pointer are inlined
>> even without early inlining.. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-3.C b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
>> index 1e24644..f756a16 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-3.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
>> @@ -1,6 +1,6 @@
>> /* Verify that simple virtual calls on an object refrence are inlined
>> even without early inlining. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-4.C b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
>> index cf0d980..5fbd3ef 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-4.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
>> @@ -1,7 +1,7 @@
>> /* Verify that simple virtual calls are inlined even without early
>> inlining, even when a typecast to an ancestor is involved along the
>> way. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-5.C b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
>> index f15ebf2..6c19907 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-5.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
>> @@ -1,6 +1,6 @@
>> /* Verify that virtual call inlining does not pick a wrong method when
>> there is a user defined ancestor in an object. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-7.C b/gcc/testsuite/g++.dg/ipa/ivinline-7.C
>> index a7b41e7..fd6aba6 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-7.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-7.C
>> @@ -1,7 +1,7 @@
>> /* Verify that simple virtual calls are inlined even without early
>> inlining, even when a typecast to an ancestor is involved along the
>> way and that ancestor is not the first one with virtual functions. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-8.C b/gcc/testsuite/g++.dg/ipa/ivinline-8.C
>> index 5c3299f..bc81abf 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-8.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-8.C
>> @@ -1,6 +1,6 @@
>> /* Verify that virtual calls are inlined (ithout early inlining) even
>> when their caller is itself indirectly inlined. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-9.C b/gcc/testsuite/g++.dg/ipa/ivinline-9.C
>> index 41b2381..0917f15 100644
>> --- a/gcc/testsuite/g++.dg/ipa/ivinline-9.C
>> +++ b/gcc/testsuite/g++.dg/ipa/ivinline-9.C
>> @@ -2,7 +2,7 @@
>> inlining, even when a typecast to an ancestor is involved along the
>> way and that ancestor itself has an ancestor wich is not the
>> primary base class. */
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */
>>
>> extern "C" void abort (void);
>> diff --git a/gcc/testsuite/g++.dg/tls/pr79288.C b/gcc/testsuite/g++.dg/tls/pr79288.C
>> index 9f488df..da6751f 100644
>> --- a/gcc/testsuite/g++.dg/tls/pr79288.C
>> +++ b/gcc/testsuite/g++.dg/tls/pr79288.C
>> @@ -1,5 +1,5 @@
>> // PR c++/79288
>> -// { dg-do compile { target nonpic } }
>> +// { dg-do compile { target { nonpic || pie_enabled } } }
>> // { dg-require-effective-target tls }
>> // { dg-options "-O2" }
>> // { dg-final { scan-assembler-not "@tpoff" { target i?86-*-* x86_64-*-* } } }
>> diff --git a/gcc/testsuite/gcc.dg/addr_equal-1.c b/gcc/testsuite/gcc.dg/addr_equal-1.c
>> index 18b0dc9..35fa010 100644
>> --- a/gcc/testsuite/gcc.dg/addr_equal-1.c
>> +++ b/gcc/testsuite/gcc.dg/addr_equal-1.c
>> @@ -1,5 +1,4 @@
>> -/* { dg-do run } */
>> -/* { dg-require-effective-target nonpic } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-require-weak "" } */
>> /* { dg-require-alias "" } */
>> /* { dg-options "-O2 -fdelete-null-pointer-checks" } */
>> diff --git a/gcc/testsuite/gcc.dg/const-1.c b/gcc/testsuite/gcc.dg/const-1.c
>> index a5b2b16..aa20aad 100644
>> --- a/gcc/testsuite/gcc.dg/const-1.c
>> +++ b/gcc/testsuite/gcc.dg/const-1.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target nonpic } } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O2 -Wsuggest-attribute=const" } */
>>
>> extern int extern_const(int a) __attribute__ ((const));
>> diff --git a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
>> index 06b415e..dd58457 100644
>> --- a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
>> +++ b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target nonpic } } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-tree-local-pure-const1 -fdump-ipa-pure-const -fdump-tree-optimized -fno-early-inlining -fgnu89-inline" } */
>> void abort (void);
>> int error_code;
>> diff --git a/gcc/testsuite/gcc.dg/noreturn-8.c b/gcc/testsuite/gcc.dg/noreturn-8.c
>> index 294800b..ce41cab 100644
>> --- a/gcc/testsuite/gcc.dg/noreturn-8.c
>> +++ b/gcc/testsuite/gcc.dg/noreturn-8.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do run { target nonpic } } */
>> +/* { dg-do run { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O2" } */
>> void exit (int);
>> void noreturn_autodetection_failed ();
>> diff --git a/gcc/testsuite/gcc.dg/pr33826.c b/gcc/testsuite/gcc.dg/pr33826.c
>> index df83915..d222774 100644
>> --- a/gcc/testsuite/gcc.dg/pr33826.c
>> +++ b/gcc/testsuite/gcc.dg/pr33826.c
>> @@ -1,8 +1,7 @@
>> /* Regression test for PR middle-end/33826 */
>> /* Verify that recursive functions cannot be pure or const. */
>>
>> -/* { dg-do compile } */
>> -/* { dg-require-effective-target nonpic } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O1 -fdump-tree-local-pure-const1 -fdump-ipa-pure-const" } */
>>
>> int recurse1 (int);
>> diff --git a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
>> index 1bf4997..30156a3 100644
>> --- a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
>> +++ b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target { nonpic } } } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-fipa-pta -fdump-ipa-pta2 -fno-ipa-icf" } */
>> /* { dg-skip-if "" { *-*-* } { "-O0" "-fno-fat-lto-objects" } { "" } } */
>>
>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
>> index e10a25d..f9d2dd4 100644
>> --- a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target { nonpic } } } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O2 -fdump-tree-optimized" } */
>> static int a;
>> int f;
>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
>> index 2d713d6..3b5a94f 100644
>> --- a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target nonpic } } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O3 -fdump-tree-fnsplit -fdump-tree-optimized --param=builtin-expect-probability=100" } */
>>
>> struct a {int a,b;};
>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
>> index 028becd..b4e9296 100644
>> --- a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
>> @@ -1,4 +1,4 @@
>> -/* { dg-do compile { target nonpic } } */
>> +/* { dg-do compile { target { nonpic || pie_enabled } } } */
>> /* { dg-options "-O2 -fdump-tree-pre-stats -fdump-tree-fre1" } */
>> #include <stddef.h>
>>
>> --
>> 2.6.3
>>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
2019-07-16 13:31 ` Kyrill Tkachov
@ 2019-07-31 14:48 ` Christophe Lyon
2019-08-29 15:40 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-07-31 14:48 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
On Tue, 16 Jul 2019 at 14:42, Kyrill Tkachov
<kyrylo.tkachov@foss.arm.com> wrote:
>
>
> On 7/16/19 12:18 PM, Kyrill Tkachov wrote:
> > Hi Christophe
> >
> > On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > > In FDPIC mode, the trampoline generated to support pointers to nested
> > > functions looks like:
> > >
> > > .word trampoline address
> > > .word trampoline GOT address
> > > ldr r12, [pc, #8]
> > > ldr r9, [pc, #8]
> > > ldr pc, [pc, #8]
> > > .word static chain value
> > > .word GOT address
> > > .word function's address
> > >
> > > because in FDPIC function pointers are actually pointers to function
> > > descriptors, we have to actually generate a function descriptor for
> > > the trampoline.
> > >
> > > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > > Mickaël Guêné <mickael.guene@st.com>
> > >
> > > gcc/
> > > * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
> > > support.
> > > (arm_trampoline_init): Likewise.
> > > (arm_trampoline_init): Likewise.
> > > * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
> > >
> > > Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
> > >
> > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> > > index 40e3f3b..99d13bf 100644
> > > --- a/gcc/config/arm/arm.c
> > > +++ b/gcc/config/arm/arm.c
> > > @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
> > > .word static chain value
> > > .word function's address
> > > XXX FIXME: When the trampoline returns, r8 will be clobbered. */
> > > +/* In FDPIC mode, the trampoline looks like:
> > > + .word trampoline address
> > > + .word trampoline GOT address
> > > + ldr r12, [pc, #8] ; #4 for Thumb2
> > > + ldr r9, [pc, #8] ; #4 for Thumb2
> > > + ldr pc, [pc, #8] ; #4 for Thumb2
> > > + .word static chain value
> > > + .word GOT address
> > > + .word function's address
> > > +*/
> >
> >
> > I think this comment is not right for Thumb2.
> >
> > These load instructionshave 32-bit encodings, even in Thumb2 (they use
> > high registers).
>
> Andre and Wilco pointed out to me offline that the offset should be #4
> for Arm mode.
>
> The Arm ARM at E1.2.3 says:
>
> PC, the program counter
>
> * When executing an A32 instruction, PC reads as the address of the
> current instruction plus 8.
>
> * When executing a T32 instruction, PC reads as the address of the
> current instruction plus 4.
>
Yes, it looks like the code is right, and the comment is wrong:
- offset 8 for thumb2 mode
- offset 4 for arm mode
Thanks,
Christophe
> Thanks,
>
> Kyrill
>
>
> >
> > Also, please merge this comment with the one above (no separate /**/)
> >
> > >
> > > static void
> > > arm_asm_trampoline_template (FILE *f)
> > > {
> > > fprintf (f, "\t.syntax unified\n");
> > >
> > > - if (TARGET_ARM)
> > > + if (TARGET_FDPIC)
> > > + {
> > > + /* The first two words are a function descriptor pointing to the
> > > + trampoline code just below. */
> > > + if (TARGET_ARM)
> > > + fprintf (f, "\t.arm\n");
> > > + else if (TARGET_THUMB2)
> > > + fprintf (f, "\t.thumb\n");
> > > + else
> > > + /* Only ARM and Thumb-2 are supported. */
> > > + gcc_unreachable ();
> > > +
> > > + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> > > + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> > > + /* Trampoline code which sets the static chain register but also
> > > + PIC register before jumping into real code. */
> > > + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> > > + STATIC_CHAIN_REGNUM, PC_REGNUM,
> > > + TARGET_THUMB2 ? 8 : 4);
> > > + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> > > + PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
> > > + TARGET_THUMB2 ? 8 : 4);
> > > + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
> > > + PC_REGNUM, PC_REGNUM,
> > > + TARGET_THUMB2 ? 8 : 4);
> >
> >
> > As above, I think the offset should be 8 for both Arm and Thumb2.
> >
> > Thanks,
> >
> > Kyrill
> >
> >
> > > + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
> > > + }
> > > + else if (TARGET_ARM)
> > > {
> > > fprintf (f, "\t.arm\n");
> > > asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM,
> > > PC_REGNUM);
> > > @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
> > > rtx chain_value)
> > > emit_block_move (m_tramp, assemble_trampoline_template (),
> > > GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
> > >
> > > - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
> > > - emit_move_insn (mem, chain_value);
> > > + if (TARGET_FDPIC)
> > > + {
> > > + rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
> > > + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
> > > + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode,
> > > funcdesc, 4));
> > > + /* The function start address is at offset 8, but in Thumb mode
> > > + we want bit 0 set to 1 to indicate Thumb-ness, hence 9
> > > + below. */
> > > + rtx trampoline_code_start
> > > + = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9
> > : 8);
> > > +
> > > + /* Write initial funcdesc which points to the trampoline. */
> > > + mem = adjust_address (m_tramp, SImode, 0);
> > > + emit_move_insn (mem, trampoline_code_start);
> > > + mem = adjust_address (m_tramp, SImode, 4);
> > > + emit_move_insn (mem, gen_rtx_REG (Pmode,
> > PIC_OFFSET_TABLE_REGNUM));
> > > + /* Setup static chain. */
> > > + mem = adjust_address (m_tramp, SImode, 20);
> > > + emit_move_insn (mem, chain_value);
> > > + /* GOT + real function entry point. */
> > > + mem = adjust_address (m_tramp, SImode, 24);
> > > + emit_move_insn (mem, gotaddr);
> > > + mem = adjust_address (m_tramp, SImode, 28);
> > > + emit_move_insn (mem, fnaddr);
> > > + }
> > > + else
> > > + {
> > > + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
> > > + emit_move_insn (mem, chain_value);
> > >
> > > - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
> > > - fnaddr = XEXP (DECL_RTL (fndecl), 0);
> > > - emit_move_insn (mem, fnaddr);
> > > + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
> > > + fnaddr = XEXP (DECL_RTL (fndecl), 0);
> > > + emit_move_insn (mem, fnaddr);
> > > + }
> > >
> > > a_tramp = XEXP (m_tramp, 0);
> > > emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
> > > @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
> > > rtx chain_value)
> > > static rtx
> > > arm_trampoline_adjust_address (rtx addr)
> > > {
> > > - if (TARGET_THUMB)
> > > + /* For FDPIC don't fix trampoline address since it's a function
> > > + descriptor and not a function address. */
> > > + if (TARGET_THUMB && !TARGET_FDPIC)
> > > addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
> > > NULL, 0, OPTAB_LIB_WIDEN);
> > > return addr;
> > > diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> > > index 45c0e2b..f80df63 100644
> > > --- a/gcc/config/arm/arm.h
> > > +++ b/gcc/config/arm/arm.h
> > > @@ -1602,7 +1602,7 @@ typedef struct
> > > #define INIT_EXPANDERS arm_init_expanders ()
> > >
> > > /* Length in units of the trampoline for entering a nested
> > function. */
> > > -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
> > > +#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
> > >
> > > /* Alignment required for a trampoline in bits. */
> > > #define TRAMPOLINE_ALIGNMENT 32
> > > --
> > > 2.6.3
> > >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-07-16 10:38 ` Richard Sandiford
2019-07-16 20:00 ` Rich Felker
@ 2019-08-01 10:13 ` Christophe Lyon
2019-08-06 14:28 ` Richard Sandiford
2019-08-29 15:14 ` Christophe Lyon
2 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-01 10:13 UTC (permalink / raw)
To: Christophe Lyon, Christophe Lyon, Szabolcs Nagy, Rich Felker, nd,
gcc-patches, Richard Sandiford
On Tue, 16 Jul 2019 at 12:34, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Christophe Lyon <christophe.lyon@st.com> writes:
> > On 22/05/2019 10:45, Christophe Lyon wrote:
> >> On Wed, 22 May 2019 at 10:39, Szabolcs Nagy <Szabolcs.Nagy@arm.com> wrote:
> >>>
> >>> On 21/05/2019 16:28, Christophe Lyon wrote:
> >>>> --- a/gcc/config/arm/linux-eabi.h
> >>>> +++ b/gcc/config/arm/linux-eabi.h
> >>>> @@ -89,7 +89,7 @@
> >>>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> >>>> #endif
> >>>> #define MUSL_DYNAMIC_LINKER \
> >>>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> >>>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
> >>>> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
> >>>
> >>> the line break seems wrong (either needs \ or no newline)
> >>>
> >> Sorry, that's a mailer artifact.
> >>
> >>>> --- a/libsanitizer/configure.tgt
> >>>> +++ b/libsanitizer/configure.tgt
> >>>> @@ -45,7 +45,7 @@ case "${target}" in
> >>>> ;;
> >>>> sparc*-*-solaris2.11*)
> >>>> ;;
> >>>> - arm*-*-uclinuxfdpiceabi)
> >>>> + arm*-*-fdpiceabi)
> >>>
> >>> should be *fdpiceabi instead of *-fdpiceabi i think.
> >>
> >> Indeed, thanks
> >> .
> >>
> > FWIW, here is the updated patch:
> > - handles musl -fdpic suffix
> > - disables sanitizers for arm*-*-fdpiceabi
> > - does not handle -static in a special way, so using -static produces binaries that request the non-existing /usr/lib/ld.so.1, thus effectively making -static broken/unsupported (this does lead to a few more FAIL in the testsuite)
> >
> > The plan is to work -static-pie later, as discussed.
>
> Could you make -static without -mno-fdpic an error via a %e spec,
> so that the failure mode is a bit more user-friendly?
>
Sure.
Do you know if there is a way to catch linker options in the specs?
Would it be possible to still accept -static -Wl,-dynamic-linker XXX ?
> I realise this isn't your preferred option, sorry.
>
> > diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
> > index e1bacf4..6c25a1a 100644
> > --- a/gcc/config/arm/bpabi.h
> > +++ b/gcc/config/arm/bpabi.h
> > @@ -55,6 +55,8 @@
> > #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
> > "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
> >
> > +#define TARGET_FDPIC_ASM_SPEC ""
>
> Formatting nit: should be a single space before ""
>
> > +
> > #define BE8_LINK_SPEC \
> > "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \
> > " %{mbig-endian:big}" \
> > @@ -64,7 +66,7 @@
> > /* Tell the assembler to build BPABI binaries. */
> > #undef SUBTARGET_EXTRA_ASM_SPEC
> > #define SUBTARGET_EXTRA_ASM_SPEC \
> > - "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
> > + "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC TARGET_FDPIC_ASM_SPEC
>
> Long line.
>
> > diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
> > index 66ec0ea..d7cc923 100644
> > --- a/gcc/config/arm/linux-eabi.h
> > +++ b/gcc/config/arm/linux-eabi.h
> > @@ -89,7 +89,7 @@
> > #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> > #endif
> > #define MUSL_DYNAMIC_LINKER \
> > - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> > + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
> >
> > /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
> > use the GNU/Linux version, not the generic BPABI version. */
>
> Rich, could you confirm that this is (going to be?) the correct name?
>
> > diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
> > index 66ec0ea..d7cc923 100644
> > --- a/gcc/config/arm/linux-eabi.h
> > +++ b/gcc/config/arm/linux-eabi.h
> > @@ -89,7 +89,7 @@
> > #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
> > #endif
> > #define MUSL_DYNAMIC_LINKER \
> > - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
> > + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
> >
> > /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
> > use the GNU/Linux version, not the generic BPABI version. */
> > @@ -101,11 +101,14 @@
> > #undef ASAN_CC1_SPEC
> > #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
> >
> > +#define FDPIC_CC1_SPEC ""
> > +
> > #undef CC1_SPEC
> > #define CC1_SPEC \
> > - LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
> > + LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
> > + FDPIC_CC1_SPEC, \
> > GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
> > - ANDROID_CC1_SPEC)
> > + ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
> >
> > #define CC1PLUS_SPEC \
> > LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
>
> Does it make sense to add FDPIC_CC1_SPEC to the Android version?
No, I will remove it.
>
> > diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
> > new file mode 100644
> > index 0000000..3180bcd
> > --- /dev/null
> > +++ b/gcc/config/arm/uclinuxfdpiceabi.h
> > @@ -0,0 +1,52 @@
> > +/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
> > + Copyright (C) 2018 Free Software Foundation, Inc.
> > + Contributed by STMicroelectronics.
> > +
> > + This file is part of GCC.
> > +
> > + GCC is free software; you can redistribute it and/or modify it
> > + under the terms of the GNU General Public License as published
> > + by the Free Software Foundation; either version 3, or (at your
> > + option) any later version.
> > +
> > + GCC is distributed in the hope that it will be useful, but WITHOUT
> > + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> > + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
> > + License for more details.
> > +
> > + You should have received a copy of the GNU General Public License
> > + along with GCC; see the file COPYING3. If not see
> > + <http://www.gnu.org/licenses/>. */
> > +
> > +/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
> > + which also means we produce PIE code by default. */
> > +#undef FDPIC_CC1_SPEC
> > +#define FDPIC_CC1_SPEC \
> > + "%{!mno-fdpic:-mfdpic %{!no-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
>
> Looks like the !no-PIE should be !fno-PIE.
Indeed.
> > +/* Add --fdpic assembler flag by default. */
> > +#undef TARGET_FDPIC_ASM_SPEC
> > +#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
>
> Single space before the ".
>
Thanks,
Christophe
> Thanks,
> Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-08-01 10:13 ` Christophe Lyon
@ 2019-08-06 14:28 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-08-06 14:28 UTC (permalink / raw)
To: Christophe Lyon
Cc: Christophe Lyon, Szabolcs Nagy, Rich Felker, nd, gcc-patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> On Tue, 16 Jul 2019 at 12:34, Richard Sandiford
> <richard.sandiford@arm.com> wrote:
>>
>> Christophe Lyon <christophe.lyon@st.com> writes:
>> > On 22/05/2019 10:45, Christophe Lyon wrote:
>> >> On Wed, 22 May 2019 at 10:39, Szabolcs Nagy <Szabolcs.Nagy@arm.com> wrote:
>> >>>
>> >>> On 21/05/2019 16:28, Christophe Lyon wrote:
>> >>>> --- a/gcc/config/arm/linux-eabi.h
>> >>>> +++ b/gcc/config/arm/linux-eabi.h
>> >>>> @@ -89,7 +89,7 @@
>> >>>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
>> >>>> #endif
>> >>>> #define MUSL_DYNAMIC_LINKER \
>> >>>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
>> >>>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
>> >>>> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>> >>>
>> >>> the line break seems wrong (either needs \ or no newline)
>> >>>
>> >> Sorry, that's a mailer artifact.
>> >>
>> >>>> --- a/libsanitizer/configure.tgt
>> >>>> +++ b/libsanitizer/configure.tgt
>> >>>> @@ -45,7 +45,7 @@ case "${target}" in
>> >>>> ;;
>> >>>> sparc*-*-solaris2.11*)
>> >>>> ;;
>> >>>> - arm*-*-uclinuxfdpiceabi)
>> >>>> + arm*-*-fdpiceabi)
>> >>>
>> >>> should be *fdpiceabi instead of *-fdpiceabi i think.
>> >>
>> >> Indeed, thanks
>> >> .
>> >>
>> > FWIW, here is the updated patch:
>> > - handles musl -fdpic suffix
>> > - disables sanitizers for arm*-*-fdpiceabi
>> > - does not handle -static in a special way, so using -static produces binaries that request the non-existing /usr/lib/ld.so.1, thus effectively making -static broken/unsupported (this does lead to a few more FAIL in the testsuite)
>> >
>> > The plan is to work -static-pie later, as discussed.
>>
>> Could you make -static without -mno-fdpic an error via a %e spec,
>> so that the failure mode is a bit more user-friendly?
>>
>
> Sure.
> Do you know if there is a way to catch linker options in the specs?
> Would it be possible to still accept -static -Wl,-dynamic-linker XXX ?
Ah, no, don't know a way of doing that. Maybe the error isn't
feasible after all then (at least not without significant work).
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-07-16 12:33 ` Richard Sandiford
@ 2019-08-20 17:13 ` Christophe Lyon
2019-08-29 15:39 ` Christophe Lyon
1 sibling, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-08-20 17:13 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 16/07/2019 13:58, Richard Sandiford wrote:
> Christophe Lyon <christophe.lyon@st.com> writes:
>> The FDPIC register is hard-coded to r9, as defined in the ABI.
>>
>> We have to disable tailcall optimizations if we don't know if the
>> target function is in the same module. If not, we have to set r9 to
>> the value associated with the target module.
>>
>> When generating a symbol address, we have to take into account whether
>> it is a pointer to data or to a function, because different
>> relocations are needed.
>>
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>> Mickaël Guêné <mickael.guene@st.com>
>>
>> * config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
>> in FDPIC mode.
>> * config/arm/arm-protos.h (arm_load_function_descriptor): Declare
>> new function.
>> * config/arm/arm.c (arm_option_override): Define pic register to
>> FDPIC_REGNUM.
>> (arm_function_ok_for_sibcall): Disable sibcall optimization if we
>> have no decl or go through PLT.
>> (arm_load_pic_register): Handle TARGET_FDPIC.
>> (arm_is_segment_info_known): New function.
>> (arm_pic_static_addr): Add support for FDPIC.
>> (arm_load_function_descriptor): New function.
>> (arm_assemble_integer): Add support for FDPIC.
>> * config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
>> Define. (FDPIC_REGNUM): New define.
>> * config/arm/arm.md (call): Add support for FDPIC.
>> (call_value): Likewise.
>> (*restore_pic_register_after_call): New pattern.
>> (untyped_call): Disable if FDPIC.
>> (untyped_return): Likewise.
>> * config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
>>
>> Change-Id: I8fb1a6b85ace672184013568c5d28fbda2f7fda4
>>
>> diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
>> index 6e256ee..34695fa 100644
>> --- a/gcc/config/arm/arm-c.c
>> +++ b/gcc/config/arm/arm-c.c
>> @@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
>> builtin_define ("__ARM_EABI__");
>> }
>>
>> + def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
>> +
>> def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
>> def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
>>
>> diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
>> index 485bc68..272968a 100644
>> --- a/gcc/config/arm/arm-protos.h
>> +++ b/gcc/config/arm/arm-protos.h
>> @@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
>> extern int arm_const_double_inline_cost (rtx);
>> extern bool arm_const_double_by_parts (rtx);
>> extern bool arm_const_double_by_immediates (rtx);
>> +extern rtx arm_load_function_descriptor (rtx funcdesc);
>> extern void arm_emit_call_insn (rtx, rtx, bool);
>> bool detect_cmse_nonsecure_call (tree);
>> extern const char *output_call (rtx *);
>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>> index 45abcd8..d9397b5 100644
>> --- a/gcc/config/arm/arm.c
>> +++ b/gcc/config/arm/arm.c
>> @@ -3485,6 +3485,15 @@ arm_option_override (void)
>> if (flag_pic && TARGET_VXWORKS_RTP)
>> arm_pic_register = 9;
>>
>> + /* If in FDPIC mode then force arm_pic_register to be r9. */
>> + if (TARGET_FDPIC)
>> + {
>> + arm_pic_register = FDPIC_REGNUM;
>> + if (! TARGET_ARM && ! TARGET_THUMB2)
>> + sorry ("FDPIC mode is supported on architecture versions that "
>> + "support ARM or Thumb-2 only.");
>> + }
>> +
>> if (arm_pic_register_string != NULL)
>> {
>> int pic_register = decode_reg_name (arm_pic_register_string);
>
> Isn't this equivalent to rejecting Thumb-1? I think that would be
> clearer in both the condition and the error message.
>
> How does this interact with arm_pic_data_is_text_relative? Are both
> values supported?
>
>> @@ -7295,6 +7304,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
>> if (cfun->machine->sibcall_blocked)
>> return false;
>>
>> + if (TARGET_FDPIC)
>> + {
>> + /* In FDPIC, never tailcall something for which we have no decl:
>> + the target function could be in a different module, requiring
>> + a different FDPIC register value. */
>> + if (decl == NULL)
>> + return false;
>> +
>> + /* Don't tailcall if we go through the PLT since the FDPIC
>> + register is then corrupted and we don't restore it after
>> + static function calls. */
>> + if (!targetm.binds_local_p (decl))
>> + return false;
>> + }
>> +
>> /* Never tailcall something if we are generating code for Thumb-1. */
>> if (TARGET_THUMB1)
>> return false;
>> @@ -7711,7 +7735,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
>> {
>> rtx l1, labelno, pic_tmp, pic_rtx;
>>
>> - if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
>> + if (crtl->uses_pic_offset_table == 0
>> + || TARGET_SINGLE_PIC_BASE
>> + || TARGET_FDPIC)
>> return;
>>
>> gcc_assert (flag_pic);
>> @@ -7780,28 +7806,142 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
>> emit_use (pic_reg);
>> }
>>
>> +/* Try to determine whether an object, referenced via ORIG, will be
>> + placed in the text or data segment. This is used in FDPIC mode, to
>> + decide which relocations to use when accessing ORIG. IS_READONLY
>> + is set to true if ORIG is a read-only location, false otherwise.
>> + Return true if we could determine the location of ORIG, false
>> + otherwise. IS_READONLY is valid only when we return true. */
>
> Maybe *IS_READONLY in both cases?
>
>> +static bool
>> +arm_is_segment_info_known (rtx orig, bool *is_readonly)
>> +{
>> + bool res = false;
>> +
>> + *is_readonly = false;
>> +
>> + if (GET_CODE (orig) == LABEL_REF)
>> + {
>> + res = true;
>> + *is_readonly = true;
>> + }
>
> Think this function would be easier to read with early returns.
>
>> + else if (SYMBOL_REF_P (orig))
>
> ...so "if" rather than "else if" here.
>
>> + {
>> + if (CONSTANT_POOL_ADDRESS_P (orig))
>> + {
>> + res = true;
>> + *is_readonly = true;
>> + }
>> + else if (SYMBOL_REF_LOCAL_P (orig)
>> + && !SYMBOL_REF_EXTERNAL_P (orig)
>> + && SYMBOL_REF_DECL (orig)
>> + && (!DECL_P (SYMBOL_REF_DECL (orig))
>> + || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
>> + {
>> + tree decl = SYMBOL_REF_DECL (orig);
>> + tree init = (TREE_CODE (decl) == VAR_DECL)
>> + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
>> + ? decl : 0;
>> + int reloc = 0;
>> + bool named_section, readonly;
>> +
>> + if (init && init != error_mark_node)
>> + reloc = compute_reloc_for_constant (init);
>> +
>> + named_section = TREE_CODE (decl) == VAR_DECL
>> + && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
>
> Here too I think it would be better to return false early.
>
> How much variation do you support here for named sections? E.g. can a
> linker script really put SECTION_WRITE sections in the text segment?
> Seems like there are some cases that could be handled.
>
> (Just asking, not suggesting you should change anything.)
>
>> + readonly = decl_readonly_section (decl, reloc);
>> +
>> + /* We don't know where the link script will put a named
>> + section, so return false in such a case. */
>> + res = !named_section;
>> +
>> + if (!named_section)
>> + *is_readonly = readonly;
>> + }
>> + else
>> + {
>> + /* We don't know. */
>> + res = false;
>> + }
>> + }
>> + else
>> + gcc_unreachable ();
>> +
>> + return res;
>> +}
>> +
>> /* Generate code to load the address of a static var when flag_pic is set. */
>> static rtx_insn *
>> arm_pic_static_addr (rtx orig, rtx reg)
>> {
>> rtx l1, labelno, offset_rtx;
>> + rtx_insn *insn;
>>
>> gcc_assert (flag_pic);
>>
>> - /* We use an UNSPEC rather than a LABEL_REF because this label
>> - never appears in the code stream. */
>> - labelno = GEN_INT (pic_labelno++);
>> - l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
>> - l1 = gen_rtx_CONST (VOIDmode, l1);
>> + bool is_readonly = false;
>> + bool info_known = false;
>>
>> - /* On the ARM the PC register contains 'dot + 8' at the time of the
>> - addition, on the Thumb it is 'dot + 4'. */
>> - offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
>> - offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
>> - UNSPEC_SYMBOL_OFFSET);
>> - offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
>> + if (TARGET_FDPIC
>> + && SYMBOL_REF_P (orig)
>> + && !SYMBOL_REF_FUNCTION_P (orig))
>> + info_known = arm_is_segment_info_known (orig, &is_readonly);
>
> Excess indendentation. Feels like it might be slightly simpler
> to handle SYMBOL_REF_FUNCTION_P in arm_is_segment_info_known,
> but I guess the idea is that it might not then be clear whether
> the caller is asking about a descriptor or the function itself.
>
>>
>> - return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
>> + if (TARGET_FDPIC
>> + && SYMBOL_REF_P (orig)
>> + && !SYMBOL_REF_FUNCTION_P (orig)
>> + && !info_known)
>> + {
>> + /* We don't know where orig is stored, so we have be
>> + pessimistic and use a GOT relocation. */
>> + rtx pat;
>> + rtx mem;
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> +
>> + pat = gen_calculate_pic_address (reg, pic_reg, orig);
>> +
>> + /* Make the MEM as close to a constant as possible. */
>> + mem = SET_SRC (pat);
>> + gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
>> + MEM_READONLY_P (mem) = 1;
>> + MEM_NOTRAP_P (mem) = 1;
>> +
>> + insn = emit_insn (pat);
>
> Think "pat = ..." onwards should be split out into a helper, since it's
> a cut-&-paste of the code in legitimize_pic_address.
>
>> + }
>> + else if (TARGET_FDPIC
>> + && SYMBOL_REF_P (orig)
>> + && (SYMBOL_REF_FUNCTION_P (orig)
>> + || (info_known && !is_readonly)))
>> + {
>> + /* We use the GOTOFF relocation. */
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> +
>> + rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
>> + emit_insn (gen_movsi (reg, l1));
>> + insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
>> + }
>> + else
>> + {
>> + /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
>> + PC-relative access. */
>> + /* We use an UNSPEC rather than a LABEL_REF because this label
>> + never appears in the code stream. */
>> + labelno = GEN_INT (pic_labelno++);
>> + l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
>> + l1 = gen_rtx_CONST (VOIDmode, l1);
>> +
>> + /* On the ARM the PC register contains 'dot + 8' at the time of the
>> + addition, on the Thumb it is 'dot + 4'. */
>> + offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
>> + offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
>> + UNSPEC_SYMBOL_OFFSET);
>> + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
>> +
>> + insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
>> + labelno));
>> + }
>> +
>> + return insn;
>> }
>>
>> /* Return nonzero if X is valid as an ARM state addressing register. */
>> @@ -16112,9 +16252,36 @@ get_jump_table_size (rtx_jump_table_data *insn)
>> return 0;
>> }
>>
>> +/* Emit insns to load the function address from FUNCDESC (an FDPIC
>> + function descriptor) into a register and the GOT address into the
>> + FDPIC register, returning an rtx for the register holding the
>> + function address. */
>> +
>> +rtx
>> +arm_load_function_descriptor (rtx funcdesc)
>> +{
>> + rtx fnaddr_reg = gen_reg_rtx (Pmode);
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
>> + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
>> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
>> +
>> + emit_move_insn (fnaddr_reg, fnaddr);
>> + /* The ABI requires the entry point address to be loaded first, so
>> + prevent the load from being moved after that of the GOT
>> + address. */
>
> Do you mean that the move insn above has to come before the
> pattern below? If so, I think that should be enforced by making this...
>
>> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
>> + gen_rtvec (2, pic_reg, gotaddr),
>> + UNSPEC_PIC_RESTORE);
>> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gotaddr);
>> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, pic_reg);
>> + emit_insn (par);
>> +
>> + return fnaddr_reg;
>> +}
>> +
>
> ...use fnaddr_reg.
>
> Does the instruction actually use pic_reg? We only get here for
> non-symbolic addresses after all.
>
> It seems simpler to make *restore_pic_register_after_call a named pattern
> and use gen_restore_pic_register_after_call instead.
>
>> /* Return the maximum amount of padding that will be inserted before
>> label LABEL. */
>> -
>> static HOST_WIDE_INT
>> get_label_padding (rtx label)
>> {
>> @@ -23069,9 +23236,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
>> && (!SYMBOL_REF_LOCAL_P (x)
>> || (SYMBOL_REF_DECL (x)
>> ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
>> - fputs ("(GOT)", asm_out_file);
>> + {
>> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
>> + fputs ("(GOTFUNCDESC)", asm_out_file);
>> + else
>> + fputs ("(GOT)", asm_out_file);
>> + }
>> else
>> - fputs ("(GOTOFF)", asm_out_file);
>> + {
>> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
>> + fputs ("(GOTOFFFUNCDESC)", asm_out_file);
>> + else
>> + {
>> + bool is_readonly;
>> +
>> + if (arm_is_segment_info_known (x, &is_readonly))
>> + fputs ("(GOTOFF)", asm_out_file);
>> + else
>> + fputs ("(GOT)", asm_out_file);
>> + }
>> + }
>> + }
>> +
>> + /* For FDPIC we also have to mark symbol for .data section. */
>> + if (TARGET_FDPIC
>> + && NEED_GOT_RELOC
>> + && flag_pic
>> + && !making_const_table
>> + && SYMBOL_REF_P (x))
>> + {
>> + if (SYMBOL_REF_FUNCTION_P (x))
>> + fputs ("(FUNCDESC)", asm_out_file);
>> }
>> fputc ('\n', asm_out_file);
>> return true;
>
> Do you expect to reach here for LABEL_REFs with TARGET_FDPIC? The second
> block of code tests for SYMBOL_REF_P but the first tests
> SYMBOL_REF_FUNCTION_P without checking SYMBOL_REF_P first.
>
> Can NEED_GOT_RELOC or flag_pic be false for TARGET_FDPIC?
> Is !flag_pic TARGET_FDPIC supported?
>
>> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
>> index 0aecd03..9036255 100644
>> --- a/gcc/config/arm/arm.md
>> +++ b/gcc/config/arm/arm.md
>> @@ -8127,6 +8127,23 @@
>> rtx callee, pat;
>> tree addr = MEM_EXPR (operands[0]);
>>
>> + /* Force FDPIC register (r9) before call. */
>> + if (TARGET_FDPIC)
>> + {
>> + /* No need to update r9 if calling a static function.
>> + In other words: set r9 for indirect or non-local calls. */
>> + callee = XEXP (operands[0], 0);
>> + if (!SYMBOL_REF_P (callee)
>> + || !SYMBOL_REF_LOCAL_P (callee)
>> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
>
> IMO it would be better to calculate this once rather than repeat
> it below.
>
>> + {
>> + emit_insn (gen_blockage ());
>
> Why's the blockage needed? Seems worth a comment.
>
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
>> + emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
>
> Is this use keeping the register live for the call? If so,
> I think it'd be better to attach it to the CALL_INSN_FUNCTION_USAGE
> instead.
>
>> + }
>> + }
>> +
>> /* In an untyped call, we can get NULL for operand 2. */
>> if (operands[2] == NULL_RTX)
>> operands[2] = const0_rtx;
>> @@ -8140,6 +8157,13 @@
>> : !REG_P (callee))
>> XEXP (operands[0], 0) = force_reg (Pmode, callee);
>>
>> + if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
>> + {
>> + /* Indirect call: set r9 with FDPIC value of callee. */
>> + XEXP (operands[0], 0)
>> + = arm_load_function_descriptor (XEXP (operands[0], 0));
>> + }
>> +
>> if (detect_cmse_nonsecure_call (addr))
>> {
>> pat = gen_nonsecure_call_internal (operands[0], operands[1],
>
> Redundant braces.
>
>> @@ -8151,10 +8175,38 @@
>> pat = gen_call_internal (operands[0], operands[1], operands[2]);
>> arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
>> }
>> +
>> + /* Restore FDPIC register (r9) after call. */
>> + if (TARGET_FDPIC)
>> + {
>> + /* No need to update r9 if calling a static function. */
>> + if (!SYMBOL_REF_P (callee)
>> + || !SYMBOL_REF_LOCAL_P (callee)
>> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
>> + {
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
>> + emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
>> + emit_insn (gen_blockage ());
>> + }
>> + }
>> DONE;
>> }"
>> )
>
> What's the general assumption about the validity of r9? Seems odd that
> we need to load this value both before and after the call.
>
>>
>> +(define_insn "*restore_pic_register_after_call"
>> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
>> + (match_operand:SI 1 "nonimmediate_operand" "r,m")]
>> + UNSPEC_PIC_RESTORE)
>> + (use (match_dup 1))
>> + (clobber (match_dup 0))])
>> + ]
>> + ""
>> + "@
>> + mov\t%0, %1
>> + ldr\t%0, %1"
>> +)
>> +
>> (define_expand "call_internal"
>> [(parallel [(call (match_operand 0 "memory_operand" "")
>> (match_operand 1 "general_operand" ""))
>
> Since operand 0 is significant after the instruction, I think this
> should be:
>
> (define_insn "*restore_pic_register_after_call"
> [(set (match_operand:SI 0 "s_register_operand" "+r,r")
> (unspec:SI [(match_dup 0)
> (match_operand:SI 1 "nonimmediate_operand" "r,m")]
> UNSPEC_PIC_RESTORE))]
> ...
>
> The (use (match_dup 1)) looks redundant, since the unspec itself
> uses operand 1.
>
When I try that, I have cases where the restore instruction is discarded, when the call happens just before function return. Since r9 is caller-saved, it should be restored but after dse2 the dumps say:
(insn (set (reg:SI 9 r9)
(unspec:SI [
(reg:SI 9 r9)
(reg:SI 4 r4 [121])
] UNSPEC_PIC_RESTORE))
(expr_list:REG_UNUSED (reg:SI 9 r9) (nil))))
and this is later removed by cprop_hardreg (which says the exit block uses r4, sp, and lr: should I make it use r9?)
Thanks,
Christophe
>> @@ -8215,6 +8267,30 @@
>> rtx pat, callee;
>> tree addr = MEM_EXPR (operands[1]);
>>
>> + /* Force FDPIC register (r9) before call. */
>> + if (TARGET_FDPIC)
>> + {
>> + /* No need to update the FDPIC register (r9) if calling a static function.
>> + In other words: set r9 for indirect or non-local calls. */
>> + callee = XEXP (operands[1], 0);
>> + if (!SYMBOL_REF_P (callee)
>> + || !SYMBOL_REF_LOCAL_P (callee)
>> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
>> + {
>> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
>> + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + rtx initial_fdpic_reg =
>> + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
>> +
>> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
>> + gen_rtvec (2, fdpic_reg, initial_fdpic_reg),
>> + UNSPEC_PIC_RESTORE);
>> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
>> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
>> + emit_insn (par);
>> + }
>> + }
>> +
>
> It's not obvious why this code is different from the call-without-value
> case above, which doesn't use UNSPEC_PIC_RESTORE. I think it should be
> split out into a helper function that's used for both call and call_value.
>
> I think it would also be good to have more comments about what
> conditions the UNSPEC_PIC_RESTORE pattern is enforcing.
>
> Thanks,
> Richard
> .
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
` (21 preceding siblings ...)
2019-05-23 12:46 ` [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
@ 2019-08-29 14:54 ` Christophe Lyon
2019-08-29 16:29 ` Christophe Lyon
22 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 14:54 UTC (permalink / raw)
To: gcc-patches
Hi,
On 15/05/2019 14:39, Christophe Lyon wrote:
> Hello,
>
> This patch series implements the GCC contribution of the FDPIC ABI for
> ARM targets.
>
> This ABI enables to run Linux on ARM MMU-less cores and supports
> shared libraries to reduce the memory footprint.
>
> Without MMU, text and data segments relative distances are different
> from one process to another, hence the need for a dedicated FDPIC
> register holding the start address of the data segment. One of the
> side effects is that function pointers require two words to be
> represented: the address of the code, and the data segment start
> address. These two words are designated as "Function Descriptor",
> hence the "FD PIC" name.
>
> On ARM, the FDPIC register is r9 [1], and the target name is
> arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
> ABI and the BFLAT file format; it does not support code sharing.
> The -mfdpic option is enabled by default, and -mno-fdpic should be
> used to build the Linux kernel.
>
> This work was developed some time ago by STMicroelectronics, and was
> presented during Linaro Connect SFO15 (September 2015). You can watch
> the discussion and read the slides [2].
> This presentation was related to the toolchain published on github [3],
> which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
> and qemu-2.3.0, and for which pre-built binaries are available [3].
>
> The ABI itself is described in details in [1].
>
> Our Linux kernel patches have been updated and committed by Nicolas
> Pitre (Linaro) in July 2017. They are required so that the loader is
> able to handle this new file type. Indeed, the ELF files are tagged
> with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
> well as the new relocations involved.
>
> The binutils, QEMU and uclibc-ng patch series have been merged a few
> months ago. [4][5][6]
>
> This series provides support for architectures that support ARM and/or
> Thumb-2 and has been tested on arm-linux-gnueabi without regression,
> as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
> a few more failures than arm-linux-gnueabi, but is quite functional.
>
> I have also booted an STM32 board (stm32f469) which uses a cortex-m4
> with linux-4.20.17 and ran successfully several tools.
>
> Are the GCC patches OK for inclusion in master?
>
I have addressed the comments I received on v5, and I am going to post updated versions of the patches that needed changes as follow-ups in this thread. I hope this will help reviewers as I will provide answers and updated patches next to their comments. After that, I will rebase the whole series and send it as v6 if that helps (several testsuite patches have already been approved as-is, but committing them now would change the patch numbering, thus possibly confusing reviewers).
However, note that several patches in the series haven't received feedback yet, so this is a ping for them :-)
[ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions
[ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support.
[ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame
[ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
[ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
Thanks,
Christophe
> Changes between v4 and v5:
> - rebased on top of recent gcc-10 master (April 26th, 2019)
> - fixed handling of stack-protector combined patterns in FDPIC mode
>
> Changes between v3 and v4:
>
> - improved documentation (patch 1)
> - emit an error message (sorry) if the target architecture does not
> support arm nor thumb-2 modes (patch 4)
> - handle Richard's comments on patch 4 (comments, unspec)
> - added .align directive (patch 5)
> - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
> - code factorization in patch 7
> - typos/internal function name in patch 8
> - improved patch 12
> - dropped patch 16
> - patch 20 introduces arm_arch*_thumb_ok effective targets to help
> skip some tests
> - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
> new tests, but a few regressions
> (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
> - I compiled and executed several LTP tests to exercise pthreads and signals
> - I wrote and executed a simple testcase to change the interaction
> with __kernel_cmpxchg (ie. call the kernel helper rather than use an
> implementation in libgcc as requested by Richard)
>
> Changes between v2 and v3:
> - added doc entry for -mfdpic new option
> - took Kyrill's comments into account (use "Armv7" instead of "7",
> code factorization, use preprocessor instead of hard-coding "r9",
> remove leftover code for thumb1 support, fixed comments)
> - rebase over recent trunk
> - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
> 14 (rebase), 19 (rebase)
>
> Changes between v1 and v2:
> - fix GNU coding style
> - exit with an error for pre-Armv7
> - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
> - remove unsupported attempts of pre-Armv7/thumb1 support
> - add instructions in comments next to opcodes
> - merge patches 11 and 13
> - fixed protected visibility handling in patch 8
> - merged legitimize_tls_address_fdpic and
> legitimize_tls_address_not_fdpic as requested
>
> Thanks,
>
> Christophe.
>
>
> [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
> [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
> [3] https://github.com/mickael-guene/fdpic_manifest
> [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
> [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
> [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
>
> Christophe Lyon (21):
> [ARM] FDPIC: Add -mfdpic option support
> [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
> [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
> [ARM] FDPIC: Add support for FDPIC for arm architecture
> [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
> [ARM] FDPIC: Add support for c++ exceptions
> [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
> [ARM] FDPIC: Enforce local/global binding for function descriptors
> [ARM] FDPIC: Add support for taking address of nested function
> [ARM] FDPIC: Implement TLS support.
> [ARM] FDPIC: Add support to unwind FDPIC signal frame
> [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
> [ARM][testsuite] FDPIC: Skip unsupported tests
> [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
> [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
> [ARM][testsuite] FDPIC: Handle *-*-uclinux*
> [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
> [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
> [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
> FDPIC
> [ARM] FDPIC: Handle stack-protector combined patterns
>
> config/futex.m4 | 2 +-
> config/tls.m4 | 2 +-
> gcc/config.gcc | 13 +-
> gcc/config/arm/arm-c.c | 2 +
> gcc/config/arm/arm-protos.h | 1 +
> gcc/config/arm/arm.c | 485 ++++++++++++++++++---
> gcc/config/arm/arm.h | 16 +-
> gcc/config/arm/arm.md | 151 ++++++-
> gcc/config/arm/arm.opt | 4 +
> gcc/config/arm/bpabi.h | 4 +-
> gcc/config/arm/linux-eabi.h | 7 +-
> gcc/config/arm/uclinuxfdpiceabi.h | 53 +++
> gcc/config/arm/unspecs.md | 1 +
> gcc/doc/invoke.texi | 20 +-
> gcc/ginclude/unwind-arm-common.h | 2 +-
> gcc/testsuite/g++.dg/abi/forced.C | 2 +-
> gcc/testsuite/g++.dg/abi/guard2.C | 2 +-
> gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +-
> gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +-
> gcc/testsuite/g++.dg/ext/sync-4.C | 2 +-
> gcc/testsuite/g++.dg/ipa/comdat.C | 2 +-
> gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +-
> gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +-
> gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +-
> gcc/testsuite/g++.dg/other/anon5.C | 1 +
> gcc/testsuite/g++.dg/tls/pr79288.C | 2 +-
> gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +-
> gcc/testsuite/gcc.dg/20020312-2.c | 1 +
> gcc/testsuite/gcc.dg/20041106-1.c | 2 +-
> gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +-
> gcc/testsuite/gcc.dg/cleanup-10.c | 2 +-
> gcc/testsuite/gcc.dg/cleanup-11.c | 2 +-
> gcc/testsuite/gcc.dg/cleanup-8.c | 2 +-
> gcc/testsuite/gcc.dg/cleanup-9.c | 2 +-
> gcc/testsuite/gcc.dg/const-1.c | 2 +-
> gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +-
> gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +-
> gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +-
> gcc/testsuite/gcc.dg/noreturn-8.c | 2 +-
> gcc/testsuite/gcc.dg/pr33826.c | 3 +-
> gcc/testsuite/gcc.dg/pr39323-1.c | 2 +-
> gcc/testsuite/gcc.dg/pr39323-2.c | 2 +-
> gcc/testsuite/gcc.dg/pr39323-3.c | 2 +-
> gcc/testsuite/gcc.dg/pr65780-1.c | 2 +-
> gcc/testsuite/gcc.dg/pr65780-2.c | 2 +-
> gcc/testsuite/gcc.dg/pr67338.c | 2 +-
> gcc/testsuite/gcc.dg/pr78185.c | 2 +-
> gcc/testsuite/gcc.dg/pr83100-1.c | 2 +-
> gcc/testsuite/gcc.dg/pr83100-4.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +-
> gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +-
> gcc/testsuite/gcc.dg/strncmp-2.c | 2 +-
> gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +-
> gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +-
> gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +-
> gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +-
> gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +-
> gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +-
> gcc/testsuite/gcc.target/arm/20051215-1.c | 1 +
> .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 +
> .../gcc.target/arm/attr-unaligned-load-ice.c | 1 +
> gcc/testsuite/gcc.target/arm/attr_arm-err.c | 1 +
> gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 +
> gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 +
> gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +-
> gcc/testsuite/gcc.target/arm/eliminate.c | 2 +-
> gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 +
> gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 +
> gcc/testsuite/gcc.target/arm/g2.c | 1 +
> gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +-
> gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +-
> gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +-
> gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +-
> gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +-
> gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +-
> gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 +
> gcc/testsuite/gcc.target/arm/mmx-1.c | 1 +
> gcc/testsuite/gcc.target/arm/pr19599.c | 1 +
> gcc/testsuite/gcc.target/arm/pr40887.c | 1 +
> gcc/testsuite/gcc.target/arm/pr43597.c | 2 +-
> gcc/testsuite/gcc.target/arm/pr43698.c | 4 +-
> gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +-
> gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +-
> gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +-
> gcc/testsuite/gcc.target/arm/pr59858.c | 1 +
> gcc/testsuite/gcc.target/arm/pr61948.c | 1 +
> gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 +
> gcc/testsuite/gcc.target/arm/pr66912.c | 2 +-
> gcc/testsuite/gcc.target/arm/pr70830.c | 3 +-
> gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 +
> gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 +
> gcc/testsuite/gcc.target/arm/pr79058.c | 1 +
> gcc/testsuite/gcc.target/arm/pr83712.c | 1 +
> .../gcc.target/arm/pragma_arch_switch_2.c | 1 +
> gcc/testsuite/gcc.target/arm/scd42-1.c | 1 +
> gcc/testsuite/gcc.target/arm/scd42-2.c | 1 +
> gcc/testsuite/gcc.target/arm/scd42-3.c | 1 +
> gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 +
> gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +-
> gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +-
> gcc/testsuite/gcc.target/arm/synchronize.c | 2 +-
> gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 +
> gcc/testsuite/gcc.target/arm/tlscall.c | 1 +
> gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 +
> gcc/testsuite/lib/target-supports.exp | 10 +
> libatomic/configure | 8 +-
> libatomic/configure.tgt | 2 +-
> libgcc/config.host | 4 +-
> libgcc/config/arm/linux-atomic.c | 55 ++-
> libgcc/config/arm/unwind-arm.c | 5 +
> libgcc/config/arm/unwind-arm.h | 31 +-
> libgcc/crtstuff.c | 18 +
> libgcc/unwind-arm-common.inc | 216 +++++++++
> libgcc/unwind-pe.h | 17 +
> libitm/configure | 20 +-
> libitm/configure.tgt | 2 +-
> libsanitizer/configure.tgt | 3 +
> libstdc++-v3/acinclude.m4 | 12 +-
> libstdc++-v3/configure | 36 +-
> libstdc++-v3/configure.host | 6 +-
> libstdc++-v3/libsupc++/eh_personality.cc | 10 +-
> libtool.m4 | 14 +-
> 156 files changed, 1233 insertions(+), 219 deletions(-)
> create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support
2019-07-16 10:18 ` Richard Sandiford
@ 2019-08-29 15:08 ` Christophe Lyon
2019-08-30 10:06 ` Richard Sandiford
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:08 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
[-- Attachment #1: Type: text/plain, Size: 2815 bytes --]
On 16/07/2019 12:11, Richard Sandiford wrote:
> [This isn't really something that should be reviewed under global
> reviewership, but if it's either that or nothing, I'll do it anyway...]
>
> Christophe Lyon <christophe.lyon@st.com> writes:
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>> Mickaël Guêné <mickael.guene@st.com>
>>
>> gcc/
>> * config/arm/arm.opt: Add -mfdpic option.
>> * doc/invoke.texi: Add documentation for -mfdpic.
>>
>> Change-Id: I0eabd1d11c9406fd4a43c4333689ebebbfcc4fe8
>>
>> diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
>> index 9067d49..2ed3bd5 100644
>> --- a/gcc/config/arm/arm.opt
>> +++ b/gcc/config/arm/arm.opt
>> @@ -306,3 +306,7 @@ Cost to assume for a branch insn.
>> mgeneral-regs-only
>> Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
>> Generate code which uses the core registers only (r0-r14).
>> +
>> +mfdpic
>> +Target Report Mask(FDPIC)
>> +Enable Function Descriptor PIC mode.
>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
>> index 29585cf..805d7cc 100644
>> --- a/gcc/doc/invoke.texi
>> +++ b/gcc/doc/invoke.texi
>> @@ -703,7 +703,8 @@ Objective-C and Objective-C++ Dialects}.
>> -mrestrict-it @gol
>> -mverbose-cost-dump @gol
>> -mpure-code @gol
>> --mcmse}
>> +-mcmse @gol
>> +-mfdpic}
>>
>> @emph{AVR Options}
>> @gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol
>> @@ -17912,6 +17913,23 @@ MOVT instruction.
>> Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
>> Development Tools Engineering Specification", which can be found on
>> @url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
>> +
>> +@item -mfdpic
>> +@itemx -mno-fdpic
>> +@opindex mfdpic
>> +@opindex mno-fdpic
>> +Select the FDPIC ABI, which uses function descriptors to represent
>
> Maybe "64-bit function descriptors"? Just a suggestion, might not be useful.
>
> OK with that change, thanks.
OK, here is a new version, where I added a few words to explain that -static
is not supported.
Thanks,
Christophe
>
> Richard
>
>> +pointers to functions. When the compiler is configured for
>> +@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default
>> +and implies @option{-fPIE} if none of the PIC/PIE-related options is
>> +provided. On other targets, it only enables the FDPIC-specific code
>> +generation features, and the user should explicitly provide the
>> +PIC/PIE-related options as needed.
>> +
>> +The opposite @option{-mno-fdpic} option is useful (and required) to
>> +build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi})
>> +toolchain as the one used to build the userland programs.
>> +
>> @end table
>>
>> @node AVR Options
> .
>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-ARM-FDPIC-Add-mfdpic-option-support.patch --]
[-- Type: text/x-patch; name="0001-ARM-FDPIC-Add-mfdpic-option-support.patch", Size: 2673 bytes --]
From c936684e2b77ff5716bd8b67c617dcad088c72e0 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 8 Feb 2018 10:44:32 +0100
Subject: [ARM/FDPIC v6 01/24] [ARM] FDPIC: Add -mfdpic option support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.opt: Add -mfdpic option.
* doc/invoke.texi: Add documentation for -mfdpic.
Change-Id: I05b98d6ae87c2b3fc04dd7fba415c730accdf33e
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 9067d49..2ed3bd5 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -306,3 +306,7 @@ Cost to assume for a branch insn.
mgeneral-regs-only
Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
Generate code which uses the core registers only (r0-r14).
+
+mfdpic
+Target Report Mask(FDPIC)
+Enable Function Descriptor PIC mode.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 29585cf..b77fa06 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -703,7 +703,8 @@ Objective-C and Objective-C++ Dialects}.
-mrestrict-it @gol
-mverbose-cost-dump @gol
-mpure-code @gol
--mcmse}
+-mcmse @gol
+-mfdpic}
@emph{AVR Options}
@gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol
@@ -17912,6 +17913,27 @@ MOVT instruction.
Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
Development Tools Engineering Specification", which can be found on
@url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
+
+@item -mfdpic
+@itemx -mno-fdpic
+@opindex mfdpic
+@opindex mno-fdpic
+Select the FDPIC ABI, which uses 64-bit function descriptors to
+represent pointers to functions. When the compiler is configured for
+@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default
+and implies @option{-fPIE} if none of the PIC/PIE-related options is
+provided. On other targets, it only enables the FDPIC-specific code
+generation features, and the user should explicitly provide the
+PIC/PIE-related options as needed.
+
+Note that static linking is not supported because it would still
+involve the dynamic linker when the program self-relocates. If such
+behaviour is acceptable, use -static and -Wl,-dynamic-linker options.
+
+The opposite @option{-mno-fdpic} option is useful (and required) to
+build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi})
+toolchain as the one used to build the userland programs.
+
@end table
@node AVR Options
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-07-16 10:38 ` Richard Sandiford
2019-07-16 20:00 ` Rich Felker
2019-08-01 10:13 ` Christophe Lyon
@ 2019-08-29 15:14 ` Christophe Lyon
2019-08-30 9:40 ` Richard Sandiford
2 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:14 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches, richard.sandiford
[-- Attachment #1: Type: text/plain, Size: 6726 bytes --]
On 16/07/2019 12:34, Richard Sandiford wrote:
> Christophe Lyon <christophe.lyon@st.com> writes:
>> On 22/05/2019 10:45, Christophe Lyon wrote:
>>> On Wed, 22 May 2019 at 10:39, Szabolcs Nagy <Szabolcs.Nagy@arm.com> wrote:
>>>>
>>>> On 21/05/2019 16:28, Christophe Lyon wrote:
>>>>> --- a/gcc/config/arm/linux-eabi.h
>>>>> +++ b/gcc/config/arm/linux-eabi.h
>>>>> @@ -89,7 +89,7 @@
>>>>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
>>>>> #endif
>>>>> #define MUSL_DYNAMIC_LINKER \
>>>>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
>>>>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E
>>>>> "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>>>>
>>>> the line break seems wrong (either needs \ or no newline)
>>>>
>>> Sorry, that's a mailer artifact.
>>>
>>>>> --- a/libsanitizer/configure.tgt
>>>>> +++ b/libsanitizer/configure.tgt
>>>>> @@ -45,7 +45,7 @@ case "${target}" in
>>>>> ;;
>>>>> sparc*-*-solaris2.11*)
>>>>> ;;
>>>>> - arm*-*-uclinuxfdpiceabi)
>>>>> + arm*-*-fdpiceabi)
>>>>
>>>> should be *fdpiceabi instead of *-fdpiceabi i think.
>>>
>>> Indeed, thanks
>>> .
>>>
>> FWIW, here is the updated patch:
>> - handles musl -fdpic suffix
>> - disables sanitizers for arm*-*-fdpiceabi
>> - does not handle -static in a special way, so using -static produces binaries that request the non-existing /usr/lib/ld.so.1, thus effectively making -static broken/unsupported (this does lead to a few more FAIL in the testsuite)
>>
>> The plan is to work -static-pie later, as discussed.
>
> Could you make -static without -mno-fdpic an error via a %e spec,
> so that the failure mode is a bit more user-friendly?
>
> I realise this isn't your preferred option, sorry.
>
As discussed later, I didn't because I couldn't find a way
to catch linker (-Wl,XXX) options in the specs, and I prefer
to keep the possibility to generic a "static" binary using
"-static -Wl,-dynamic-linker XXX"
However, I've also a new patch in the series to disable tests that involve -static, attached here.
>> diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
>> index e1bacf4..6c25a1a 100644
>> --- a/gcc/config/arm/bpabi.h
>> +++ b/gcc/config/arm/bpabi.h
>> @@ -55,6 +55,8 @@
>> #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
>> "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
>>
>> +#define TARGET_FDPIC_ASM_SPEC ""
>
> Formatting nit: should be a single space before ""
>
OK
>> +
>> #define BE8_LINK_SPEC \
>> "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \
>> " %{mbig-endian:big}" \
>> @@ -64,7 +66,7 @@
>> /* Tell the assembler to build BPABI binaries. */
>> #undef SUBTARGET_EXTRA_ASM_SPEC
>> #define SUBTARGET_EXTRA_ASM_SPEC \
>> - "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
>> + "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC TARGET_FDPIC_ASM_SPEC
>
> Long line.
>
OK
>> diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
>> index 66ec0ea..d7cc923 100644
>> --- a/gcc/config/arm/linux-eabi.h
>> +++ b/gcc/config/arm/linux-eabi.h
>> @@ -89,7 +89,7 @@
>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
>> #endif
>> #define MUSL_DYNAMIC_LINKER \
>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>>
>> /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
>> use the GNU/Linux version, not the generic BPABI version. */
>
> Rich, could you confirm that this is (going to be?) the correct name?
>
This was confirmed by Rich.
>> diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
>> index 66ec0ea..d7cc923 100644
>> --- a/gcc/config/arm/linux-eabi.h
>> +++ b/gcc/config/arm/linux-eabi.h
>> @@ -89,7 +89,7 @@
>> #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
>> #endif
>> #define MUSL_DYNAMIC_LINKER \
>> - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
>> + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
>>
>> /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
>> use the GNU/Linux version, not the generic BPABI version. */
>> @@ -101,11 +101,14 @@
>> #undef ASAN_CC1_SPEC
>> #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
>>
>> +#define FDPIC_CC1_SPEC ""
>> +
>> #undef CC1_SPEC
>> #define CC1_SPEC \
>> - LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
>> + LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
>> + FDPIC_CC1_SPEC, \
>> GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
>> - ANDROID_CC1_SPEC)
>> + ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
>>
>> #define CC1PLUS_SPEC \
>> LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
>
> Does it make sense to add FDPIC_CC1_SPEC to the Android version?
>
No, now fixed.
>> diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
>> new file mode 100644
>> index 0000000..3180bcd
>> --- /dev/null
>> +++ b/gcc/config/arm/uclinuxfdpiceabi.h
>> @@ -0,0 +1,52 @@
>> +/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
>> + Copyright (C) 2018 Free Software Foundation, Inc.
>> + Contributed by STMicroelectronics.
>> +
>> + This file is part of GCC.
>> +
>> + GCC is free software; you can redistribute it and/or modify it
>> + under the terms of the GNU General Public License as published
>> + by the Free Software Foundation; either version 3, or (at your
>> + option) any later version.
>> +
>> + GCC is distributed in the hope that it will be useful, but WITHOUT
>> + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
>> + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
>> + License for more details.
>> +
>> + You should have received a copy of the GNU General Public License
>> + along with GCC; see the file COPYING3. If not see
>> + <http://www.gnu.org/licenses/>. */
>> +
>> +/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
>> + which also means we produce PIE code by default. */
>> +#undef FDPIC_CC1_SPEC
>> +#define FDPIC_CC1_SPEC \
>> + "%{!mno-fdpic:-mfdpic %{!no-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
>
> Looks like the !no-PIE should be !fno-PIE.
>
Thanks for catching this.
>> +/* Add --fdpic assembler flag by default. */
>> +#undef TARGET_FDPIC_ASM_SPEC
>> +#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
>
> Single space before the ".
>
OK
> Thanks,
> Richard
> .
>
Thanks a lot,
Christophe
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0003-ARM-FDPIC-Force-FDPIC-related-options-unless-mno-fdp.patch --]
[-- Type: text/x-patch; name="0003-ARM-FDPIC-Force-FDPIC-related-options-unless-mno-fdp.patch", Size: 7028 bytes --]
From 5a5c74bcfc349af51abf963e1005cfab1a827fcf Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 8 Feb 2018 11:11:56 +0100
Subject: [ARM/FDPIC v6 03/24] [ARM] FDPIC: Force FDPIC related options unless
-mno-fdpic is provided
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.
We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.
At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that static link is
not supported as it requires specifying the dynamic linker because the
executable still has to relocate itself at startup.
We also force 'now' binding since lazy binding is not supported.
We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
(CC1_SPEC): Use FDPIC_CC1_SPEC.
(MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
* config/arm/uclinuxfdpiceabi.h: New file.
libsanitizer/
* configure.tgt (arm*-*-*fdpiceabi): Sanitizers are
unsupported in this configuration.
Change-Id: I74ac1fbb2e809e864d2b0acce66b173e76bcf92b
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 67780fb..495cbc2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1177,6 +1177,11 @@ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
esac
tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi"
tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h arm/arm.h"
+ case $target in
+ arm*-*-uclinuxfdpiceabi)
+ tm_file="$tm_file arm/uclinuxfdpiceabi.h"
+ ;;
+ esac
# Generation of floating-point instructions requires at least ARMv5te.
if [ "$with_float" = "hard" -o "$with_float" = "softfp" ] ; then
target_cpu_cname="arm10e"
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index e1bacf4..75d9a99 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -55,6 +55,8 @@
#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
"|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
+#define TARGET_FDPIC_ASM_SPEC ""
+
#define BE8_LINK_SPEC \
"%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \
" %{mbig-endian:big}" \
@@ -64,7 +66,8 @@
/* Tell the assembler to build BPABI binaries. */
#undef SUBTARGET_EXTRA_ASM_SPEC
#define SUBTARGET_EXTRA_ASM_SPEC \
- "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+ "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC \
+ TARGET_FDPIC_ASM_SPEC
#ifndef SUBTARGET_EXTRA_LINK_SPEC
#define SUBTARGET_EXTRA_LINK_SPEC ""
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 66ec0ea..b348971 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -89,7 +89,7 @@
#define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
#endif
#define MUSL_DYNAMIC_LINKER \
- "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
+ "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
/* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
use the GNU/Linux version, not the generic BPABI version. */
@@ -101,9 +101,12 @@
#undef ASAN_CC1_SPEC
#define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
+#define FDPIC_CC1_SPEC ""
+
#undef CC1_SPEC
#define CC1_SPEC \
- LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
+ LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
+ FDPIC_CC1_SPEC, \
GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \
ANDROID_CC1_SPEC)
diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
new file mode 100644
index 0000000..2d0c04b
--- /dev/null
+++ b/gcc/config/arm/uclinuxfdpiceabi.h
@@ -0,0 +1,54 @@
+/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
+ Copyright (C) 2018 Free Software Foundation, Inc.
+ Contributed by STMicroelectronics.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
+ which also means we produce PIE code by default. */
+#undef FDPIC_CC1_SPEC
+#define FDPIC_CC1_SPEC \
+ "%{!mno-fdpic:-mfdpic %{!fno-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}"
+
+/* Add --fdpic assembler flag by default. */
+#undef TARGET_FDPIC_ASM_SPEC
+#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}"
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+ config.gcc for big endian configurations. */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_FDPIC_LINKER_EMULATION "armelfb_linux_fdpiceabi"
+#else
+#define TARGET_FDPIC_LINKER_EMULATION "armelf_linux_fdpiceabi"
+#endif
+
+/* Unless we generate a shared library or a relocatable object, we
+ force -pie. */
+/* -static is not supported, because we have to define the
+ dynamic-linker, as we have some relocations to resolve at load
+ time. We do not generate an error in case the user explictly passes
+ the -dynamic-linker option to the linker. */
+#undef SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC \
+ "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \
+ "%{!shared:%{!r: -pie}} }" \
+ "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \
+ "%{!r:%{!mno-fdpic: -z now}}"
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \
+ LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC)
diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
index b241ddb..34b21f8 100644
--- a/libsanitizer/configure.tgt
+++ b/libsanitizer/configure.tgt
@@ -45,6 +45,9 @@ case "${target}" in
;;
sparc*-*-solaris2.11*)
;;
+ arm*-*-*fdpiceabi)
+ UNSUPPORTED=1
+ ;;
arm*-*-linux*)
;;
mips*64*-*-linux*)
--
2.6.3
[-- Attachment #3: 0022-ARM-testsuite-FDPIC-Skip-tests-that-require-static-s.patch --]
[-- Type: text/x-patch, Size: 1094 bytes --]
From b3b1fef359d8fa75a6e06886c5dad7d58e1e5b84 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 29 Aug 2019 13:13:02 +0000
Subject: [ARM/FDPIC v6 22/24] [ARM][testsuite] FDPIC: Skip tests that require
-static support
Since FDPIC does not support -static, skip the related tests.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_static): Disable
for ARM FDPIC target.
Change-Id: I119d0541e53f2f1e531540b20e7bc47d8338d89a
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 3f091c5..0c1ddcf 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1070,6 +1070,9 @@ proc check_effective_target_pe_aligned_commons {} {
# Return 1 if the target supports -static
proc check_effective_target_static {} {
+ if { [istarget arm*-*-uclinuxfdpiceabi] } {
+ return 0;
+ }
return [check_no_compiler_messages static executable {
int main (void) { return 0; }
} "-static"]
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-07-12 7:44 ` Richard Sandiford
2019-07-12 13:25 ` Christophe Lyon
@ 2019-08-29 15:14 ` Christophe Lyon
2019-08-30 9:30 ` Richard Sandiford
2019-08-30 14:40 ` Jonathan Wakely
1 sibling, 2 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:14 UTC (permalink / raw)
To: gcc-patches, richard.sandiford, libstdc++
[-- Attachment #1: Type: text/plain, Size: 4979 bytes --]
On 12/07/2019 08:49, Richard Sandiford wrote:
> Christophe Lyon <christophe.lyon@st.com> writes:
>> The new arm-uclinuxfdpiceabi target behaves pretty much like
>> arm-linux-gnueabi. In order the enable the same set of features, we
>> have to update several configure scripts that generally match targets
>> like *-*-linux*: in most places, we add *-uclinux* where there is
>> already *-linux*, or uclinux* when there is already linux*.
>>
>> In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
>> because there is already a different behaviour for *-*uclinux* target.
>>
>> In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
>> libraries support is required, as uclinux does not guarantee that.
>>
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>
>> config/
>> * futex.m4: Handle *-uclinux*.
>> * tls.m4 (GCC_CHECK_TLS): Likewise.
>>
>> gcc/
>> * config.gcc: Handle *-*-uclinuxfdpiceabi.
>>
>> libatomic/
>> * configure.tgt: Handle arm*-*-uclinux*.
>> * configure: Regenerate.
>>
>> libgcc/
>> * config.host: Handle *-*-uclinuxfdpiceabi.
>>
>> libitm/
>> * configure.tgt: Handle *-*-uclinux*.
>> * configure: Regenerate.
>>
>> libstdc++-v3/
>> * acinclude.m4: Handle uclinux*.
>> * configure: Regenerate.
>> * configure.host: Handle uclinux*
>>
>> * libtool.m4: Handle uclinux*.
>
> Has the libtool.m4 patch been submitted to upstream libtool?
> I think this is supposed to be handled by submitting there first
> and then cherry-picking into gcc, so that the change isn't lost
> by a future import.
>
I added a comment to libtool.m4 about this.
>> [...]
>>
>> diff --git a/config/tls.m4 b/config/tls.m4
>> index 1a5fc59..a487aa4 100644
>> --- a/config/tls.m4
>> +++ b/config/tls.m4
>> @@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
>> dnl Shared library options may depend on the host; this check
>> dnl is only known to be needed for GNU/Linux.
>> case $host in
>> - *-*-linux*)
>> + *-*-linux* | -*-uclinux*)
>> LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
>> ;;
>> esac
>
> Is this right for all uclinux targets?
I don't think so, now restricted to -*-uclinuxfdpic*
>
>> diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
>> index 84258d8..cb0fdc5 100644
>> --- a/libstdc++-v3/acinclude.m4
>> +++ b/libstdc++-v3/acinclude.m4
>
> It'd probably be worth splitting out the libstdc++-v3 bits and
> submitting them separately, cc:ing libstdc++@gcc.gnu.org. But...
I've now split the patch into two parts (both attached here)
>
>> @@ -1404,7 +1404,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
>> ac_has_nanosleep=yes
>> ac_has_sched_yield=yes
>> ;;
>> - gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
>> + gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
>> AC_MSG_CHECKING([for at least GNU libc 2.17])
>> AC_TRY_COMPILE(
>> [#include <features.h>],
>
> is this the right thing to do? It seems odd to be testing the glibc
> version for uclibc.
>
> Do you want to support multiple possible settings of
> ac_has_clock_monotonic and ac_has_clock_realtime? Or could you just
> hard-code the values, given particular baseline assumptions about the
> version of uclibc etc.? Hard-coding would then make....
>
>> @@ -1526,7 +1526,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
>>
>> if test x"$ac_has_clock_monotonic" != x"yes"; then
>> case ${target_os} in
>> - linux*)
>> + linux* | uclinux*)
>> AC_MSG_CHECKING([for clock_gettime syscall])
>> AC_TRY_COMPILE(
>> [#include <unistd.h>
>
> ...this redundant.
>
Right, now fixed.
>> @@ -2415,7 +2415,7 @@ AC_DEFUN([GLIBCXX_ENABLE_CLOCALE], [
>> # Default to "generic".
>> if test $enable_clocale_flag = auto; then
>> case ${target_os} in
>> - linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
>> + linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
>> enable_clocale_flag=gnu
>> ;;
>> darwin*)
>
> This too seems to be choosing a glibc setting for a uclibc target.
Indeed.
>
>> @@ -2661,7 +2661,7 @@ AC_DEFUN([GLIBCXX_ENABLE_ALLOCATOR], [
>> # Default to "new".
>> if test $enable_libstdcxx_allocator_flag = auto; then
>> case ${target_os} in
>> - linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
>> + linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
>> enable_libstdcxx_allocator_flag=new
>> ;;
>> *)
>
> The full case is:
>
> # Probe for host-specific support if no specific model is specified.
> # Default to "new".
> if test $enable_libstdcxx_allocator_flag = auto; then
> case ${target_os} in
> linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
> enable_libstdcxx_allocator_flag=new
> ;;
> *)
> enable_libstdcxx_allocator_flag=new
> ;;
> esac
> fi
>
> which looks a bit redundant :-)
Right :-)
Thanks,
Christophe
>
> Thanks,
> Richard
> .
>
[-- Attachment #2: 0002-ARM-FDPIC-Handle-arm-uclinuxfdpiceabi-in-configure-s.patch --]
[-- Type: text/x-patch, Size: 12759 bytes --]
From 81c84839b8f004b7b52317850f27f58e05bec6ad Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Fri, 4 May 2018 15:11:35 +0000
Subject: [ARM/FDPIC v6 02/24] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in
configure scripts
The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order the enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.
In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.
In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
config/
* futex.m4: Handle *-uclinux*.
* tls.m4 (GCC_CHECK_TLS): Likewise.
gcc/
* config.gcc: Handle *-*-uclinuxfdpiceabi.
libatomic/
* configure.tgt: Handle arm*-*-uclinux*.
* configure: Regenerate.
libgcc/
* config.host: Handle *-*-uclinuxfdpiceabi.
libitm/
* configure.tgt: Handle *-*-uclinux*.
* configure: Regenerate.
Change-Id: Ib3a08905879ef917ee6c04c3988cf4ced7209fef
diff --git a/config/futex.m4 b/config/futex.m4
index e95144d..4dffe15 100644
--- a/config/futex.m4
+++ b/config/futex.m4
@@ -9,7 +9,7 @@ AC_DEFUN([GCC_LINUX_FUTEX],[dnl
GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
permit yes|no|default)
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
diff --git a/config/tls.m4 b/config/tls.m4
index 1a5fc59..7532305 100644
--- a/config/tls.m4
+++ b/config/tls.m4
@@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
dnl Shared library options may depend on the host; this check
dnl is only known to be needed for GNU/Linux.
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinuxfdpic*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
diff --git a/gcc/config.gcc b/gcc/config.gcc
index c7a464c..67780fb 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -776,7 +776,7 @@ case ${target} in
*-*-fuchsia*)
native_system_header_dir=/include
;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
extra_options="$extra_options gnu-user.opt"
gas=yes
gnu_ld=yes
@@ -785,7 +785,7 @@ case ${target} in
esac
tmake_file="t-slibgcc"
case $target in
- *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
+ *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
:;;
*-*-gnu*)
native_system_header_dir=/include
@@ -805,7 +805,7 @@ case ${target} in
*-*-*android*)
tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC"
;;
- *-*-*uclibc*)
+ *-*-*uclibc* | *-*-uclinuxfdpiceabi)
tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
;;
*-*-*musl*)
@@ -1167,7 +1167,7 @@ arm*-*-netbsdelf*)
tmake_file="${tmake_file} arm/t-arm"
target_cpu_cname="strongarm"
;;
-arm*-*-linux-*) # ARM GNU/Linux with ELF
+arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
extra_options="${extra_options} linux-android.opt"
case $target in
diff --git a/libatomic/configure b/libatomic/configure
index e7076a0..10b0287 100755
--- a/libatomic/configure
+++ b/libatomic/configure
@@ -6055,7 +6055,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -8540,7 +8540,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
lt_prog_compiler_static='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -9135,7 +9135,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -10666,7 +10666,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index ecbb7d3..38e77ce 100644
--- a/libatomic/configure.tgt
+++ b/libatomic/configure.tgt
@@ -124,7 +124,7 @@ case "${target}" in
config_path="${config_path} linux/aarch64 posix"
;;
- arm*-*-linux*)
+ arm*-*-linux* | arm*-*-uclinux*)
# OS support for atomic primitives.
config_path="${config_path} linux/arm posix"
;;
diff --git a/libgcc/config.host b/libgcc/config.host
index 91abc84..facca2a 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -245,7 +245,7 @@ case ${host} in
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-fuchsia"
extra_parts="crtbegin.o crtend.o"
;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-gld t-slibgcc-elf-ver t-linux"
extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
if test x$enable_vtable_verify = xyes; then
@@ -435,7 +435,7 @@ arm*-*-fuchsia*)
arm*-*-netbsdelf*)
tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
;;
-arm*-*-linux*) # ARM GNU/Linux with ELF
+arm*-*-linux* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix t-crtfm"
tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc"
tm_file="$tm_file arm/bpabi-lib.h"
diff --git a/libitm/configure b/libitm/configure
index fb742d7..7b4c749 100644
--- a/libitm/configure
+++ b/libitm/configure
@@ -6731,7 +6731,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -9217,7 +9217,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
lt_prog_compiler_static='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -9812,7 +9812,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -11343,7 +11343,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -13244,7 +13244,7 @@ if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
inherit_rpath_CXX=yes
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@@ -13831,7 +13831,7 @@ interix[3-9]*)
postdeps_CXX=
;;
-linux*)
+linux* | uclinux*)
case `$CC -V 2>&1 | sed 5q` in
*Sun\ C*)
# Sun C++ 5.9
@@ -14082,7 +14082,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
;;
esac
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@@ -15003,7 +15003,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -16468,7 +16468,7 @@ fi
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
@@ -16591,7 +16591,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
diff --git a/libitm/configure.tgt b/libitm/configure.tgt
index 4c0b602..eea865d 100644
--- a/libitm/configure.tgt
+++ b/libitm/configure.tgt
@@ -127,7 +127,7 @@ config_path="$ARCH posix generic"
# Other system configury
case "${target}" in
- *-*-linux*)
+ *-*-linux* | *-*-uclinux*)
if test "$enable_linux_futex" = yes; then
config_path="linux/$ARCH linux $config_path"
fi
diff --git a/libtool.m4 b/libtool.m4
index 8966762..64e507a 100644
--- a/libtool.m4
+++ b/libtool.m4
@@ -2449,7 +2449,12 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+
+# uclinux* changes (here and below) have been submitted to the libtool
+# project, but have not yet been accepted: they are GCC-local changes
+# for the time being. (See
+# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -3089,7 +3094,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -3734,7 +3739,7 @@ m4_if([$1], [CXX], [
;;
esac
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@@ -4032,7 +4037,7 @@ m4_if([$1], [CXX], [
_LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -4449,7 +4454,7 @@ _LT_EOF
_LT_TAGVAR(archive_expsym_cmds, $1)='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -5946,7 +5951,7 @@ if test "$_lt_caught_CXX_error" != yes; then
_LT_TAGVAR(inherit_rpath, $1)=yes
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@@ -6598,7 +6603,7 @@ interix[[3-9]]*)
_LT_TAGVAR(postdeps,$1)=
;;
-linux*)
+linux* | uclinux*)
case `$CC -V 2>&1 | sed 5q` in
*Sun\ C*)
# Sun C++ 5.9
--
2.6.3
[-- Attachment #3: 0024-ARM-FDPIC-Handle-arm-uclinuxfdpiceabi-in-libstdc-con.patch --]
[-- Type: text/x-patch, Size: 8709 bytes --]
From 28d59a36492d8370236dcf184b231db1ee985a79 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 29 Aug 2019 13:24:23 +0000
Subject: [ARM/FDPIC v6 24/24] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in
libstdc++ configure scripts
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
libstdc++-v3/
* acinclude.m4: Handle uclinux*.
* configure: Regenerate.
* configure.host: Handle uclinux*
Change-Id: Ia1b53693625e4153a090fcfc925a4d605bc98e59
diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
index 84258d8..82377e8 100644
--- a/libstdc++-v3/acinclude.m4
+++ b/libstdc++-v3/acinclude.m4
@@ -1441,6 +1441,9 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
ac_has_nanosleep=yes
ac_has_sched_yield=yes
;;
+ uclinux*)
+ ac_has_nanosleep=yes
+ ac_has_sched_yield=yes
esac
elif test x"$enable_libstdcxx_time" != x"no"; then
@@ -1526,7 +1529,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
if test x"$ac_has_clock_monotonic" != x"yes"; then
case ${target_os} in
- linux*)
+ linux* | uclinux*)
AC_MSG_CHECKING([for clock_gettime syscall])
AC_TRY_COMPILE(
[#include <unistd.h>
@@ -4361,7 +4364,7 @@ AC_DEFUN([GLIBCXX_ENABLE_FILESYSTEM_TS], [
freebsd*|netbsd*|openbsd*|dragonfly*|darwin*)
enable_libstdcxx_filesystem_ts=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_filesystem_ts=yes
;;
rtems*)
@@ -4543,7 +4546,7 @@ dnl
AC_MSG_CHECKING([for sendfile that can copy files])
AC_CACHE_VAL(glibcxx_cv_sendfile, [dnl
case "${target_os}" in
- gnu* | linux* | solaris*)
+ gnu* | linux* | solaris* | uclinux*)
GCC_TRY_COMPILE_OR_LINK(
[#include <sys/sendfile.h>],
[sendfile(1, 2, (off_t*)0, sizeof 1);],
diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure
index 7d134a0..91873b8 100755
--- a/libstdc++-v3/configure
+++ b/libstdc++-v3/configure
@@ -6652,7 +6652,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -9003,7 +9003,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
lt_prog_compiler_static='-non_shared'
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@@ -9598,7 +9598,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -11138,7 +11138,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -13063,7 +13063,7 @@ if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
inherit_rpath_CXX=yes
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@@ -13650,7 +13650,7 @@ interix[3-9]*)
postdeps_CXX=
;;
-linux*)
+linux* | uclinux*)
case `$CC -V 2>&1 | sed 5q` in
*Sun\ C*)
# Sun C++ 5.9
@@ -13901,7 +13901,7 @@ $as_echo_n "checking for $compiler option to produce PIC... " >&6; }
;;
esac
;;
- linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@@ -14822,7 +14822,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -16143,7 +16143,7 @@ fi
# Default to "generic".
if test $enable_clocale_flag = auto; then
case ${target_os} in
- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_clocale_flag=gnu
;;
darwin*)
@@ -16560,7 +16560,7 @@ fi
# Default to "new".
if test $enable_libstdcxx_allocator_flag = auto; then
case ${target_os} in
- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_allocator_flag=new
;;
*)
@@ -20834,7 +20834,7 @@ ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
ac_has_nanosleep=yes
ac_has_sched_yield=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for at least GNU libc 2.17" >&5
$as_echo_n "checking for at least GNU libc 2.17... " >&6; }
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -21334,7 +21334,7 @@ $as_echo "$ac_has_nanosleep" >&6; }
if test x"$ac_has_clock_monotonic" != x"yes"; then
case ${target_os} in
- linux*)
+ linux* | uclinux*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for clock_gettime syscall" >&5
$as_echo_n "checking for clock_gettime syscall... " >&6; }
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -28220,7 +28220,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
@@ -53895,7 +53895,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
@@ -60082,7 +60082,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinux*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
@@ -78725,7 +78725,7 @@ fi
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
@@ -80354,7 +80354,7 @@ $as_echo_n "checking whether to build Filesystem TS support... " >&6; }
freebsd*|netbsd*|openbsd*|dragonfly*|darwin*)
enable_libstdcxx_filesystem_ts=yes
;;
- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
enable_libstdcxx_filesystem_ts=yes
;;
rtems*)
@@ -80906,7 +80906,7 @@ $as_echo_n "checking for sendfile that can copy files... " >&6; }
$as_echo_n "(cached) " >&6
else
case "${target_os}" in
- gnu* | linux* | solaris*)
+ gnu* | linux* | solaris* | uclinux*)
if test x$gcc_no_link = xyes; then
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
/* end confdefs.h. */
diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
index f2ff129..ae156fc 100644
--- a/libstdc++-v3/configure.host
+++ b/libstdc++-v3/configure.host
@@ -264,7 +264,7 @@ case "${host_os}" in
linux-musl*)
os_include_dir="os/generic"
;;
- gnu* | linux* | kfreebsd*-gnu)
+ gnu* | linux* | kfreebsd*-gnu | uclinux*)
if [ "$uclibc" = "yes" ]; then
os_include_dir="os/uclibc"
elif [ "$bionic" = "yes" ]; then
@@ -327,7 +327,7 @@ esac
# Set any OS-dependent and CPU-dependent bits.
# THIS TABLE IS SORTED. KEEP IT THAT WAY.
case "${host}" in
- *-*-linux*)
+ *-*-linux* | *-*-uclinux*)
case "${host_cpu}" in
i[567]86)
abi_baseline_pair=i486-linux-gnu
@@ -361,7 +361,7 @@ case "${host}" in
fi
esac
case "${host}" in
- arm*-*-linux-*)
+ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi)
port_specific_symbol_files="\$(srcdir)/../config/os/gnu-linux/arm-eabi-extra.ver"
;;
esac
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-05-15 12:44 ` [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Christophe Lyon
@ 2019-08-29 15:37 ` Kyrill Tkachov
2019-09-05 8:30 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-08-29 15:37 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe,
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Without this, when we are unwinding across a signal frame we can jump
> to an even address which leads to an exception.
>
> This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
> PC from the signal frame since the PC saved by the kernel has the LSB
> bit set to zero.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â libgcc/
> Â Â Â Â Â Â Â * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
> Â Â Â Â Â Â Â architecture.
>
> Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
>
> diff --git a/libgcc/config/arm/unwind-arm.c
> b/libgcc/config/arm/unwind-arm.c
> index 9ba73e7..ba47150 100644
> --- a/libgcc/config/arm/unwind-arm.c
> +++ b/libgcc/config/arm/unwind-arm.c
> @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set
> (_Unwind_Context *context,
> Â Â Â Â Â Â Â Â return _UVRSR_FAILED;
>
> Â Â Â Â Â Â vrs->core.r[regno] = *(_uw *) valuep;
> +#if defined(__ARM_ARCH_7M__)
> +     /* Force LSB bit since we always run thumb code. */
> +Â Â Â Â Â if (regno == 15)
> +Â Â Â Â Â Â vrs->core.r[regno] |= 1;
> +#endif
Hmm, this looks quite specific. There are other architectures that are
thumb-only too (6-M, 7E-M etc).
Would checking for __thumb__ be better?
Thanks,
Kyrill
> Â Â Â Â Â Â return _UVRSR_OK;
>
> Â Â Â Â case _UVRSC_VFP:
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
2019-07-12 6:49 ` Richard Sandiford
2019-07-12 14:25 ` Christophe Lyon
@ 2019-08-29 15:39 ` Christophe Lyon
2019-08-30 8:41 ` Richard Sandiford
1 sibling, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:39 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
[-- Attachment #1: Type: text/plain, Size: 1954 bytes --]
On 12/07/2019 08:06, Richard Sandiford wrote:
> Christophe Lyon <christophe.lyon@st.com> writes:
>> In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
>> are referenced by their address, not by pointers to the function
>> descriptors.
>>
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>> Mickaël Guêné <mickael.guene@st.com>
>>
>> * libgcc/crtstuff.c: Add support for FDPIC.
>>
>> Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
>>
>> diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
>> index 4927a9f..159b461 100644
>> --- a/libgcc/crtstuff.c
>> +++ b/libgcc/crtstuff.c
>> @@ -429,9 +429,18 @@ __do_global_dtors_aux (void)
>> #ifdef FINI_SECTION_ASM_OP
>> CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
>> #elif defined (FINI_ARRAY_SECTION_ASM_OP)
>> +#if defined(__FDPIC__)
>> +__asm__(
>> + " .section .fini_array\n"
>> + " .align 2\n"
>> + " .word __do_global_dtors_aux\n"
>> +);
>> +asm (TEXT_SECTION_ASM_OP);
>> +#else /* defined(__FDPIC__) */
>> static func_ptr __do_global_dtors_aux_fini_array_entry[]
>> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
>> = { __do_global_dtors_aux };
>> +#endif /* defined(__FDPIC__) */
>> #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
>> static void __attribute__((used))
>> __do_global_dtors_aux_1 (void)
>
> It'd be good to avoid hard-coding the pointer size. Would it work to do:
>
> __asm__("\t.equ\.t__do_global_dtors_aux_alias, __do_global_dtors_aux\n");
> extern char __do_global_dtors_aux_alias;
> static void *__do_global_dtors_aux_fini_array_entry[]
> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *))))
> = { &__do_global_dtors_aux_alias };
>
> ? Similarly for the init_array.
>
OK, done.
> AFAICT this and 02/21 are the only patches that aren't Arm-specific,
> is that right?
>
> Thanks,
> Richard
> .
>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0005-ARM-FDPIC-Fix-__do_global_dtors_aux-and-frame_dummy-.patch --]
[-- Type: text/x-patch; name="0005-ARM-FDPIC-Fix-__do_global_dtors_aux-and-frame_dummy-.patch", Size: 2531 bytes --]
From ea0eee1ddeddef92277ae68eac4af28994c2902c Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 8 Feb 2018 11:12:52 +0100
Subject: [ARM/FDPIC v6 05/24] [ARM] FDPIC: Fix __do_global_dtors_aux and
frame_dummy generation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
libgcc/
* libgcc/crtstuff.c: Add support for FDPIC.
Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
index 4927a9f..6659039 100644
--- a/libgcc/crtstuff.c
+++ b/libgcc/crtstuff.c
@@ -429,9 +429,17 @@ __do_global_dtors_aux (void)
#ifdef FINI_SECTION_ASM_OP
CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
#elif defined (FINI_ARRAY_SECTION_ASM_OP)
+#if defined(__FDPIC__)
+__asm__("\t.equ\t__do_global_dtors_aux_alias, __do_global_dtors_aux\n");
+extern char __do_global_dtors_aux_alias;
+static void *__do_global_dtors_aux_fini_array_entry[]
+__attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *))))
+ = { &__do_global_dtors_aux_alias };
+#else /* defined(__FDPIC__) */
static func_ptr __do_global_dtors_aux_fini_array_entry[]
__attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
= { __do_global_dtors_aux };
+#endif /* defined(__FDPIC__) */
#else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
static void __attribute__((used))
__do_global_dtors_aux_1 (void)
@@ -473,9 +481,17 @@ frame_dummy (void)
#ifdef __LIBGCC_INIT_SECTION_ASM_OP__
CRT_CALL_STATIC_FUNCTION (__LIBGCC_INIT_SECTION_ASM_OP__, frame_dummy)
#else /* defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
+#if defined(__FDPIC__)
+__asm__("\t.equ\t__frame_dummy_alias, frame_dummy\n");
+extern char __frame_dummy_alias;
+static void *__frame_dummy_init_array_entry[]
+__attribute__ ((__used__, section(".init_array"), aligned(sizeof(void *))))
+ = { &__frame_dummy_alias };
+#else /* defined(__FDPIC__) */
static func_ptr __frame_dummy_init_array_entry[]
__attribute__ ((__used__, section(".init_array"), aligned(sizeof(func_ptr))))
= { frame_dummy };
+#endif /* defined(__FDPIC__) */
#endif /* !defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
#endif /* USE_EH_FRAME_REGISTRY || USE_TM_CLONE_REGISTRY */
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-07-16 12:33 ` Richard Sandiford
2019-08-20 17:13 ` Christophe Lyon
@ 2019-08-29 15:39 ` Christophe Lyon
2019-09-02 16:12 ` Richard Sandiford
1 sibling, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:39 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
[-- Attachment #1: Type: text/plain, Size: 21302 bytes --]
On 16/07/2019 13:58, Richard Sandiford wrote:
> Christophe Lyon <christophe.lyon@st.com> writes:
>> The FDPIC register is hard-coded to r9, as defined in the ABI.
>>
>> We have to disable tailcall optimizations if we don't know if the
>> target function is in the same module. If not, we have to set r9 to
>> the value associated with the target module.
>>
>> When generating a symbol address, we have to take into account whether
>> it is a pointer to data or to a function, because different
>> relocations are needed.
>>
>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>> Mickaël Guêné <mickael.guene@st.com>
>>
>> * config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
>> in FDPIC mode.
>> * config/arm/arm-protos.h (arm_load_function_descriptor): Declare
>> new function.
>> * config/arm/arm.c (arm_option_override): Define pic register to
>> FDPIC_REGNUM.
>> (arm_function_ok_for_sibcall): Disable sibcall optimization if we
>> have no decl or go through PLT.
>> (arm_load_pic_register): Handle TARGET_FDPIC.
>> (arm_is_segment_info_known): New function.
>> (arm_pic_static_addr): Add support for FDPIC.
>> (arm_load_function_descriptor): New function.
>> (arm_assemble_integer): Add support for FDPIC.
>> * config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
>> Define. (FDPIC_REGNUM): New define.
>> * config/arm/arm.md (call): Add support for FDPIC.
>> (call_value): Likewise.
>> (*restore_pic_register_after_call): New pattern.
>> (untyped_call): Disable if FDPIC.
>> (untyped_return): Likewise.
>> * config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
>>
>> Change-Id: I8fb1a6b85ace672184013568c5d28fbda2f7fda4
>>
>> diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
>> index 6e256ee..34695fa 100644
>> --- a/gcc/config/arm/arm-c.c
>> +++ b/gcc/config/arm/arm-c.c
>> @@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
>> builtin_define ("__ARM_EABI__");
>> }
>>
>> + def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
>> +
>> def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
>> def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
>>
>> diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
>> index 485bc68..272968a 100644
>> --- a/gcc/config/arm/arm-protos.h
>> +++ b/gcc/config/arm/arm-protos.h
>> @@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
>> extern int arm_const_double_inline_cost (rtx);
>> extern bool arm_const_double_by_parts (rtx);
>> extern bool arm_const_double_by_immediates (rtx);
>> +extern rtx arm_load_function_descriptor (rtx funcdesc);
>> extern void arm_emit_call_insn (rtx, rtx, bool);
>> bool detect_cmse_nonsecure_call (tree);
>> extern const char *output_call (rtx *);
>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>> index 45abcd8..d9397b5 100644
>> --- a/gcc/config/arm/arm.c
>> +++ b/gcc/config/arm/arm.c
>> @@ -3485,6 +3485,15 @@ arm_option_override (void)
>> if (flag_pic && TARGET_VXWORKS_RTP)
>> arm_pic_register = 9;
>>
>> + /* If in FDPIC mode then force arm_pic_register to be r9. */
>> + if (TARGET_FDPIC)
>> + {
>> + arm_pic_register = FDPIC_REGNUM;
>> + if (! TARGET_ARM && ! TARGET_THUMB2)
>> + sorry ("FDPIC mode is supported on architecture versions that "
>> + "support ARM or Thumb-2 only.");
>> + }
>> +
>> if (arm_pic_register_string != NULL)
>> {
>> int pic_register = decode_reg_name (arm_pic_register_string);
>
> Isn't this equivalent to rejecting Thumb-1? I think that would be
> clearer in both the condition and the error message.
>
Right, fixed.
> How does this interact with arm_pic_data_is_text_relative? Are both
> values supported?
It doesn't interact well... it only works with the default value.
Otherwise, there are compiler crashes.
>
>> @@ -7295,6 +7304,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
>> if (cfun->machine->sibcall_blocked)
>> return false;
>>
>> + if (TARGET_FDPIC)
>> + {
>> + /* In FDPIC, never tailcall something for which we have no decl:
>> + the target function could be in a different module, requiring
>> + a different FDPIC register value. */
>> + if (decl == NULL)
>> + return false;
>> +
>> + /* Don't tailcall if we go through the PLT since the FDPIC
>> + register is then corrupted and we don't restore it after
>> + static function calls. */
>> + if (!targetm.binds_local_p (decl))
>> + return false;
>> + }
>> +
>> /* Never tailcall something if we are generating code for Thumb-1. */
>> if (TARGET_THUMB1)
>> return false;
>> @@ -7711,7 +7735,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
>> {
>> rtx l1, labelno, pic_tmp, pic_rtx;
>>
>> - if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
>> + if (crtl->uses_pic_offset_table == 0
>> + || TARGET_SINGLE_PIC_BASE
>> + || TARGET_FDPIC)
>> return;
>>
>> gcc_assert (flag_pic);
>> @@ -7780,28 +7806,142 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
>> emit_use (pic_reg);
>> }
>>
>> +/* Try to determine whether an object, referenced via ORIG, will be
>> + placed in the text or data segment. This is used in FDPIC mode, to
>> + decide which relocations to use when accessing ORIG. IS_READONLY
>> + is set to true if ORIG is a read-only location, false otherwise.
>> + Return true if we could determine the location of ORIG, false
>> + otherwise. IS_READONLY is valid only when we return true. */
>
> Maybe *IS_READONLY in both cases?
>
OK
>> +static bool
>> +arm_is_segment_info_known (rtx orig, bool *is_readonly)
>> +{
>> + bool res = false;
>> +
>> + *is_readonly = false;
>> +
>> + if (GET_CODE (orig) == LABEL_REF)
>> + {
>> + res = true;
>> + *is_readonly = true;
>> + }
>
> Think this function would be easier to read with early returns.
>
Done
>> + else if (SYMBOL_REF_P (orig))
>
> ...so "if" rather than "else if" here.
>
>> + {
>> + if (CONSTANT_POOL_ADDRESS_P (orig))
>> + {
>> + res = true;
>> + *is_readonly = true;
>> + }
>> + else if (SYMBOL_REF_LOCAL_P (orig)
>> + && !SYMBOL_REF_EXTERNAL_P (orig)
>> + && SYMBOL_REF_DECL (orig)
>> + && (!DECL_P (SYMBOL_REF_DECL (orig))
>> + || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
>> + {
>> + tree decl = SYMBOL_REF_DECL (orig);
>> + tree init = (TREE_CODE (decl) == VAR_DECL)
>> + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
>> + ? decl : 0;
>> + int reloc = 0;
>> + bool named_section, readonly;
>> +
>> + if (init && init != error_mark_node)
>> + reloc = compute_reloc_for_constant (init);
>> +
>> + named_section = TREE_CODE (decl) == VAR_DECL
>> + && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
>
> Here too I think it would be better to return false early.
>
OK
> How much variation do you support here for named sections? E.g. can a
> linker script really put SECTION_WRITE sections in the text segment?
> Seems like there are some cases that could be handled.
>
> (Just asking, not suggesting you should change anything.)
>
I don't think we had such a use-case, we have tested with "common/usual"
linux packages.
>> + readonly = decl_readonly_section (decl, reloc);
>> +
>> + /* We don't know where the link script will put a named
>> + section, so return false in such a case. */
>> + res = !named_section;
>> +
>> + if (!named_section)
>> + *is_readonly = readonly;
>> + }
>> + else
>> + {
>> + /* We don't know. */
>> + res = false;
>> + }
>> + }
>> + else
>> + gcc_unreachable ();
>> +
>> + return res;
>> +}
>> +
>> /* Generate code to load the address of a static var when flag_pic is set. */
>> static rtx_insn *
>> arm_pic_static_addr (rtx orig, rtx reg)
>> {
>> rtx l1, labelno, offset_rtx;
>> + rtx_insn *insn;
>>
>> gcc_assert (flag_pic);
>>
>> - /* We use an UNSPEC rather than a LABEL_REF because this label
>> - never appears in the code stream. */
>> - labelno = GEN_INT (pic_labelno++);
>> - l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
>> - l1 = gen_rtx_CONST (VOIDmode, l1);
>> + bool is_readonly = false;
>> + bool info_known = false;
>>
>> - /* On the ARM the PC register contains 'dot + 8' at the time of the
>> - addition, on the Thumb it is 'dot + 4'. */
>> - offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
>> - offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
>> - UNSPEC_SYMBOL_OFFSET);
>> - offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
>> + if (TARGET_FDPIC
>> + && SYMBOL_REF_P (orig)
>> + && !SYMBOL_REF_FUNCTION_P (orig))
>> + info_known = arm_is_segment_info_known (orig, &is_readonly);
>
> Excess indendentation. Feels like it might be slightly simpler
> to handle SYMBOL_REF_FUNCTION_P in arm_is_segment_info_known,
> but I guess the idea is that it might not then be clear whether
> the caller is asking about a descriptor or the function itself.
>
Yes
>>
>> - return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
>> + if (TARGET_FDPIC
>> + && SYMBOL_REF_P (orig)
>> + && !SYMBOL_REF_FUNCTION_P (orig)
>> + && !info_known)
>> + {
>> + /* We don't know where orig is stored, so we have be
>> + pessimistic and use a GOT relocation. */
>> + rtx pat;
>> + rtx mem;
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> +
>> + pat = gen_calculate_pic_address (reg, pic_reg, orig);
>> +
>> + /* Make the MEM as close to a constant as possible. */
>> + mem = SET_SRC (pat);
>> + gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
>> + MEM_READONLY_P (mem) = 1;
>> + MEM_NOTRAP_P (mem) = 1;
>> +
>> + insn = emit_insn (pat);
>
> Think "pat = ..." onwards should be split out into a helper, since it's
> a cut-&-paste of the code in legitimize_pic_address.
>
OK, done, created calculate_pic_address_constant for this.
>> + }
>> + else if (TARGET_FDPIC
>> + && SYMBOL_REF_P (orig)
>> + && (SYMBOL_REF_FUNCTION_P (orig)
>> + || (info_known && !is_readonly)))
>> + {
>> + /* We use the GOTOFF relocation. */
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> +
>> + rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
>> + emit_insn (gen_movsi (reg, l1));
>> + insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
>> + }
>> + else
>> + {
>> + /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
>> + PC-relative access. */
>> + /* We use an UNSPEC rather than a LABEL_REF because this label
>> + never appears in the code stream. */
>> + labelno = GEN_INT (pic_labelno++);
>> + l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
>> + l1 = gen_rtx_CONST (VOIDmode, l1);
>> +
>> + /* On the ARM the PC register contains 'dot + 8' at the time of the
>> + addition, on the Thumb it is 'dot + 4'. */
>> + offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
>> + offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
>> + UNSPEC_SYMBOL_OFFSET);
>> + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
>> +
>> + insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
>> + labelno));
>> + }
>> +
>> + return insn;
>> }
>>
>> /* Return nonzero if X is valid as an ARM state addressing register. */
>> @@ -16112,9 +16252,36 @@ get_jump_table_size (rtx_jump_table_data *insn)
>> return 0;
>> }
>>
>> +/* Emit insns to load the function address from FUNCDESC (an FDPIC
>> + function descriptor) into a register and the GOT address into the
>> + FDPIC register, returning an rtx for the register holding the
>> + function address. */
>> +
>> +rtx
>> +arm_load_function_descriptor (rtx funcdesc)
>> +{
>> + rtx fnaddr_reg = gen_reg_rtx (Pmode);
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
>> + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
>> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
>> +
>> + emit_move_insn (fnaddr_reg, fnaddr);
>> + /* The ABI requires the entry point address to be loaded first, so
>> + prevent the load from being moved after that of the GOT
>> + address. */
>
> Do you mean that the move insn above has to come before the
> pattern below? If so, I think that should be enforced by making this...
>
yes...
>> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
>> + gen_rtvec (2, pic_reg, gotaddr),
>> + UNSPEC_PIC_RESTORE);
>> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gotaddr);
>> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, pic_reg);
>> + emit_insn (par);
>> +
>> + return fnaddr_reg;
>> +}
>> +
>
> ...use fnaddr_reg.
but I updated the comment: this was related to a race condition,
but since we don't support lazy binding, this is not a problem.
>
> Does the instruction actually use pic_reg? We only get here for
> non-symbolic addresses after all.
>
> It seems simpler to make *restore_pic_register_after_call a named pattern
> and use gen_restore_pic_register_after_call instead.
>
Done
>> /* Return the maximum amount of padding that will be inserted before
>> label LABEL. */
>> -
>> static HOST_WIDE_INT
>> get_label_padding (rtx label)
>> {
>> @@ -23069,9 +23236,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
>> && (!SYMBOL_REF_LOCAL_P (x)
>> || (SYMBOL_REF_DECL (x)
>> ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
>> - fputs ("(GOT)", asm_out_file);
>> + {
>> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
>> + fputs ("(GOTFUNCDESC)", asm_out_file);
>> + else
>> + fputs ("(GOT)", asm_out_file);
>> + }
>> else
>> - fputs ("(GOTOFF)", asm_out_file);
>> + {
>> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
>> + fputs ("(GOTOFFFUNCDESC)", asm_out_file);
>> + else
>> + {
>> + bool is_readonly;
>> +
>> + if (arm_is_segment_info_known (x, &is_readonly))
>> + fputs ("(GOTOFF)", asm_out_file);
>> + else
>> + fputs ("(GOT)", asm_out_file);
>> + }
>> + }
>> + }
>> +
>> + /* For FDPIC we also have to mark symbol for .data section. */
>> + if (TARGET_FDPIC
>> + && NEED_GOT_RELOC
>> + && flag_pic
>> + && !making_const_table
>> + && SYMBOL_REF_P (x))
>> + {
>> + if (SYMBOL_REF_FUNCTION_P (x))
>> + fputs ("(FUNCDESC)", asm_out_file);
>> }
>> fputc ('\n', asm_out_file);
>> return true;
>
> Do you expect to reach here for LABEL_REFs with TARGET_FDPIC? The second
No. I reached here with LABEL_REFs only when forcing arm_pic_data_is_text_relative
> block of code tests for SYMBOL_REF_P but the first tests
> SYMBOL_REF_FUNCTION_P without checking SYMBOL_REF_P first.
>
> Can NEED_GOT_RELOC or flag_pic be false for TARGET_FDPIC?
No.
> Is !flag_pic TARGET_FDPIC supported?
No; flag_pic is false when we use -mno-fdpic, so we revert to the "usual" abi then
>
>> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
>> index 0aecd03..9036255 100644
>> --- a/gcc/config/arm/arm.md
>> +++ b/gcc/config/arm/arm.md
>> @@ -8127,6 +8127,23 @@
>> rtx callee, pat;
>> tree addr = MEM_EXPR (operands[0]);
>>
>> + /* Force FDPIC register (r9) before call. */
>> + if (TARGET_FDPIC)
>> + {
>> + /* No need to update r9 if calling a static function.
>> + In other words: set r9 for indirect or non-local calls. */
>> + callee = XEXP (operands[0], 0);
>> + if (!SYMBOL_REF_P (callee)
>> + || !SYMBOL_REF_LOCAL_P (callee)
>> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
>
> IMO it would be better to calculate this once rather than repeat
> it below.
>
I've re-checked and changed this...
>> + {
>> + emit_insn (gen_blockage ());
>
> Why's the blockage needed? Seems worth a comment.
>
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
>> + emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
>
> Is this use keeping the register live for the call? If so,
> I think it'd be better to attach it to the CALL_INSN_FUNCTION_USAGE
> instead.
>
So... I've now removed the blockage (unneeded), and no longer force r9 before calls.
It's only restored after calls, even after calling static/same-module functions because they can clobber r9.
>> + }
>> + }
>> +
>> /* In an untyped call, we can get NULL for operand 2. */
>> if (operands[2] == NULL_RTX)
>> operands[2] = const0_rtx;
>> @@ -8140,6 +8157,13 @@
>> : !REG_P (callee))
>> XEXP (operands[0], 0) = force_reg (Pmode, callee);
>>
>> + if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
>> + {
>> + /* Indirect call: set r9 with FDPIC value of callee. */
>> + XEXP (operands[0], 0)
>> + = arm_load_function_descriptor (XEXP (operands[0], 0));
>> + }
>> +
>> if (detect_cmse_nonsecure_call (addr))
>> {
>> pat = gen_nonsecure_call_internal (operands[0], operands[1],
>
> Redundant braces.
>
OK
>> @@ -8151,10 +8175,38 @@
>> pat = gen_call_internal (operands[0], operands[1], operands[2]);
>> arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
>> }
>> +
>> + /* Restore FDPIC register (r9) after call. */
>> + if (TARGET_FDPIC)
>> + {
>> + /* No need to update r9 if calling a static function. */
>> + if (!SYMBOL_REF_P (callee)
>> + || !SYMBOL_REF_LOCAL_P (callee)
>> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
>> + {
>> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + emit_move_insn (pic_reg, get_hard_reg_initial_val (Pmode, FDPIC_REGNUM));
>> + emit_insn (gen_rtx_USE (VOIDmode, pic_reg));
>> + emit_insn (gen_blockage ());
>> + }
>> + }
>> DONE;
>> }"
>> )
>
> What's the general assumption about the validity of r9? Seems odd that
> we need to load this value both before and after the call.
>
Right, now re-loaded only after the call.
>>
>> +(define_insn "*restore_pic_register_after_call"
>> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
>> + (match_operand:SI 1 "nonimmediate_operand" "r,m")]
>> + UNSPEC_PIC_RESTORE)
>> + (use (match_dup 1))
>> + (clobber (match_dup 0))])
>> + ]
>> + ""
>> + "@
>> + mov\t%0, %1
>> + ldr\t%0, %1"
>> +)
>> +
>> (define_expand "call_internal"
>> [(parallel [(call (match_operand 0 "memory_operand" "")
>> (match_operand 1 "general_operand" ""))
>
> Since operand 0 is significant after the instruction, I think this
> should be:
>
> (define_insn "*restore_pic_register_after_call"
> [(set (match_operand:SI 0 "s_register_operand" "+r,r")
> (unspec:SI [(match_dup 0)
> (match_operand:SI 1 "nonimmediate_operand" "r,m")]
> UNSPEC_PIC_RESTORE))]
> ...
>
> The (use (match_dup 1)) looks redundant, since the unspec itself
> uses operand 1.
>
When I try that, I have cases where the restore instruction is discarded, when the call happens just before function return. Since r9 is caller-saved, it should be restored but after dse2 the dumps say:
(insn (set (reg:SI 9 r9)
(unspec:SI [
(reg:SI 9 r9)
(reg:SI 4 r4 [121])
] UNSPEC_PIC_RESTORE))
(expr_list:REG_UNUSED (reg:SI 9 r9) (nil))))
and this is later removed by cprop_hardreg (which says the exit block uses r4, sp, and lr: should I make it use r9?)
>> @@ -8215,6 +8267,30 @@
>> rtx pat, callee;
>> tree addr = MEM_EXPR (operands[1]);
>>
>> + /* Force FDPIC register (r9) before call. */
>> + if (TARGET_FDPIC)
>> + {
>> + /* No need to update the FDPIC register (r9) if calling a static function.
>> + In other words: set r9 for indirect or non-local calls. */
>> + callee = XEXP (operands[1], 0);
>> + if (!SYMBOL_REF_P (callee)
>> + || !SYMBOL_REF_LOCAL_P (callee)
>> + || arm_is_long_call_p (SYMBOL_REF_DECL (callee)))
>> + {
>> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
>> + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
>> + rtx initial_fdpic_reg =
>> + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
>> +
>> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
>> + gen_rtvec (2, fdpic_reg, initial_fdpic_reg),
>> + UNSPEC_PIC_RESTORE);
>> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
>> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
>> + emit_insn (par);
>> + }
>> + }
>> +
>
> It's not obvious why this code is different from the call-without-value
> case above, which doesn't use UNSPEC_PIC_RESTORE. I think it should be
> split out into a helper function that's used for both call and call_value.
>
Now reworked/removed.
> I think it would also be good to have more comments about what
> conditions the UNSPEC_PIC_RESTORE pattern is enforcing.
>
I think the use-case is now clearer?
> Thanks,
> Richard
> .
>
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[-- Type: text/x-patch; name="0004-ARM-FDPIC-Add-support-for-FDPIC-for-arm-architecture.patch", Size: 19612 bytes --]
From 25134e559c8e014774d24db6cac6ca6b3b56a4b0 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 8 Feb 2018 11:10:51 +0100
Subject: [ARM/FDPIC v6 04/24] [ARM] FDPIC: Add support for FDPIC for arm
architecture
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.
When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
FDPIC_REGNUM.
(arm_function_ok_for_sibcall): Disable sibcall optimization if we
have no decl or go through PLT.
(calculate_pic_address_constant): New function.
(legitimize_pic_address): Call calculate_pic_address_constant.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_emit_call_insn): Add support for FDPIC.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
Define. (FDPIC_REGNUM): New define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
gcc/testsuite/
* gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.
Change-Id: I1e96d260074ab7b75d36cdff5d34ad898f35c66f
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 6e256ee..34695fa 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
builtin_define ("__ARM_EABI__");
}
+ def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+
def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 485bc68..272968a 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
extern int arm_const_double_inline_cost (rtx);
extern bool arm_const_double_by_parts (rtx);
extern bool arm_const_double_by_immediates (rtx);
+extern rtx arm_load_function_descriptor (rtx funcdesc);
extern void arm_emit_call_insn (rtx, rtx, bool);
bool detect_cmse_nonsecure_call (tree);
extern const char *output_call (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 45abcd8..ea6ea37 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3485,6 +3485,14 @@ arm_option_override (void)
if (flag_pic && TARGET_VXWORKS_RTP)
arm_pic_register = 9;
+ /* If in FDPIC mode then force arm_pic_register to be r9. */
+ if (TARGET_FDPIC)
+ {
+ arm_pic_register = FDPIC_REGNUM;
+ if (TARGET_THUMB1)
+ sorry ("FDPIC mode is not supported in Thumb-1 mode.");
+ }
+
if (arm_pic_register_string != NULL)
{
int pic_register = decode_reg_name (arm_pic_register_string);
@@ -7295,6 +7303,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
if (cfun->machine->sibcall_blocked)
return false;
+ if (TARGET_FDPIC)
+ {
+ /* In FDPIC, never tailcall something for which we have no decl:
+ the target function could be in a different module, requiring
+ a different FDPIC register value. */
+ if (decl == NULL)
+ return false;
+
+ /* Don't tailcall if we go through the PLT since the FDPIC
+ register is then corrupted and we don't restore it after
+ static function calls. */
+ if (!targetm.binds_local_p (decl))
+ return false;
+ }
+
/* Never tailcall something if we are generating code for Thumb-1. */
if (TARGET_THUMB1)
return false;
@@ -7501,6 +7524,24 @@ require_pic_register (rtx pic_reg, bool compute_now)
}
}
+/* Generate insns to calculate the address of ORIG in pic mode. */
+static rtx_insn *
+calculate_pic_address_constant (rtx reg, rtx pic_reg, rtx orig)
+{
+ rtx pat;
+ rtx mem;
+
+ pat = gen_calculate_pic_address (reg, pic_reg, orig);
+
+ /* Make the MEM as close to a constant as possible. */
+ mem = SET_SRC (pat);
+ gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
+ MEM_READONLY_P (mem) = 1;
+ MEM_NOTRAP_P (mem) = 1;
+
+ return emit_insn (pat);
+}
+
/* Legitimize PIC load to ORIG into REG. If REG is NULL, a new pseudo is
created to hold the result of the load. If not NULL, PIC_REG indicates
which register to use as PIC register, otherwise it is decided by register
@@ -7545,24 +7586,13 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg,
insn = arm_pic_static_addr (orig, reg);
else
{
- rtx pat;
- rtx mem;
-
/* If this function doesn't have a pic register, create one now. */
require_pic_register (pic_reg, compute_now);
if (pic_reg == NULL_RTX)
pic_reg = cfun->machine->pic_reg;
- pat = gen_calculate_pic_address (reg, pic_reg, orig);
-
- /* Make the MEM as close to a constant as possible. */
- mem = SET_SRC (pat);
- gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
- MEM_READONLY_P (mem) = 1;
- MEM_NOTRAP_P (mem) = 1;
-
- insn = emit_insn (pat);
+ insn = calculate_pic_address_constant (reg, pic_reg, orig);
}
/* Put a REG_EQUAL note on this insn, so that it can be optimized
@@ -7711,7 +7741,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
{
rtx l1, labelno, pic_tmp, pic_rtx;
- if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
+ if (crtl->uses_pic_offset_table == 0
+ || TARGET_SINGLE_PIC_BASE
+ || TARGET_FDPIC)
return;
gcc_assert (flag_pic);
@@ -7780,28 +7812,132 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
emit_use (pic_reg);
}
+/* Try to determine whether an object, referenced via ORIG, will be
+ placed in the text or data segment. This is used in FDPIC mode, to
+ decide which relocations to use when accessing ORIG. *IS_READONLY
+ is set to true if ORIG is a read-only location, false otherwise.
+ Return true if we could determine the location of ORIG, false
+ otherwise. *IS_READONLY is valid only when we return true. */
+static bool
+arm_is_segment_info_known (rtx orig, bool *is_readonly)
+{
+ *is_readonly = false;
+
+ if (GET_CODE (orig) == LABEL_REF)
+ {
+ *is_readonly = true;
+ return true;
+ }
+
+ if (SYMBOL_REF_P (orig))
+ {
+ if (CONSTANT_POOL_ADDRESS_P (orig))
+ {
+ *is_readonly = true;
+ return true;
+ }
+ else if (SYMBOL_REF_LOCAL_P (orig)
+ && !SYMBOL_REF_EXTERNAL_P (orig)
+ && SYMBOL_REF_DECL (orig)
+ && (!DECL_P (SYMBOL_REF_DECL (orig))
+ || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
+ {
+ tree decl = SYMBOL_REF_DECL (orig);
+ tree init = (TREE_CODE (decl) == VAR_DECL)
+ ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
+ ? decl : 0;
+ int reloc = 0;
+ bool named_section, readonly;
+
+ if (init && init != error_mark_node)
+ reloc = compute_reloc_for_constant (init);
+
+ named_section = TREE_CODE (decl) == VAR_DECL
+ && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
+ readonly = decl_readonly_section (decl, reloc);
+
+ /* We don't know where the link script will put a named
+ section, so return false in such a case. */
+ if (named_section)
+ return false;
+
+ *is_readonly = readonly;
+ return true;
+ }
+ else
+ {
+ /* We don't know. */
+ return false;
+ }
+ }
+ else
+ gcc_unreachable ();
+
+ return false;
+}
+
/* Generate code to load the address of a static var when flag_pic is set. */
static rtx_insn *
arm_pic_static_addr (rtx orig, rtx reg)
{
rtx l1, labelno, offset_rtx;
+ rtx_insn *insn;
gcc_assert (flag_pic);
- /* We use an UNSPEC rather than a LABEL_REF because this label
- never appears in the code stream. */
- labelno = GEN_INT (pic_labelno++);
- l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- l1 = gen_rtx_CONST (VOIDmode, l1);
+ bool is_readonly = false;
+ bool info_known = false;
+
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig))
+ info_known = arm_is_segment_info_known (orig, &is_readonly);
+
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig)
+ && !info_known)
+ {
+ /* We don't know where orig is stored, so we have be
+ pessimistic and use a GOT relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ insn = calculate_pic_address_constant (reg, pic_reg, orig);
+ }
+ else if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && (SYMBOL_REF_FUNCTION_P (orig)
+ || (info_known && !is_readonly)))
+ {
+ /* We use the GOTOFF relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
+ emit_insn (gen_movsi (reg, l1));
+ insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
+ }
+ else
+ {
+ /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
+ PC-relative access. */
+ /* We use an UNSPEC rather than a LABEL_REF because this label
+ never appears in the code stream. */
+ labelno = GEN_INT (pic_labelno++);
+ l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ l1 = gen_rtx_CONST (VOIDmode, l1);
+
+ /* On the ARM the PC register contains 'dot + 8' at the time of the
+ addition, on the Thumb it is 'dot + 4'. */
+ offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
+ offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
+ UNSPEC_SYMBOL_OFFSET);
+ offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
- /* On the ARM the PC register contains 'dot + 8' at the time of the
- addition, on the Thumb it is 'dot + 4'. */
- offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
- offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
- UNSPEC_SYMBOL_OFFSET);
- offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
+ insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
+ labelno));
+ }
- return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
+ return insn;
}
/* Return nonzero if X is valid as an ARM state addressing register. */
@@ -8510,7 +8646,7 @@ load_tls_operand (rtx x, rtx reg)
static rtx_insn *
arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
{
- rtx label, labelno, sum;
+ rtx label, labelno = NULL_RTX, sum;
gcc_assert (reloc != TLS_DESCSEQ);
start_sequence ();
@@ -16112,9 +16248,32 @@ get_jump_table_size (rtx_jump_table_data *insn)
return 0;
}
+/* Emit insns to load the function address from FUNCDESC (an FDPIC
+ function descriptor) into a register and the GOT address into the
+ FDPIC register, returning an rtx for the register holding the
+ function address. */
+
+rtx
+arm_load_function_descriptor (rtx funcdesc)
+{
+ rtx fnaddr_reg = gen_reg_rtx (Pmode);
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+ rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+
+ emit_move_insn (fnaddr_reg, fnaddr);
+
+ /* The ABI requires the entry point address to be loaded first, but
+ since we cannot support lazy binding for lack of atomic load of
+ two 32-bits values, we do not need to bother to prevent the
+ previous load from being moved after that of the GOT address. */
+ emit_insn (gen_restore_pic_register_after_call (pic_reg, gotaddr));
+
+ return fnaddr_reg;
+}
+
/* Return the maximum amount of padding that will be inserted before
label LABEL. */
-
static HOST_WIDE_INT
get_label_padding (rtx label)
{
@@ -18249,6 +18408,12 @@ arm_emit_call_insn (rtx pat, rtx addr, bool sibcall)
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), cfun->machine->pic_reg);
}
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), fdpic_reg);
+ }
+
if (TARGET_AAPCS_BASED)
{
/* For AAPCS, IP and CC can be clobbered by veneers inserted by the
@@ -23069,9 +23234,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
&& (!SYMBOL_REF_LOCAL_P (x)
|| (SYMBOL_REF_DECL (x)
? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
- fputs ("(GOT)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTFUNCDESC)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
else
- fputs ("(GOTOFF)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTOFFFUNCDESC)", asm_out_file);
+ else
+ {
+ bool is_readonly;
+
+ if (arm_is_segment_info_known (x, &is_readonly))
+ fputs ("(GOTOFF)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
+ }
+ }
+
+ /* For FDPIC we also have to mark symbol for .data section. */
+ if (TARGET_FDPIC
+ && NEED_GOT_RELOC
+ && flag_pic
+ && !making_const_table
+ && SYMBOL_REF_P (x))
+ {
+ if (SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(FUNCDESC)", asm_out_file);
}
fputc ('\n', asm_out_file);
return true;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 4866e1e..7b50ef5 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -892,6 +892,9 @@ extern int arm_arch_cmse;
Pascal), so the following is not true. */
#define STATIC_CHAIN_REGNUM 12
+/* r9 is the FDPIC register (base register for GOT and FUNCDESC accesses). */
+#define FDPIC_REGNUM 9
+
/* Define this to be where the real frame pointer is if it is not possible to
work out the offset between the frame pointer and the automatic variables
until after register allocation has taken place. FRAME_POINTER_REGNUM
@@ -1948,6 +1951,10 @@ extern unsigned arm_pic_register;
data addresses in memory. */
#define PIC_OFFSET_TABLE_REGNUM arm_pic_register
+/* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT
+ entries would need to handle saving and restoring it). */
+#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC
+
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. One exception is
UNSPEC_TLS, which is always PIC. */
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 0aecd03..328d32d 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8140,6 +8140,11 @@
: !REG_P (callee))
XEXP (operands[0], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[0], 0)
+ = arm_load_function_descriptor (XEXP (operands[0], 0));
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_internal (operands[0], operands[1],
@@ -8151,10 +8156,35 @@
pat = gen_call_internal (operands[0], operands[1], operands[2]);
arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg =
+ get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ initial_fdpic_reg));
+ }
+
DONE;
}"
)
+(define_insn "restore_pic_register_after_call"
+ [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
+ (match_operand:SI 1 "nonimmediate_operand" "r,m")]
+ UNSPEC_PIC_RESTORE)
+ (use (match_dup 1))
+ (clobber (match_dup 0))])
+ ]
+ ""
+ "@
+ mov\t%0, %1
+ ldr\t%0, %1"
+)
+
(define_expand "call_internal"
[(parallel [(call (match_operand 0 "memory_operand" "")
(match_operand 1 "general_operand" ""))
@@ -8228,6 +8258,11 @@
: !REG_P (callee))
XEXP (operands[1], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[1], 0)))
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[1], 0)
+ = arm_load_function_descriptor (XEXP (operands[1], 0));
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_value_internal (operands[0], operands[1],
@@ -8240,6 +8275,18 @@
operands[2], operands[3]);
arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg =
+ get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ initial_fdpic_reg));
+ }
+
DONE;
}"
)
@@ -8582,7 +8629,7 @@
(const_int 0))
(match_operand 1 "" "")
(match_operand 2 "" "")])]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
@@ -8649,7 +8696,7 @@
(define_expand "untyped_return"
[(match_operand:BLK 0 "memory_operand" "")
(match_operand 1 "" "")]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 174bcc5..bda35d5 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -89,6 +89,7 @@
UNSPEC_SP_SET ; Represent the setting of stack protector's canary
UNSPEC_SP_TEST ; Represent the testing of stack protector's canary
; against the guard.
+ UNSPEC_PIC_RESTORE ; Use to restore fdpic register
])
(define_c_enum "unspec" [
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
index 4753e36..51a76fc 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -17,5 +17,5 @@ F (__fp16 a, __fp16 b, __fp16 c)
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
-/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
index 41c7ab7..ae65fb8 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
@@ -16,5 +16,5 @@ F (__fp16 a, __fp16 b, __fp16 c)
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
-/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
2019-05-15 12:44 ` [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Christophe Lyon
@ 2019-08-29 15:40 ` Christophe Lyon
2019-08-29 15:44 ` Kyrill Tkachov
1 sibling, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:40 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 2755 bytes --]
Here is an updated version that makes use of the helper gen_restore_pic_register_after_call
Christophe
On 15/05/2019 14:39, Christophe Lyon wrote:
> We call __aeabi_read_tp() to get the thread pointer. Since this is a
> function call, we have to restore the FDPIC register afterwards.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Mickaël Guêné <mickael.guene@st.com>
>
> gcc/
> * config/arm/arm.c (arm_load_tp): Add FDPIC support.
> * config/arm/arm.md (load_tp_soft_fdpic): New pattern.
> (load_tp_soft): Disable in FDPIC mode.
>
> Change-Id: I1f6dfaee6260ecb453270f4971b3c5124317a186
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 5fc7a20..26f29c7 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -8732,7 +8732,25 @@ arm_load_tp (rtx target)
>
> rtx tmp;
>
> - emit_insn (gen_load_tp_soft ());
> + if (TARGET_FDPIC)
> + {
> + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
> + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
> +
> + emit_insn (gen_load_tp_soft_fdpic ());
> +
> + /* Restore r9. */
> + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
> + gen_rtvec (2, fdpic_reg,
> + initial_fdpic_reg),
> + UNSPEC_PIC_RESTORE);
> + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
> + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
> + emit_insn (par);
> + }
> + else
> + emit_insn (gen_load_tp_soft ());
>
> tmp = gen_rtx_REG (SImode, R0_REGNUM);
> emit_move_insn (target, tmp);
> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
> index 9036255..0edcb1d 100644
> --- a/gcc/config/arm/arm.md
> +++ b/gcc/config/arm/arm.md
> @@ -11759,12 +11759,25 @@
> )
>
> ;; Doesn't clobber R1-R3. Must use r0 for the first operand.
> +(define_insn "load_tp_soft_fdpic"
> + [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
> + (clobber (reg:SI 9))
> + (clobber (reg:SI LR_REGNUM))
> + (clobber (reg:SI IP_REGNUM))
> + (clobber (reg:CC CC_REGNUM))]
> + "TARGET_SOFT_TP && TARGET_FDPIC"
> + "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
> + [(set_attr "conds" "clob")
> + (set_attr "type" "branch")]
> +)
> +
> +;; Doesn't clobber R1-R3. Must use r0 for the first operand.
> (define_insn "load_tp_soft"
> [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
> (clobber (reg:SI LR_REGNUM))
> (clobber (reg:SI IP_REGNUM))
> (clobber (reg:CC CC_REGNUM))]
> - "TARGET_SOFT_TP"
> + "TARGET_SOFT_TP && !TARGET_FDPIC"
> "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
> [(set_attr "conds" "clob")
> (set_attr "type" "branch")]
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0012-ARM-FDPIC-Restore-r9-after-we-call-__aeabi_read_tp.patch --]
[-- Type: text/x-patch; name="0012-ARM-FDPIC-Restore-r9-after-we-call-__aeabi_read_tp.patch", Size: 2511 bytes --]
From b27af6ffc5423679167b5862764d259598b3bf29 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 8 Feb 2018 14:51:07 +0100
Subject: [ARM/FDPIC v6 12/24] [ARM] FDPIC: Restore r9 after we call
__aeabi_read_tp
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
We call __aeabi_read_tp() to get the thread pointer. Since this is a
function call, we have to restore the FDPIC register afterwards.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (arm_load_tp): Add FDPIC support.
* config/arm/arm.md (load_tp_soft_fdpic): New pattern.
(load_tp_soft): Disable in FDPIC mode.
Change-Id: I0811cc7c5df8f44dd8b8b1f4caf54c7d3609c414
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 43fe467..9501e8d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -8729,7 +8729,18 @@ arm_load_tp (rtx target)
rtx tmp;
- emit_insn (gen_load_tp_soft ());
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_load_tp_soft_fdpic ());
+
+ /* Restore r9. */
+ emit_insn (gen_restore_pic_register_after_call(fdpic_reg, initial_fdpic_reg));
+ }
+ else
+ emit_insn (gen_load_tp_soft ());
tmp = gen_rtx_REG (SImode, R0_REGNUM);
emit_move_insn (target, tmp);
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 328d32d..ea015ed 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -11700,12 +11700,25 @@
)
;; Doesn't clobber R1-R3. Must use r0 for the first operand.
+(define_insn "load_tp_soft_fdpic"
+ [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
+ (clobber (reg:SI 9))
+ (clobber (reg:SI LR_REGNUM))
+ (clobber (reg:SI IP_REGNUM))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_SOFT_TP && TARGET_FDPIC"
+ "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
+ [(set_attr "conds" "clob")
+ (set_attr "type" "branch")]
+)
+
+;; Doesn't clobber R1-R3. Must use r0 for the first operand.
(define_insn "load_tp_soft"
[(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
(clobber (reg:SI LR_REGNUM))
(clobber (reg:SI IP_REGNUM))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_SOFT_TP"
+ "TARGET_SOFT_TP && !TARGET_FDPIC"
"bl\\t__aeabi_read_tp\\t@ load_tp_soft"
[(set_attr "conds" "clob")
(set_attr "type" "branch")]
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
2019-07-31 14:48 ` Christophe Lyon
@ 2019-08-29 15:40 ` Christophe Lyon
2019-08-30 8:54 ` Kyrill Tkachov
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 15:40 UTC (permalink / raw)
To: Christophe Lyon, Kyrill Tkachov; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 8034 bytes --]
On 31/07/2019 16:44, Christophe Lyon wrote:
> On Tue, 16 Jul 2019 at 14:42, Kyrill Tkachov
> <kyrylo.tkachov@foss.arm.com> wrote:
>>
>>
>> On 7/16/19 12:18 PM, Kyrill Tkachov wrote:
>>> Hi Christophe
>>>
>>> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>>>> In FDPIC mode, the trampoline generated to support pointers to nested
>>>> functions looks like:
>>>>
>>>> .word trampoline address
>>>> .word trampoline GOT address
>>>> ldr r12, [pc, #8]
>>>> ldr r9, [pc, #8]
>>>> ldr pc, [pc, #8]
>>>> .word static chain value
>>>> .word GOT address
>>>> .word function's address
>>>>
>>>> because in FDPIC function pointers are actually pointers to function
>>>> descriptors, we have to actually generate a function descriptor for
>>>> the trampoline.
>>>>
>>>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>>> Mickaël Guêné <mickael.guene@st.com>
>>>>
>>>> gcc/
>>>> * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
>>>> support.
>>>> (arm_trampoline_init): Likewise.
>>>> (arm_trampoline_init): Likewise.
>>>> * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
>>>>
>>>> Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
>>>>
>>>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>>>> index 40e3f3b..99d13bf 100644
>>>> --- a/gcc/config/arm/arm.c
>>>> +++ b/gcc/config/arm/arm.c
>>>> @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
>>>> .word static chain value
>>>> .word function's address
>>>> XXX FIXME: When the trampoline returns, r8 will be clobbered. */
>>>> +/* In FDPIC mode, the trampoline looks like:
>>>> + .word trampoline address
>>>> + .word trampoline GOT address
>>>> + ldr r12, [pc, #8] ; #4 for Thumb2
>>>> + ldr r9, [pc, #8] ; #4 for Thumb2
>>>> + ldr pc, [pc, #8] ; #4 for Thumb2
>>>> + .word static chain value
>>>> + .word GOT address
>>>> + .word function's address
>>>> +*/
>>>
>>>
>>> I think this comment is not right for Thumb2.
>>>
>>> These load instructionshave 32-bit encodings, even in Thumb2 (they use
>>> high registers).
>>
>> Andre and Wilco pointed out to me offline that the offset should be #4
>> for Arm mode.
>>
>> The Arm ARM at E1.2.3 says:
>>
>> PC, the program counter
>>
>> * When executing an A32 instruction, PC reads as the address of the
>> current instruction plus 8.
>>
>> * When executing a T32 instruction, PC reads as the address of the
>> current instruction plus 4.
>>
>
> Yes, it looks like the code is right, and the comment is wrong:
> - offset 8 for thumb2 mode
> - offset 4 for arm mode
>
Here is the updated version
> Thanks,
>
> Christophe
>
>> Thanks,
>>
>> Kyrill
>>
>>
>>>
>>> Also, please merge this comment with the one above (no separate /**/)
>>>
>>>>
>>>> static void
>>>> arm_asm_trampoline_template (FILE *f)
>>>> {
>>>> fprintf (f, "\t.syntax unified\n");
>>>>
>>>> - if (TARGET_ARM)
>>>> + if (TARGET_FDPIC)
>>>> + {
>>>> + /* The first two words are a function descriptor pointing to the
>>>> + trampoline code just below. */
>>>> + if (TARGET_ARM)
>>>> + fprintf (f, "\t.arm\n");
>>>> + else if (TARGET_THUMB2)
>>>> + fprintf (f, "\t.thumb\n");
>>>> + else
>>>> + /* Only ARM and Thumb-2 are supported. */
>>>> + gcc_unreachable ();
>>>> +
>>>> + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>> + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>> + /* Trampoline code which sets the static chain register but also
>>>> + PIC register before jumping into real code. */
>>>> + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>> + STATIC_CHAIN_REGNUM, PC_REGNUM,
>>>> + TARGET_THUMB2 ? 8 : 4);
>>>> + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>> + PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
>>>> + TARGET_THUMB2 ? 8 : 4);
>>>> + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>> + PC_REGNUM, PC_REGNUM,
>>>> + TARGET_THUMB2 ? 8 : 4);
>>>
>>>
>>> As above, I think the offset should be 8 for both Arm and Thumb2.
>>>
>>> Thanks,
>>>
>>> Kyrill
>>>
>>>
>>>> + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>> + }
>>>> + else if (TARGET_ARM)
>>>> {
>>>> fprintf (f, "\t.arm\n");
>>>> asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM,
>>>> PC_REGNUM);
>>>> @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
>>>> rtx chain_value)
>>>> emit_block_move (m_tramp, assemble_trampoline_template (),
>>>> GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
>>>>
>>>> - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
>>>> - emit_move_insn (mem, chain_value);
>>>> + if (TARGET_FDPIC)
>>>> + {
>>>> + rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
>>>> + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
>>>> + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode,
>>>> funcdesc, 4));
>>>> + /* The function start address is at offset 8, but in Thumb mode
>>>> + we want bit 0 set to 1 to indicate Thumb-ness, hence 9
>>>> + below. */
>>>> + rtx trampoline_code_start
>>>> + = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9
>>> : 8);
>>>> +
>>>> + /* Write initial funcdesc which points to the trampoline. */
>>>> + mem = adjust_address (m_tramp, SImode, 0);
>>>> + emit_move_insn (mem, trampoline_code_start);
>>>> + mem = adjust_address (m_tramp, SImode, 4);
>>>> + emit_move_insn (mem, gen_rtx_REG (Pmode,
>>> PIC_OFFSET_TABLE_REGNUM));
>>>> + /* Setup static chain. */
>>>> + mem = adjust_address (m_tramp, SImode, 20);
>>>> + emit_move_insn (mem, chain_value);
>>>> + /* GOT + real function entry point. */
>>>> + mem = adjust_address (m_tramp, SImode, 24);
>>>> + emit_move_insn (mem, gotaddr);
>>>> + mem = adjust_address (m_tramp, SImode, 28);
>>>> + emit_move_insn (mem, fnaddr);
>>>> + }
>>>> + else
>>>> + {
>>>> + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
>>>> + emit_move_insn (mem, chain_value);
>>>>
>>>> - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
>>>> - fnaddr = XEXP (DECL_RTL (fndecl), 0);
>>>> - emit_move_insn (mem, fnaddr);
>>>> + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
>>>> + fnaddr = XEXP (DECL_RTL (fndecl), 0);
>>>> + emit_move_insn (mem, fnaddr);
>>>> + }
>>>>
>>>> a_tramp = XEXP (m_tramp, 0);
>>>> emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
>>>> @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
>>>> rtx chain_value)
>>>> static rtx
>>>> arm_trampoline_adjust_address (rtx addr)
>>>> {
>>>> - if (TARGET_THUMB)
>>>> + /* For FDPIC don't fix trampoline address since it's a function
>>>> + descriptor and not a function address. */
>>>> + if (TARGET_THUMB && !TARGET_FDPIC)
>>>> addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
>>>> NULL, 0, OPTAB_LIB_WIDEN);
>>>> return addr;
>>>> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
>>>> index 45c0e2b..f80df63 100644
>>>> --- a/gcc/config/arm/arm.h
>>>> +++ b/gcc/config/arm/arm.h
>>>> @@ -1602,7 +1602,7 @@ typedef struct
>>>> #define INIT_EXPANDERS arm_init_expanders ()
>>>>
>>>> /* Length in units of the trampoline for entering a nested
>>> function. */
>>>> -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
>>>> +#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
>>>>
>>>> /* Alignment required for a trampoline in bits. */
>>>> #define TRAMPOLINE_ALIGNMENT 32
>>>> --
>>>> 2.6.3
>>>>
> .
>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0009-ARM-FDPIC-Add-support-for-taking-address-of-nested-f.patch --]
[-- Type: text/x-patch; name="0009-ARM-FDPIC-Add-support-for-taking-address-of-nested-f.patch", Size: 6043 bytes --]
From 6b116cbb0a84f467e1419385a271ecbc1963ffc1 Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 8 Feb 2018 14:34:20 +0100
Subject: [ARM/FDPIC v6 09/24] [ARM] FDPIC: Add support for taking address of
nested function
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In FDPIC mode, the trampoline generated to support pointers to nested
functions looks like:
.word trampoline address
.word trampoline GOT address
ldr r12, [pc, #8]
ldr r9, [pc, #8]
ldr pc, [pc, #8]
.word static chain value
.word GOT address
.word function's address
because in FDPIC function pointers are actually pointers to function
descriptors, we have to actually generate a function descriptor for
the trampoline.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
support.
(arm_trampoline_init): Likewise.
(arm_trampoline_init): Likewise.
* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index bd09536..4827988 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3974,14 +3974,52 @@ arm_warn_func_return (tree decl)
ldr pc, [pc]
.word static chain value
.word function's address
- XXX FIXME: When the trampoline returns, r8 will be clobbered. */
+ XXX FIXME: When the trampoline returns, r8 will be clobbered.
+
+ In FDPIC mode, the trampoline looks like:
+ .word trampoline address
+ .word trampoline GOT address
+ ldr r12, [pc, #8] ; #4 for Arm mode
+ ldr r9, [pc, #8] ; #4 for Arm mode
+ ldr pc, [pc, #8] ; #4 for Arm mode
+ .word static chain value
+ .word GOT address
+ .word function's address
+*/
static void
arm_asm_trampoline_template (FILE *f)
{
fprintf (f, "\t.syntax unified\n");
- if (TARGET_ARM)
+ if (TARGET_FDPIC)
+ {
+ /* The first two words are a function descriptor pointing to the
+ trampoline code just below. */
+ if (TARGET_ARM)
+ fprintf (f, "\t.arm\n");
+ else if (TARGET_THUMB2)
+ fprintf (f, "\t.thumb\n");
+ else
+ /* Only ARM and Thumb-2 are supported. */
+ gcc_unreachable ();
+
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+ /* Trampoline code which sets the static chain register but also
+ PIC register before jumping into real code. */
+ asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+ STATIC_CHAIN_REGNUM, PC_REGNUM,
+ TARGET_THUMB2 ? 8 : 4);
+ asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+ PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
+ TARGET_THUMB2 ? 8 : 4);
+ asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+ PC_REGNUM, PC_REGNUM,
+ TARGET_THUMB2 ? 8 : 4);
+ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+ }
+ else if (TARGET_ARM)
{
fprintf (f, "\t.arm\n");
asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
@@ -4022,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
emit_block_move (m_tramp, assemble_trampoline_template (),
GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
- mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
- emit_move_insn (mem, chain_value);
+ if (TARGET_FDPIC)
+ {
+ rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
+ rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+ rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+ /* The function start address is at offset 8, but in Thumb mode
+ we want bit 0 set to 1 to indicate Thumb-ness, hence 9
+ below. */
+ rtx trampoline_code_start
+ = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
+
+ /* Write initial funcdesc which points to the trampoline. */
+ mem = adjust_address (m_tramp, SImode, 0);
+ emit_move_insn (mem, trampoline_code_start);
+ mem = adjust_address (m_tramp, SImode, 4);
+ emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
+ /* Setup static chain. */
+ mem = adjust_address (m_tramp, SImode, 20);
+ emit_move_insn (mem, chain_value);
+ /* GOT + real function entry point. */
+ mem = adjust_address (m_tramp, SImode, 24);
+ emit_move_insn (mem, gotaddr);
+ mem = adjust_address (m_tramp, SImode, 28);
+ emit_move_insn (mem, fnaddr);
+ }
+ else
+ {
+ mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
+ emit_move_insn (mem, chain_value);
- mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
- fnaddr = XEXP (DECL_RTL (fndecl), 0);
- emit_move_insn (mem, fnaddr);
+ mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
+ fnaddr = XEXP (DECL_RTL (fndecl), 0);
+ emit_move_insn (mem, fnaddr);
+ }
a_tramp = XEXP (m_tramp, 0);
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
@@ -4041,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
static rtx
arm_trampoline_adjust_address (rtx addr)
{
- if (TARGET_THUMB)
+ /* For FDPIC don't fix trampoline address since it's a function
+ descriptor and not a function address. */
+ if (TARGET_THUMB && !TARGET_FDPIC)
addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
NULL, 0, OPTAB_LIB_WIDEN);
return addr;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 45c0e2b..f80df63 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1602,7 +1602,7 @@ typedef struct
#define INIT_EXPANDERS arm_init_expanders ()
/* Length in units of the trampoline for entering a nested function. */
-#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
+#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
/* Alignment required for a trampoline in bits. */
#define TRAMPOLINE_ALIGNMENT 32
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
2019-05-15 12:44 ` [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Christophe Lyon
2019-08-29 15:40 ` Christophe Lyon
@ 2019-08-29 15:44 ` Kyrill Tkachov
1 sibling, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-08-29 15:44 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe,
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> We call __aeabi_read_tp() to get the thread pointer. Since this is a
> function call, we have to restore the FDPIC register afterwards.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/
> Â Â Â Â Â Â Â * config/arm/arm.c (arm_load_tp): Add FDPIC support.
> Â Â Â Â Â Â Â * config/arm/arm.md (load_tp_soft_fdpic): New pattern.
> Â Â Â Â Â Â Â (load_tp_soft): Disable in FDPIC mode.
>
> Change-Id: I1f6dfaee6260ecb453270f4971b3c5124317a186
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 5fc7a20..26f29c7 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -8732,7 +8732,25 @@ arm_load_tp (rtx target)
>
> Â Â Â Â Â Â rtx tmp;
>
> -Â Â Â Â Â emit_insn (gen_load_tp_soft ());
> +Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
> +Â Â Â Â Â Â Â Â rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +Â Â Â Â Â Â Â Â rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode,
> FDPIC_REGNUM);
> +
> +Â Â Â Â Â Â Â Â emit_insn (gen_load_tp_soft_fdpic ());
> +
> +        /* Restore r9. */
> +Â Â Â Â Â Â Â Â XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (2, fdpic_reg,
> + initial_fdpic_reg),
> + UNSPEC_PIC_RESTORE);
> +Â Â Â Â Â Â Â Â XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg);
> +Â Â Â Â Â Â Â Â XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg);
> +Â Â Â Â Â Â Â Â emit_insn (par);
> +Â Â Â Â Â Â }
> +Â Â Â Â Â else
> +Â Â Â Â Â Â emit_insn (gen_load_tp_soft ());
>
> Â Â Â Â Â Â tmp = gen_rtx_REG (SImode, R0_REGNUM);
> Â Â Â Â Â Â emit_move_insn (target, tmp);
> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
> index 9036255..0edcb1d 100644
> --- a/gcc/config/arm/arm.md
> +++ b/gcc/config/arm/arm.md
> @@ -11759,12 +11759,25 @@
> Â )
>
>  ;; Doesn't clobber R1-R3. Must use r0 for the first operand.
> +(define_insn "load_tp_soft_fdpic"
> +Â [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
> +Â Â (clobber (reg:SI 9))
Use FDPIC_REGNUM here (does it need to be declared at the top of arm.md
for it to work?)
Otherwise this is ok.
Thanks,
Kyrill
> +Â Â (clobber (reg:SI LR_REGNUM))
> +Â Â (clobber (reg:SI IP_REGNUM))
> +Â Â (clobber (reg:CC CC_REGNUM))]
> +Â "TARGET_SOFT_TP && TARGET_FDPIC"
> +Â "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
> +Â [(set_attr "conds" "clob")
> +Â Â (set_attr "type" "branch")]
> +)
> +
> +;; Doesn't clobber R1-R3. Must use r0 for the first operand.
> Â (define_insn "load_tp_soft"
> Â Â [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
> Â Â Â (clobber (reg:SI LR_REGNUM))
> Â Â Â (clobber (reg:SI IP_REGNUM))
> Â Â Â (clobber (reg:CC CC_REGNUM))]
> -Â "TARGET_SOFT_TP"
> +Â "TARGET_SOFT_TP && !TARGET_FDPIC"
> Â Â "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
> Â Â [(set_attr "conds" "clob")
> Â Â Â (set_attr "type" "branch")]
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 00/21] FDPIC ABI for ARM
2019-08-29 14:54 ` Christophe Lyon
@ 2019-08-29 16:29 ` Christophe Lyon
0 siblings, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-08-29 16:29 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 26220 bytes --]
On 29/08/2019 15:57, Christophe Lyon wrote:
> Hi,
>
> On 15/05/2019 14:39, Christophe Lyon wrote:
>> Hello,
>>
>> This patch series implements the GCC contribution of the FDPIC ABI for
>> ARM targets.
>>
>> This ABI enables to run Linux on ARM MMU-less cores and supports
>> shared libraries to reduce the memory footprint.
>>
>> Without MMU, text and data segments relative distances are different
>> from one process to another, hence the need for a dedicated FDPIC
>> register holding the start address of the data segment. One of the
>> side effects is that function pointers require two words to be
>> represented: the address of the code, and the data segment start
>> address. These two words are designated as "Function Descriptor",
>> hence the "FD PIC" name.
>>
>> On ARM, the FDPIC register is r9 [1], and the target name is
>> arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
>> ABI and the BFLAT file format; it does not support code sharing.
>> The -mfdpic option is enabled by default, and -mno-fdpic should be
>> used to build the Linux kernel.
>>
>> This work was developed some time ago by STMicroelectronics, and was
>> presented during Linaro Connect SFO15 (September 2015). You can watch
>> the discussion and read the slides [2].
>> This presentation was related to the toolchain published on github [3],
>> which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
>> and qemu-2.3.0, and for which pre-built binaries are available [3].
>>
>> The ABI itself is described in details in [1].
>>
>> Our Linux kernel patches have been updated and committed by Nicolas
>> Pitre (Linaro) in July 2017. They are required so that the loader is
>> able to handle this new file type. Indeed, the ELF files are tagged
>> with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
>> well as the new relocations involved.
>>
>> The binutils, QEMU and uclibc-ng patch series have been merged a few
>> months ago. [4][5][6]
>>
>> This series provides support for architectures that support ARM and/or
>> Thumb-2 and has been tested on arm-linux-gnueabi without regression,
>> as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has
>> a few more failures than arm-linux-gnueabi, but is quite functional.
>>
>> I have also booted an STM32 board (stm32f469) which uses a cortex-m4
>> with linux-4.20.17 and ran successfully several tools.
>>
>> Are the GCC patches OK for inclusion in master?
>>
> I have addressed the comments I received on v5, and I am going to post updated versions of the patches that needed changes as follow-ups in this thread. I hope this will help reviewers as I will provide answers and updated patches next to their comments. After that, I will rebase the whole series and send it as v6 if that helps (several testsuite patches have already been approved as-is, but committing them now would change the patch numbering, thus possibly confusing reviewers).
>
> However, note that several patches in the series haven't received feedback yet, so this is a ping for them :-)
> [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions
> [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support.
> [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame
> [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
> [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
>
I forgot to mention that I found a problem in libitm's sjlj.S, worth this additional patch.
Christophe
> Thanks,
>
> Christophe
>
>> Changes between v4 and v5:
>> - rebased on top of recent gcc-10 master (April 26th, 2019)
>> - fixed handling of stack-protector combined patterns in FDPIC mode
>>
>> Changes between v3 and v4:
>>
>> - improved documentation (patch 1)
>> - emit an error message (sorry) if the target architecture does not
>> Â Â support arm nor thumb-2 modes (patch 4)
>> - handle Richard's comments on patch 4 (comments, unspec)
>> - added .align directive (patch 5)
>> - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6)
>> - code factorization in patch 7
>> - typos/internal function name in patch 8
>> - improved patch 12
>> - dropped patch 16
>> - patch 20 introduces arm_arch*_thumb_ok effective targets to help
>> Â Â skip some tests
>> - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many
>> Â Â new tests, but a few regressions
>> Â Â (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html)
>> - I compiled and executed several LTP tests to exercise pthreads and signals
>> - I wrote and executed a simple testcase to change the interaction
>> Â Â with __kernel_cmpxchg (ie. call the kernel helper rather than use an
>> Â Â implementation in libgcc as requested by Richard)
>>
>> Changes between v2 and v3:
>> - added doc entry for -mfdpic new option
>> - took Kyrill's comments into account (use "Armv7" instead of "7",
>> Â Â code factorization, use preprocessor instead of hard-coding "r9",
>> Â Â remove leftover code for thumb1 support, fixed comments)
>> - rebase over recent trunk
>> - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
>> Â Â 14 (rebase), 19 (rebase)
>>
>> Changes between v1 and v2:
>> - fix GNU coding style
>> - exit with an error for pre-Armv7
>> - use ACLE __ARM_ARCH and remove dead code for pre-Armv4
>> - remove unsupported attempts of pre-Armv7/thumb1 support
>> - add instructions in comments next to opcodes
>> - merge patches 11 and 13
>> - fixed protected visibility handling in patch 8
>> - merged legitimize_tls_address_fdpic and
>> Â Â legitimize_tls_address_not_fdpic as requested
>>
>> Thanks,
>>
>> Christophe.
>>
>>
>> [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
>> [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
>> [3] https://github.com/mickael-guene/fdpic_manifest
>> [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
>> [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
>> [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d
>>
>> Christophe Lyon (21):
>> Â Â [ARM] FDPIC: Add -mfdpic option support
>> Â Â [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
>> Â Â [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
>> Â Â [ARM] FDPIC: Add support for FDPIC for arm architecture
>> Â Â [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
>> Â Â [ARM] FDPIC: Add support for c++ exceptions
>> Â Â [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
>> Â Â [ARM] FDPIC: Enforce local/global binding for function descriptors
>> Â Â [ARM] FDPIC: Add support for taking address of nested function
>> Â Â [ARM] FDPIC: Implement TLS support.
>> Â Â [ARM] FDPIC: Add support to unwind FDPIC signal frame
>> Â Â [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
>> Â Â [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
>> Â Â [ARM][testsuite] FDPIC: Skip unsupported tests
>> Â Â [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
>> Â Â [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
>> Â Â [ARM][testsuite] FDPIC: Handle *-*-uclinux*
>> Â Â [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
>> Â Â [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
>> Â Â [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by
>> Â Â Â Â FDPIC
>> Â Â [ARM] FDPIC: Handle stack-protector combined patterns
>>
>> Â config/futex.m4Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â config/tls.m4Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>>  gcc/config.gcc                                    | 13 +-
>>  gcc/config/arm/arm-c.c                            |  2 +
>>  gcc/config/arm/arm-protos.h                       |  1 +
>>  gcc/config/arm/arm.c                              | 485 ++++++++++++++++++---
>>  gcc/config/arm/arm.h                              | 16 +-
>>  gcc/config/arm/arm.md                             | 151 ++++++-
>>  gcc/config/arm/arm.opt                            |  4 +
>>  gcc/config/arm/bpabi.h                            |  4 +-
>>  gcc/config/arm/linux-eabi.h                       |  7 +-
>>  gcc/config/arm/uclinuxfdpiceabi.h                 | 53 +++
>>  gcc/config/arm/unspecs.md                         |  1 +
>>  gcc/doc/invoke.texi                               | 20 +-
>>  gcc/ginclude/unwind-arm-common.h                  |  2 +-
>> Â gcc/testsuite/g++.dg/abi/forced.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/abi/guard2.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/cpp0x/noexcept03.CÂ Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ext/cleanup-10.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ext/cleanup-11.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ext/cleanup-8.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ext/cleanup-9.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ext/sync-4.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/comdat.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/devirt-c-7.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 3 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-1.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-2.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-3.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-4.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-5.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-7.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-8.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/ipa/ivinline-9.CÂ Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>> Â gcc/testsuite/g++.dg/other/anon5.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 1 +
>> Â gcc/testsuite/g++.dg/tls/pr79288.CÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â Â 2 +-
>>  gcc/testsuite/gcc.c-torture/compile/pr82096.c     |  2 +-
>>  gcc/testsuite/gcc.dg/20020312-2.c                 |  1 +
>>  gcc/testsuite/gcc.dg/20041106-1.c                 |  2 +-
>>  gcc/testsuite/gcc.dg/addr_equal-1.c               |  3 +-
>>  gcc/testsuite/gcc.dg/cleanup-10.c                 |  2 +-
>>  gcc/testsuite/gcc.dg/cleanup-11.c                 |  2 +-
>>  gcc/testsuite/gcc.dg/cleanup-8.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/cleanup-9.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/const-1.c                    |  2 +-
>>  gcc/testsuite/gcc.dg/fdata-sections-1.c           |  2 +-
>>  gcc/testsuite/gcc.dg/fdata-sections-2.c           |  2 +-
>>  gcc/testsuite/gcc.dg/ipa/pure-const-1.c           |  2 +-
>>  gcc/testsuite/gcc.dg/noreturn-8.c                 |  2 +-
>>  gcc/testsuite/gcc.dg/pr33826.c                    |  3 +-
>>  gcc/testsuite/gcc.dg/pr39323-1.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/pr39323-2.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/pr39323-3.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/pr65780-1.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/pr65780-2.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/pr67338.c                    |  2 +-
>>  gcc/testsuite/gcc.dg/pr78185.c                    |  2 +-
>>  gcc/testsuite/gcc.dg/pr83100-1.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/pr83100-4.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-12g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-14g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-14gf.c             |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-16g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-17g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-18g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-1f.c               |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-22g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-2f.c               |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-31g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-33g.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-4g.c               |  2 +-
>>  gcc/testsuite/gcc.dg/strlenopt-4gf.c              |  2 +-
>>  gcc/testsuite/gcc.dg/strncmp-2.c                  |  2 +-
>>  gcc/testsuite/gcc.dg/struct-ret-3.c               |  2 +-
>>  gcc/testsuite/gcc.dg/torture/ipa-pta-1.c          |  2 +-
>>  gcc/testsuite/gcc.dg/torture/pr69760.c            |  2 +-
>>  gcc/testsuite/gcc.dg/tree-ssa/alias-2.c           |  2 +-
>>  gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c       |  2 +-
>>  gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c          |  2 +-
>>  gcc/testsuite/gcc.target/arm/20051215-1.c         |  1 +
>>  .../gcc.target/arm/armv6-unaligned-load-ice.c     |  1 +
>>  .../gcc.target/arm/attr-unaligned-load-ice.c      |  1 +
>>  gcc/testsuite/gcc.target/arm/attr_arm-err.c       |  1 +
>>  gcc/testsuite/gcc.target/arm/data-rel-2.c         |  1 +
>>  gcc/testsuite/gcc.target/arm/data-rel-3.c         |  1 +
>>  gcc/testsuite/gcc.target/arm/div64-unwinding.c    |  2 +-
>>  gcc/testsuite/gcc.target/arm/eliminate.c          |  2 +-
>>  gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c    |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c   |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c   |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c  |  1 +
>> Â gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c |Â Â 1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c    |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c  |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c   |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c  |  1 +
>> Â gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c |Â Â 1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c   |  1 +
>>  gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c |  1 +
>>  gcc/testsuite/gcc.target/arm/g2.c                 |  1 +
>>  gcc/testsuite/gcc.target/arm/interrupt-1.c        |  6 +-
>>  gcc/testsuite/gcc.target/arm/interrupt-2.c        |  6 +-
>>  gcc/testsuite/gcc.target/arm/ivopts-2.c           |  2 +-
>>  gcc/testsuite/gcc.target/arm/ivopts-3.c           |  2 +-
>>  gcc/testsuite/gcc.target/arm/ivopts-4.c           |  2 +-
>>  gcc/testsuite/gcc.target/arm/ivopts-5.c           |  2 +-
>>  gcc/testsuite/gcc.target/arm/macro_defs1.c        |  1 +
>>  gcc/testsuite/gcc.target/arm/mmx-1.c              |  1 +
>>  gcc/testsuite/gcc.target/arm/pr19599.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/pr40887.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/pr43597.c            |  2 +-
>>  gcc/testsuite/gcc.target/arm/pr43698.c            |  4 +-
>>  gcc/testsuite/gcc.target/arm/pr43920-2.c          |  2 +-
>>  gcc/testsuite/gcc.target/arm/pr45701-1.c          |  4 +-
>>  gcc/testsuite/gcc.target/arm/pr45701-2.c          |  4 +-
>>  gcc/testsuite/gcc.target/arm/pr59858.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/pr61948.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/pr65647-2.c          |  1 +
>>  gcc/testsuite/gcc.target/arm/pr66912.c            |  2 +-
>>  gcc/testsuite/gcc.target/arm/pr70830.c            |  3 +-
>>  gcc/testsuite/gcc.target/arm/pr77933-1.c          |  1 +
>>  gcc/testsuite/gcc.target/arm/pr77933-2.c          |  1 +
>>  gcc/testsuite/gcc.target/arm/pr79058.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/pr83712.c            |  1 +
>>  .../gcc.target/arm/pragma_arch_switch_2.c         |  1 +
>>  gcc/testsuite/gcc.target/arm/scd42-1.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/scd42-2.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/scd42-3.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/sibcall-1.c          |  1 +
>>  gcc/testsuite/gcc.target/arm/stack-checking.c     |  2 +-
>>  gcc/testsuite/gcc.target/arm/stack-red-zone.c     |  2 +-
>>  gcc/testsuite/gcc.target/arm/synchronize.c        |  2 +-
>>  gcc/testsuite/gcc.target/arm/tail-long-call.c     |  1 +
>>  gcc/testsuite/gcc.target/arm/tlscall.c            |  1 +
>>  gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c  |  1 +
>>  gcc/testsuite/lib/target-supports.exp             | 10 +
>>  libatomic/configure                               |  8 +-
>>  libatomic/configure.tgt                           |  2 +-
>>  libgcc/config.host                                |  4 +-
>>  libgcc/config/arm/linux-atomic.c                  | 55 ++-
>>  libgcc/config/arm/unwind-arm.c                    |  5 +
>>  libgcc/config/arm/unwind-arm.h                    | 31 +-
>>  libgcc/crtstuff.c                                 | 18 +
>>  libgcc/unwind-arm-common.inc                      | 216 +++++++++
>>  libgcc/unwind-pe.h                                | 17 +
>>  libitm/configure                                  | 20 +-
>>  libitm/configure.tgt                              |  2 +-
>>  libsanitizer/configure.tgt                        |  3 +
>> Â libstdc++-v3/acinclude.m4Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â 12 +-
>>  libstdc++-v3/configure                            | 36 +-
>>  libstdc++-v3/configure.host                       |  6 +-
>>  libstdc++-v3/libsupc++/eh_personality.cc          | 10 +-
>> Â libtool.m4Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |Â 14 +-
>> Â 156 files changed, 1233 insertions(+), 219 deletions(-)
>> Â create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h
>>
>
[-- Attachment #2: 0023-ARM-FDPIC-Implement-libitm-support.patch --]
[-- Type: text/x-patch, Size: 1050 bytes --]
From 5da6c409d616a30dddd56aa6512eb79db1acb8fe Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu, 29 Aug 2019 13:14:04 +0000
Subject: [ARM/FDPIC v6 23/24] [ARM] FDPIC: Implement libitm support.
The ldaddr macro in sjlj.S needs to be updated to support the FDPIC
model.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
libitm/
* config/arm/sjlj.S (ldaddr): Add FDPIC support.
Change-Id: Ieb2c6613363341d109c3500af0575b133b17407d
diff --git a/libitm/config/arm/sjlj.S b/libitm/config/arm/sjlj.S
index a9abf16..5d44964 100644
--- a/libitm/config/arm/sjlj.S
+++ b/libitm/config/arm/sjlj.S
@@ -49,7 +49,16 @@
.arch armv7-m
#endif
-#if defined(HAVE_MOVT) && defined(PIC)
+#if defined(__FDPIC__)
+.macro ldaddr reg, addr
+ ldr \reg, 99f
+ add \reg, \reg, r9
+.subsection 1
+ .align 2
+99: .word \addr(GOTOFF)
+.subsection 0
+.endm
+#elif defined(HAVE_MOVT) && defined(PIC)
.macro ldaddr reg, addr
movw \reg, #:lower16:(\addr - (98f + PC_OFS))
movt \reg, #:upper16:(\addr - (98f + PC_OFS))
--
2.6.3
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
2019-08-29 15:39 ` Christophe Lyon
@ 2019-08-30 8:41 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-08-30 8:41 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> On 12/07/2019 08:06, Richard Sandiford wrote:
>> Christophe Lyon <christophe.lyon@st.com> writes:
>>> In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
>>> are referenced by their address, not by pointers to the function
>>> descriptors.
>>>
>>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>> Mickaël Guêné <mickael.guene@st.com>
>>>
>>> * libgcc/crtstuff.c: Add support for FDPIC.
>>>
>>> Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
>>>
>>> diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
>>> index 4927a9f..159b461 100644
>>> --- a/libgcc/crtstuff.c
>>> +++ b/libgcc/crtstuff.c
>>> @@ -429,9 +429,18 @@ __do_global_dtors_aux (void)
>>> #ifdef FINI_SECTION_ASM_OP
>>> CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
>>> #elif defined (FINI_ARRAY_SECTION_ASM_OP)
>>> +#if defined(__FDPIC__)
>>> +__asm__(
>>> + " .section .fini_array\n"
>>> + " .align 2\n"
>>> + " .word __do_global_dtors_aux\n"
>>> +);
>>> +asm (TEXT_SECTION_ASM_OP);
>>> +#else /* defined(__FDPIC__) */
>>> static func_ptr __do_global_dtors_aux_fini_array_entry[]
>>> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
>>> = { __do_global_dtors_aux };
>>> +#endif /* defined(__FDPIC__) */
>>> #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
>>> static void __attribute__((used))
>>> __do_global_dtors_aux_1 (void)
>>
>> It'd be good to avoid hard-coding the pointer size. Would it work to do:
>>
>> __asm__("\t.equ\.t__do_global_dtors_aux_alias, __do_global_dtors_aux\n");
>> extern char __do_global_dtors_aux_alias;
>> static void *__do_global_dtors_aux_fini_array_entry[]
>> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *))))
>> = { &__do_global_dtors_aux_alias };
>>
>> ? Similarly for the init_array.
>>
> OK, done.
>
>> AFAICT this and 02/21 are the only patches that aren't Arm-specific,
>> is that right?
>>
>> Thanks,
>> Richard
>> .
>>
>
> From ea0eee1ddeddef92277ae68eac4af28994c2902c Mon Sep 17 00:00:00 2001
> From: Christophe Lyon <christophe.lyon@linaro.org>
> Date: Thu, 8 Feb 2018 11:12:52 +0100
> Subject: [ARM/FDPIC v6 05/24] [ARM] FDPIC: Fix __do_global_dtors_aux and
> frame_dummy generation
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
> are referenced by their address, not by pointers to the function
> descriptors.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Micka«l Guªn© <mickael.guene@st.com>
>
> libgcc/
> * libgcc/crtstuff.c: Add support for FDPIC.
OK, thanks.
Richard
>
> Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1
>
> diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
> index 4927a9f..6659039 100644
> --- a/libgcc/crtstuff.c
> +++ b/libgcc/crtstuff.c
> @@ -429,9 +429,17 @@ __do_global_dtors_aux (void)
> #ifdef FINI_SECTION_ASM_OP
> CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
> #elif defined (FINI_ARRAY_SECTION_ASM_OP)
> +#if defined(__FDPIC__)
> +__asm__("\t.equ\t__do_global_dtors_aux_alias, __do_global_dtors_aux\n");
> +extern char __do_global_dtors_aux_alias;
> +static void *__do_global_dtors_aux_fini_array_entry[]
> +__attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *))))
> + = { &__do_global_dtors_aux_alias };
> +#else /* defined(__FDPIC__) */
> static func_ptr __do_global_dtors_aux_fini_array_entry[]
> __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr))))
> = { __do_global_dtors_aux };
> +#endif /* defined(__FDPIC__) */
> #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
> static void __attribute__((used))
> __do_global_dtors_aux_1 (void)
> @@ -473,9 +481,17 @@ frame_dummy (void)
> #ifdef __LIBGCC_INIT_SECTION_ASM_OP__
> CRT_CALL_STATIC_FUNCTION (__LIBGCC_INIT_SECTION_ASM_OP__, frame_dummy)
> #else /* defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
> +#if defined(__FDPIC__)
> +__asm__("\t.equ\t__frame_dummy_alias, frame_dummy\n");
> +extern char __frame_dummy_alias;
> +static void *__frame_dummy_init_array_entry[]
> +__attribute__ ((__used__, section(".init_array"), aligned(sizeof(void *))))
> + = { &__frame_dummy_alias };
> +#else /* defined(__FDPIC__) */
> static func_ptr __frame_dummy_init_array_entry[]
> __attribute__ ((__used__, section(".init_array"), aligned(sizeof(func_ptr))))
> = { frame_dummy };
> +#endif /* defined(__FDPIC__) */
> #endif /* !defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
> #endif /* USE_EH_FRAME_REGISTRY || USE_TM_CLONE_REGISTRY */
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
2019-08-29 15:40 ` Christophe Lyon
@ 2019-08-30 8:54 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-08-30 8:54 UTC (permalink / raw)
To: Christophe Lyon, Christophe Lyon; +Cc: gcc-patches
On 8/29/19 4:36 PM, Christophe Lyon wrote:
> On 31/07/2019 16:44, Christophe Lyon wrote:
>> On Tue, 16 Jul 2019 at 14:42, Kyrill Tkachov
>> <kyrylo.tkachov@foss.arm.com> wrote:
>>>
>>>
>>> On 7/16/19 12:18 PM, Kyrill Tkachov wrote:
>>>> Hi Christophe
>>>>
>>>> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>>>>> In FDPIC mode, the trampoline generated to support pointers to nested
>>>>> functions looks like:
>>>>>
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word trampoline address
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word trampoline GOT address
>>>>>            ldr           r12, [pc, #8]
>>>>>            ldr           r9, [pc, #8]
>>>>>            ldr          pc, [pc, #8]
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word static chain value
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word GOT address
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word function's address
>>>>>
>>>>> because in FDPIC function pointers are actually pointers to function
>>>>> descriptors, we have to actually generate a function descriptor for
>>>>> the trampoline.
>>>>>
>>>>> 2019-XX-XXÂ Christophe Lyon <christophe.lyon@st.com>
>>>>>         Mickaël Guêné <mickael.guene@st.com>
>>>>>
>>>>> Â Â Â Â Â Â Â Â gcc/
>>>>> Â Â Â Â Â Â Â Â * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
>>>>> Â Â Â Â Â Â Â Â support.
>>>>> Â Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
>>>>> Â Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
>>>>> Â Â Â Â Â Â Â Â * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
>>>>>
>>>>> Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
>>>>>
>>>>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>>>>> index 40e3f3b..99d13bf 100644
>>>>> --- a/gcc/config/arm/arm.c
>>>>> +++ b/gcc/config/arm/arm.c
>>>>> @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â .word static chain value
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â .word function's address
>>>>> Â Â Â Â XXX FIXME: When the trampoline returns, r8 will be
>>>>> clobbered. */
>>>>> +/* In FDPIC mode, the trampoline looks like:
>>>>> +Â Â Â Â Â Â Â Â Â .word trampoline address
>>>>> +Â Â Â Â Â Â Â Â Â .word trampoline GOT address
>>>>> +         ldr           r12, [pc, #8] ; #4 for Thumb2
>>>>> +         ldr           r9, [pc, #8] ; #4 for Thumb2
>>>>> +         ldr          pc, [pc, #8] ; #4 for Thumb2
>>>>> +Â Â Â Â Â Â Â Â Â .word static chain value
>>>>> +Â Â Â Â Â Â Â Â Â .word GOT address
>>>>> +Â Â Â Â Â Â Â Â Â .word function's address
>>>>> +*/
>>>>
>>>>
>>>> I think this comment is not right for Thumb2.
>>>>
>>>> These load instructionshave 32-bit encodings, even in Thumb2 (they use
>>>> high registers).
>>>
>>> Andre and Wilco pointed out to me offline that the offset should be #4
>>> for Arm mode.
>>>
>>> The Arm ARM at E1.2.3 says:
>>>
>>> PC, the program counter
>>>
>>> * When executing an A32 instruction, PC reads as the address of the
>>> current instruction plus 8.
>>>
>>> * When executing a T32 instruction, PC reads as the address of the
>>> current instruction plus 4.
>>>
>>
>> Yes, it looks like the code is right, and the comment is wrong:
>> - offset 8 for thumb2 mode
>> - offset 4 for arm mode
>>
> Here is the updated version
>
Ok with a fixed ChangeLog (it currently mentions arm_trampoline_init
twice but doesn't mention arm_trampoline_adjust_address)
Thanks,
Kyrill
>> Thanks,
>>
>> Christophe
>>
>>> Thanks,
>>>
>>> Kyrill
>>>
>>>
>>>>
>>>> Also, please merge this comment with the one above (no separate /**/)
>>>>
>>>>>
>>>>> Â static void
>>>>> Â arm_asm_trampoline_template (FILE *f)
>>>>> Â {
>>>>> Â Â Â fprintf (f, "\t.syntax unified\n");
>>>>>
>>>>> -Â if (TARGET_ARM)
>>>>> +Â if (TARGET_FDPIC)
>>>>> +Â Â Â {
>>>>> +Â Â Â Â Â /* The first two words are a function descriptor pointing
>>>>> to the
>>>>> +       trampoline code just below. */
>>>>> +Â Â Â Â Â if (TARGET_ARM)
>>>>> +Â Â Â Â Â Â fprintf (f, "\t.arm\n");
>>>>> +Â Â Â Â Â else if (TARGET_THUMB2)
>>>>> +Â Â Â Â Â Â fprintf (f, "\t.thumb\n");
>>>>> +Â Â Â Â Â else
>>>>> +      /* Only ARM and Thumb-2 are supported. */
>>>>> +Â Â Â Â Â Â gcc_unreachable ();
>>>>> +
>>>>> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>>> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>>> +Â Â Â Â Â /* Trampoline code which sets the static chain register but
>>>>> also
>>>>> +Â Â Â Â Â Â Â PIC register before jumping into real code. */
>>>>> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â STATIC_CHAIN_REGNUM, PC_REGNUM,
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>>>>> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>>>>> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PC_REGNUM, PC_REGNUM,
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>>>>
>>>>
>>>> As above, I think the offset should be 8 for both Arm and Thumb2.
>>>>
>>>> Thanks,
>>>>
>>>> Kyrill
>>>>
>>>>
>>>>> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>>> +Â Â Â }
>>>>> +Â else if (TARGET_ARM)
>>>>> Â Â Â Â Â {
>>>>> Â Â Â Â Â Â Â fprintf (f, "\t.arm\n");
>>>>> Â Â Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM,
>>>>> PC_REGNUM);
>>>>> @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree
>>>>> fndecl,
>>>>> rtx chain_value)
>>>>> Â Â Â emit_block_move (m_tramp, assemble_trampoline_template (),
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
>>>>>
>>>>> -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
>>>>> -Â emit_move_insn (mem, chain_value);
>>>>> +Â if (TARGET_FDPIC)
>>>>> +Â Â Â {
>>>>> +Â Â Â Â Â rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
>>>>> +Â Â Â Â Â rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
>>>>> +Â Â Â Â Â rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode,
>>>>> funcdesc, 4));
>>>>> +Â Â Â Â Â /* The function start address is at offset 8, but in Thumb
>>>>> mode
>>>>> +Â Â Â Â Â Â Â we want bit 0 set to 1 to indicate Thumb-ness, hence 9
>>>>> +       below. */
>>>>> +Â Â Â Â Â rtx trampoline_code_start
>>>>> +Â Â Â Â Â Â = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9
>>>> : 8);
>>>>> +
>>>>> +     /* Write initial funcdesc which points to the trampoline. */
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 0);
>>>>> +Â Â Â Â Â emit_move_insn (mem, trampoline_code_start);
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 4);
>>>>> +Â Â Â Â Â emit_move_insn (mem, gen_rtx_REG (Pmode,
>>>> PIC_OFFSET_TABLE_REGNUM));
>>>>> +     /* Setup static chain. */
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 20);
>>>>> +Â Â Â Â Â emit_move_insn (mem, chain_value);
>>>>> +     /* GOT + real function entry point. */
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 24);
>>>>> +Â Â Â Â Â emit_move_insn (mem, gotaddr);
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 28);
>>>>> +Â Â Â Â Â emit_move_insn (mem, fnaddr);
>>>>> +Â Â Â }
>>>>> +Â else
>>>>> +Â Â Â {
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
>>>>> +Â Â Â Â Â emit_move_insn (mem, chain_value);
>>>>>
>>>>> -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
>>>>> -Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
>>>>> -Â emit_move_insn (mem, fnaddr);
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 :
>>>>> 16);
>>>>> +Â Â Â Â Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
>>>>> +Â Â Â Â Â emit_move_insn (mem, fnaddr);
>>>>> +Â Â Â }
>>>>>
>>>>> Â Â Â a_tramp = XEXP (m_tramp, 0);
>>>>> Â Â Â emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
>>>>> @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
>>>>> rtx chain_value)
>>>>> Â static rtx
>>>>> Â arm_trampoline_adjust_address (rtx addr)
>>>>> Â {
>>>>> -Â if (TARGET_THUMB)
>>>>> +Â /* For FDPIC don't fix trampoline address since it's a function
>>>>> +    descriptor and not a function address. */
>>>>> +Â if (TARGET_THUMB && !TARGET_FDPIC)
>>>>> Â Â Â Â Â addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â NULL, 0, OPTAB_LIB_WIDEN);
>>>>> Â Â Â return addr;
>>>>> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
>>>>> index 45c0e2b..f80df63 100644
>>>>> --- a/gcc/config/arm/arm.h
>>>>> +++ b/gcc/config/arm/arm.h
>>>>> @@ -1602,7 +1602,7 @@ typedef struct
>>>>> Â #define INIT_EXPANDERSÂ arm_init_expanders ()
>>>>>
>>>>> Â /* Length in units of the trampoline for entering a nested
>>>> function. */
>>>>> -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
>>>>> +#define TRAMPOLINE_SIZEÂ (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16
>>>>> : 20))
>>>>>
>>>>>  /* Alignment required for a trampoline in bits. */
>>>>> Â #define TRAMPOLINE_ALIGNMENTÂ 32
>>>>> --
>>>>> 2.6.3
>>>>>
>> .
>>
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-08-29 15:14 ` Christophe Lyon
@ 2019-08-30 9:30 ` Richard Sandiford
2019-08-30 14:48 ` Christophe Lyon
2019-08-30 14:40 ` Jonathan Wakely
1 sibling, 1 reply; 109+ messages in thread
From: Richard Sandiford @ 2019-08-30 9:30 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches, libstdc++
Christophe Lyon <christophe.lyon@st.com> writes:
> @@ -785,7 +785,7 @@ case ${target} in
> esac
> tmake_file="t-slibgcc"
> case $target in
> - *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
> + *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
> :;;
> *-*-gnu*)
> native_system_header_dir=/include
I don't think this is necessary, since this target will never match the
following *-*-gnu*) stanza anyway.
> diff --git a/libtool.m4 b/libtool.m4
> index 8966762..64e507a 100644
> --- a/libtool.m4
> +++ b/libtool.m4
> @@ -3734,7 +3739,7 @@ m4_if([$1], [CXX], [
> ;;
> esac
> ;;
> - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
> case $cc_basename in
> KCC*)
> # KAI C++ Compiler
Is this needed? It seems to be in the !GCC branch of an if/else.
If it is needed, the default:
_LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
seems correct for non-FDPIC uclinux.
> @@ -4032,7 +4037,7 @@ m4_if([$1], [CXX], [
> _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
> ;;
>
> - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
> case $cc_basename in
> # old Intel for x86_64 which still supported -KPIC.
> ecc*)
Same here.
> @@ -5946,7 +5951,7 @@ if test "$_lt_caught_CXX_error" != yes; then
> _LT_TAGVAR(inherit_rpath, $1)=yes
> ;;
>
> - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
> case $cc_basename in
> KCC*)
> # Kuck and Associates, Inc. (KAI) C++ Compiler
Here too the code seems to be dealing specifically with non-GCC compilers.
> @@ -6598,7 +6603,7 @@ interix[[3-9]]*)
> _LT_TAGVAR(postdeps,$1)=
> ;;
>
> -linux*)
> +linux* | uclinux*)
> case `$CC -V 2>&1 | sed 5q` in
> *Sun\ C*)
> # Sun C++ 5.9
Here too. (It only seems to do anything for Sun's C compiler.)
The fewer hunks we have to maintain downstream the better :-)
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions
2019-05-15 12:42 ` [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions Christophe Lyon
@ 2019-08-30 9:31 ` Kyrill Tkachov
2019-08-30 14:44 ` Jonathan Wakely
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-08-30 9:31 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches; +Cc: libstdc++, ian
As Richard mentioned in an earlier post the generic libgcc and libstdc++
changes will need approval from the relevant maintainers.
CC'ing the libstdc++ list and the libgcc maintainer.
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> The main difference with existing support is that function addresses
> are function descriptor addresses instead. This means that all code
> dealing with function pointers now has to cope with function
> descriptors instead.
>
> For the same reason, Linux kernel helpers can no longer be called by
> dereferencing their address, so we implement wrappers that directly
> call the kernel helpers.
>
> When restoring a function address, we also have to restore the FDPIC
> register value (r9).
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/
> Â Â Â Â Â Â Â * ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
> Â Â Â Â Â Â Â field.
> Â Â Â Â Â Â Â (FDPIC_REGNUM): New define.
>
> Â Â Â Â Â Â Â libgcc/
> Â Â Â Â Â Â Â * config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
> Â Â Â Â Â Â Â (__kernel_dmb): Likewise.
> Â Â Â Â Â Â Â (__fdpic_cmpxchg): New function.
> Â Â Â Â Â Â Â (__fdpic_dmb): New function.
> Â Â Â Â Â Â Â * config/arm/unwind-arm.h (FDPIC_REGNUM): New define.
> Â Â Â Â Â Â Â (gnu_Unwind_Find_got): New function.
> Â Â Â Â Â Â Â (_Unwind_decode_typeinfo_ptr): Add FDPIC support.
> Â Â Â Â Â Â Â * unwind-arm-common.inc (UCB_PR_GOT): New.
> Â Â Â Â Â Â Â (funcdesc_t): New struct.
> Â Â Â Â Â Â Â (get_eit_entry): Add FDPIC support.
> Â Â Â Â Â Â Â (unwind_phase2): Likewise.
> Â Â Â Â Â Â Â (unwind_phase2_forced): Likewise.
> Â Â Â Â Â Â Â (__gnu_Unwind_RaiseException): Likewise.
> Â Â Â Â Â Â Â (__gnu_Unwind_Resume): Likewise.
> Â Â Â Â Â Â Â (__gnu_Unwind_Backtrace): Likewise.
> Â Â Â Â Â Â Â * unwind-pe.h (read_encoded_value_with_base): Likewise.
>
> Â Â Â Â Â Â Â libstdc++/
> Â Â Â Â Â Â Â * libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
> Â Â Â Â Â Â Â support.
>
> Change-Id: I64b81cfaf390a05f2fd121f44ba1912cb4b47cae
>
> diff --git a/gcc/ginclude/unwind-arm-common.h
> b/gcc/ginclude/unwind-arm-common.h
> index 6df783e..d4eb03e 100644
> --- a/gcc/ginclude/unwind-arm-common.h
> +++ b/gcc/ginclude/unwind-arm-common.h
> @@ -91,7 +91,7 @@ extern "C" {
> Â Â Â Â Â Â Â Â Â Â _uw reserved2;Â /* Personality routine address */
> Â Â Â Â Â Â Â Â Â Â _uw reserved3;Â /* Saved callsite address */
> Â Â Â Â Â Â Â Â Â Â _uw reserved4;Â /* Forced unwind stop arg */
> -Â Â Â Â Â Â Â Â _uw reserved5;
> +Â Â Â Â Â Â Â Â _uw reserved5;Â /* Personality routine GOT value in FDPIC
> mode. */
> Â Â Â Â Â Â Â Â }
> Â Â Â Â Â Â unwinder_cache;
> Â Â Â Â Â Â /* Propagation barrier cache (valid after phase 1): */
> diff --git a/libgcc/config/arm/linux-atomic.c
> b/libgcc/config/arm/linux-atomic.c
> index 06a6d46..565f829 100644
> --- a/libgcc/config/arm/linux-atomic.c
> +++ b/libgcc/config/arm/linux-atomic.c
> @@ -25,11 +25,62 @@ see the files COPYING3 and COPYING.RUNTIME
> respectively. If not, see
>
>  /* Kernel helper for compare-and-exchange. */
> Â typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr);
> -#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
> +
> +#define STR(X) #X
> +#define XSTR(X) STR(X)
> +
> +#define KERNEL_CMPXCHG 0xffff0fc0
> +
> +#if __FDPIC__
> +/* Non-FDPIC ABIs call __kernel_cmpxchg directly by dereferencing its
> +Â Â address, but under FDPIC we would generate a broken call
> +Â Â sequence. That's why we have to implement __kernel_cmpxchg and
> +  __kernel_dmb here: this way, the FDPIC call sequence works. */
> +#define __kernel_cmpxchg __fdpic_cmpxchg
> +#else
> +#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) KERNEL_CMPXCHG)
> +#endif
>
>  /* Kernel helper for memory barrier. */
> Â typedef void (__kernel_dmb_t) (void);
> -#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
> +
> +#define KERNEL_DMB 0xffff0fa0
> +
> +#if __FDPIC__
> +#define __kernel_dmb __fdpic_dmb
> +#else
> +#define __kernel_dmb (*(__kernel_dmb_t *) KERNEL_DMB)
> +#endif
> +
> +#if __FDPIC__
> +static int __fdpic_cmpxchg (int oldval, int newval, int *ptr)
> +{
> +Â int result;
> +
> +Â asm volatile (
> +              "ldr   ip, 1f\n\t"
> +              "bx    ip\n\t"
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â "1:\n\t"
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â ".word " XSTR(KERNEL_CMPXCHG) "\n\t"
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â : "=r" (result)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â : "r" (oldval) , "r" (newval), "r" (ptr)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â : "r3", "memory");
> +Â /* The result is actually returned by the kernel helper, we need
> +    this to avoid a warning. */
> +Â return result;
> +}
> +
> +static void __fdpic_dmb (void)
> +{
> +Â asm volatile (
> +              "ldr   ip, 1f\n\t"
> +              "bx    ip\n\t"
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â "1:\n\t"
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â ".word " XSTR(KERNEL_DMB) "\n\t"
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â );
> +}
> +
> +#endif
>
> Â /* Note: we implement byte, short and int versions of atomic
> operations using
> Â Â Â the above kernel helpers; see linux-atomic-64bit.c for "long long"
> (64-bit)
> diff --git a/libgcc/config/arm/unwind-arm.h
> b/libgcc/config/arm/unwind-arm.h
> index 43c5379..2bf320a 100644
> --- a/libgcc/config/arm/unwind-arm.h
> +++ b/libgcc/config/arm/unwind-arm.h
> @@ -33,9 +33,33 @@
>  /* Use IP as a scratch register within the personality routine. */
> Â #define UNWIND_POINTER_REG 12
>
> +#define FDPIC_REGNUM 9
> +
> +#define STR(x) #x
> +#define XSTR(x) STR(x)
> +
> Â #ifdef __cplusplus
> Â extern "C" {
> Â #endif
> +_Unwind_Ptr __attribute__((weak)) __gnu_Unwind_Find_got (_Unwind_Ptr);
> +
> +static inline _Unwind_Ptr gnu_Unwind_Find_got (_Unwind_Ptr ptr)
> +{
> +Â Â Â _Unwind_Ptr res;
> +
> +Â Â Â if (__gnu_Unwind_Find_got)
> +Â Â Â Â Â Â res =Â __gnu_Unwind_Find_got (ptr);
> +Â Â Â else
> +Â Â Â Â Â {
> +Â Â Â Â Â Â asm volatile ("mov %[result], r" XSTR(FDPIC_REGNUM)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â : [result]"=r" (res)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â :
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â :);
> +Â Â Â Â Â }
> +
> +Â Â Â return res;
> +}
> +
>   /* Decode an R_ARM_TARGET2 relocation. */
> Â Â static inline _Unwind_Word
> Â Â _Unwind_decode_typeinfo_ptr (_Unwind_Word base __attribute__
> ((unused)),
> @@ -48,7 +72,12 @@ extern "C" {
> Â Â Â Â Â Â if (!tmp)
> Â Â Â Â Â Â Â Â return 0;
>
> -#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
> +#if __FDPIC__
> +Â Â Â Â Â /* For FDPIC, we store the offset of the GOT entry. */
> +Â Â Â Â Â /* So, first get GOT from dynamic linker and then use indirect
> access. */
> +Â Â Â Â Â tmp += gnu_Unwind_Find_got (ptr);
> +Â Â Â Â Â tmp = *(_Unwind_Word *) tmp;
> +#elif (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
> Â Â Â Â || defined(__FreeBSD__) || defined(__fuchsia__)
>       /* Pc-relative indirect. */
> Â #define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel |
> DW_EH_PE_indirect)
> diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
> index fd572fe..0bacc11 100644
> --- a/libgcc/unwind-arm-common.inc
> +++ b/libgcc/unwind-arm-common.inc
> @@ -62,6 +62,7 @@ __gnu_Unwind_Find_exidx (_Unwind_Ptr, int *);
> Â #define UCB_PR_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved2)
> Â #define UCB_SAVED_CALLSITE_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved3)
> Â #define UCB_FORCED_STOP_ARG(ucbp) ((ucbp)->unwinder_cache.reserved4)
> +#define UCB_PR_GOT(ucbp) ((ucbp)->unwinder_cache.reserved5)
>
>  /* Unwind descriptors. */
>
> @@ -85,6 +86,16 @@ typedef struct __EIT_entry
> Â Â _uw content;
> Â } __EIT_entry;
>
> +#ifdef __FDPIC__
> +
> +/* Only used in FDPIC case. */
> +struct funcdesc_t
> +{
> +Â unsigned int ptr;
> +Â unsigned int got;
> +};
> +#endif
> +
>  /* Assembly helper functions. */
>
>  /* Restore core register state. Never returns. */
> @@ -259,7 +270,21 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
> return_address)
> Â Â Â Â {
>       /* One of the predefined standard routines. */
> Â Â Â Â Â Â _uw idx = (*(_uw *) ucbp->pr_cache.ehtp >> 24) & 0xf;
> +#if __FDPIC__
> +Â Â Â Â Â {
> +Â Â Â Â Â Â struct funcdesc_t *funcdesc
> +Â Â Â Â Â Â Â Â = (struct funcdesc_t *) __gnu_unwind_get_pr_addr (idx);
> +Â Â Â Â Â Â if (funcdesc)
> +Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = funcdesc->ptr;
> +Â Â Â Â Â Â Â Â Â Â UCB_PR_GOT (ucbp) = funcdesc->got;
> +Â Â Â Â Â Â Â Â }
> +Â Â Â Â Â Â else
> +Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = 0;
> +Â Â Â Â Â }
> +#else
> Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = __gnu_unwind_get_pr_addr (idx);
> +#endif
> Â Â Â Â Â Â if (UCB_PR_ADDR (ucbp) == 0)
> Â Â Â Â Â Â Â Â {
> Â Â Â Â Â Â Â Â Â Â /* Failed */
> @@ -270,6 +295,10 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
> return_address)
> Â Â Â Â {
> Â Â Â Â Â Â /* Execute region offset to PR */
> Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = selfrel_offset31 (ucbp->pr_cache.ehtp);
> +#if __FDPIC__
> +Â Â Â Â Â UCB_PR_GOT (ucbp)
> +Â Â Â Â Â Â = (unsigned int) gnu_Unwind_Find_got ((_Unwind_Ptr)
> UCB_PR_ADDR (ucbp));
> +#endif
> Â Â Â Â }
> Â Â return _URC_OK;
> Â }
> @@ -291,14 +320,29 @@ unwind_phase2 (_Unwind_Control_Block * ucbp,
> phase2_vrs * vrs)
> Â Â Â Â Â Â UCB_SAVED_CALLSITE_ADDR (ucbp) = VRS_PC(vrs);
>
>       /* Call the pr to decide what to do. */
> +#if __FDPIC__
> +Â Â Â Â Â {
> +Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
> +Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
> +Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
> +Â Â Â Â Â Â pr_result = ((personality_routine) &funcdesc)
> +Â Â Â Â Â Â Â Â (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs);
> +Â Â Â Â Â }
> +#else
> Â Â Â Â Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
> Â Â Â Â Â Â Â Â (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs);
> +#endif
> Â Â Â Â }
> Â Â while (pr_result == _URC_CONTINUE_UNWIND);
>
> Â Â if (pr_result != _URC_INSTALL_CONTEXT)
> Â Â Â Â abort();
>
> +#if __FDPIC__
> + /* r9 could have been lost due to PLT jump. Restore correct value. */
> +Â vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (vrs));
> +#endif
> +
> Â Â uw_restore_core_regs (vrs, &vrs->core);
> Â }
>
> @@ -346,8 +390,18 @@ unwind_phase2_forced (_Unwind_Control_Block
> *ucbp, phase2_vrs *entry_vrs,
> Â Â Â Â Â Â Â Â Â Â next_vrs = saved_vrs;
>
>           /* Call the pr to decide what to do. */
> +#if __FDPIC__
> +Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
> +Â Â Â Â Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
> +Â Â Â Â Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
> +Â Â Â Â Â Â Â Â Â Â pr_result = ((personality_routine) &funcdesc)
> +Â Â Â Â Â Â Â Â Â Â Â Â (action, ucbp, (void *) &next_vrs);
> +Â Â Â Â Â Â Â Â }
> +#else
> Â Â Â Â Â Â Â Â Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
> Â Â Â Â Â Â Â Â Â Â Â Â (action, ucbp, (void *) &next_vrs);
> +#endif
>
> Â Â Â Â Â Â Â Â Â Â saved_vrs.prev_sp = VRS_SP (&next_vrs);
> Â Â Â Â Â Â Â Â }
> @@ -384,6 +438,11 @@ unwind_phase2_forced (_Unwind_Control_Block
> *ucbp, phase2_vrs *entry_vrs,
> Â Â Â Â Â Â return _URC_FAILURE;
> Â Â Â Â }
>
> +#if __FDPIC__
> + /* r9 could have been lost due to PLT jump. Restore correct value. */
> +Â saved_vrs.core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC
> (&saved_vrs));
> +#endif
> +
> Â Â uw_restore_core_regs (&saved_vrs, &saved_vrs.core);
> Â }
>
> @@ -429,8 +488,18 @@ __gnu_Unwind_RaiseException
> (_Unwind_Control_Block * ucbp,
> Â Â Â Â Â Â Â Â return _URC_FAILURE;
>
>       /* Call the pr to decide what to do. */
> +#if __FDPIC__
> +Â Â Â Â Â {
> +Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
> +Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
> +Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
> +Â Â Â Â Â Â pr_result = ((personality_routine) &funcdesc)
> +Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs);
> +Â Â Â Â Â }
> +#else
> Â Â Â Â Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
> Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs);
> +#endif
> Â Â Â Â }
> Â Â while (pr_result == _URC_CONTINUE_UNWIND);
>
> @@ -488,13 +557,27 @@ __gnu_Unwind_Resume (_Unwind_Control_Block *
> ucbp, phase2_vrs * entry_vrs)
> Â Â Â Â }
>
>   /* Call the cached PR. */
> +#if __FDPIC__
> +Â {
> +Â Â Â volatile struct funcdesc_t funcdesc;
> +Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
> +Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
> +Â Â Â pr_result = ((personality_routine) &funcdesc)
> +Â Â Â Â Â (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs);
> +Â }
> +#else
> Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
> Â Â Â Â Â Â Â Â (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs);
> +#endif
>
> Â Â switch (pr_result)
> Â Â Â Â {
> Â Â Â Â case _URC_INSTALL_CONTEXT:
>       /* Upload the registers to enter the landing pad. */
> +#if __FDPIC__
> +     /* r9 could have been lost due to PLT jump. Restore correct
> value. */
> +Â Â Â Â Â entry_vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC
> (entry_vrs));
> +#endif
> Â Â Â Â Â Â uw_restore_core_regs (entry_vrs, &entry_vrs->core);
>
> Â Â Â Â case _URC_CONTINUE_UNWIND:
> @@ -586,9 +669,20 @@ __gnu_Unwind_Backtrace(_Unwind_Trace_Fn trace,
> void * trace_argument,
> Â Â Â Â Â Â Â Â }
>
>       /* Call the pr to decide what to do. */
> +#if __FDPIC__
> +Â Â Â Â Â {
> +Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
> +Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
> +Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
> +Â Â Â Â Â Â code = ((personality_routine) &funcdesc)
> +Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND,
> +Â Â Â Â Â Â Â Â Â ucbp, (void *) &saved_vrs);
> +Â Â Â Â Â }
> +#else
> Â Â Â Â Â Â code = ((personality_routine) UCB_PR_ADDR (ucbp))
> Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND,
> Â Â Â Â Â Â Â Â Â ucbp, (void *) &saved_vrs);
> +#endif
> Â Â Â Â }
> Â Â while (code != _URC_END_OF_STACK
> Â Â Â Â Â Â Â Â Â && code != _URC_FAILURE);
> diff --git a/libgcc/unwind-pe.h b/libgcc/unwind-pe.h
> index 4ed1c66..1c9dae5 100644
> --- a/libgcc/unwind-pe.h
> +++ b/libgcc/unwind-pe.h
> @@ -262,10 +262,27 @@ read_encoded_value_with_base (unsigned char
> encoding, _Unwind_Ptr base,
>
> Â Â Â Â Â Â if (result != 0)
> Â Â Â Â Â Â Â Â {
> +#if __FDPIC__
> +Â Â Â Â Â Â Â Â /* FDPIC relative addresses imply taking the GOT address
> +           into account. */
> +Â Â Â Â Â Â Â Â if ((encoding & DW_EH_PE_pcrel) && (encoding &
> DW_EH_PE_indirect))
> +Â Â Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â Â Â result += gnu_Unwind_Find_got ((_Unwind_Ptr) u);
> +Â Â Â Â Â Â Â Â Â Â Â Â result = *(_Unwind_Internal_Ptr *) result;
> +Â Â Â Â Â Â Â Â Â Â }
> +Â Â Â Â Â Â Â Â else
> +Â Â Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â Â Â result += ((encoding & 0x70) == DW_EH_PE_pcrel
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? (_Unwind_Internal_Ptr) u : base);
> +Â Â Â Â Â Â Â Â Â Â Â Â if (encoding & DW_EH_PE_indirect)
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â result = *(_Unwind_Internal_Ptr *) result;
> +Â Â Â Â Â Â Â Â Â Â }
> +#else
> Â Â Â Â Â Â Â Â Â Â result += ((encoding & 0x70) == DW_EH_PE_pcrel
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? (_Unwind_Internal_Ptr) u : base);
> Â Â Â Â Â Â Â Â Â Â if (encoding & DW_EH_PE_indirect)
> Â Â Â Â Â Â Â Â Â Â Â Â result = *(_Unwind_Internal_Ptr *) result;
> +#endif
> Â Â Â Â Â Â Â Â }
> Â Â Â Â }
>
> diff --git a/libstdc++-v3/libsupc++/eh_personality.cc
> b/libstdc++-v3/libsupc++/eh_personality.cc
> index 35e4e46..1528ab9 100644
> --- a/libstdc++-v3/libsupc++/eh_personality.cc
> +++ b/libstdc++-v3/libsupc++/eh_personality.cc
> @@ -93,7 +93,15 @@ get_ttype_entry (lsda_header_info *info, _uleb128_t i)
> Â Â _Unwind_Ptr ptr;
>
> Â Â i *= size_of_encoded_value (info->ttype_encoding);
> -Â read_encoded_value_with_base (info->ttype_encoding, info->ttype_base,
> +Â read_encoded_value_with_base (
> +#if __FDPIC__
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Force these flags to nake sure to
> +                                 take the GOT into account. */
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â (DW_EH_PE_pcrel | DW_EH_PE_indirect),
> +#else
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â info->ttype_encoding,
> +#endif
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â info->ttype_base,
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â info->TType - i, &ptr);
>
> Â Â return reinterpret_cast<const std::type_info *>(ptr);
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
2019-08-29 15:14 ` Christophe Lyon
@ 2019-08-30 9:40 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-08-30 9:40 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Micka«l Guªn© <mickael.guene@st.com>
>
> gcc/
> * config.gcc: Handle arm*-*-uclinuxfdpiceabi.
> * config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
> (SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
> * config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
> (CC1_SPEC): Use FDPIC_CC1_SPEC.
> (MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
> * config/arm/uclinuxfdpiceabi.h: New file.
>
> libsanitizer/
> * configure.tgt (arm*-*-*fdpiceabi): Sanitizers are
> unsupported in this configuration.
>
> Change-Id: I74ac1fbb2e809e864d2b0acce66b173e76bcf92b
>
> diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h
> new file mode 100644
> index 0000000..2d0c04b
> --- /dev/null
> +++ b/gcc/config/arm/uclinuxfdpiceabi.h
> @@ -0,0 +1,54 @@
> +/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
> + Copyright (C) 2018 Free Software Foundation, Inc.
Copyright year should be/include 2019.
OK with that change if no Arm maintainer objects before the rest
of the patch series is approved.
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>
> gcc/testsuite/
> * lib/target-supports.exp (check_effective_target_static): Disable
> for ARM FDPIC target.
OK, thanks.
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support
2019-08-29 15:08 ` Christophe Lyon
@ 2019-08-30 10:06 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-08-30 10:06 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
Christophe Lyon <christophe.lyon@st.com> writes:
> On 16/07/2019 12:11, Richard Sandiford wrote:
>> [This isn't really something that should be reviewed under global
>> reviewership, but if it's either that or nothing, I'll do it anyway...]
>>
>> Christophe Lyon <christophe.lyon@st.com> writes:
>>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>> Mickaël Guêné <mickael.guene@st.com>
>>>
>>> gcc/
>>> * config/arm/arm.opt: Add -mfdpic option.
>>> * doc/invoke.texi: Add documentation for -mfdpic.
>>>
>>> Change-Id: I0eabd1d11c9406fd4a43c4333689ebebbfcc4fe8
>>>
>>> diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
>>> index 9067d49..2ed3bd5 100644
>>> --- a/gcc/config/arm/arm.opt
>>> +++ b/gcc/config/arm/arm.opt
>>> @@ -306,3 +306,7 @@ Cost to assume for a branch insn.
>>> mgeneral-regs-only
>>> Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
>>> Generate code which uses the core registers only (r0-r14).
>>> +
>>> +mfdpic
>>> +Target Report Mask(FDPIC)
>>> +Enable Function Descriptor PIC mode.
>>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
>>> index 29585cf..805d7cc 100644
>>> --- a/gcc/doc/invoke.texi
>>> +++ b/gcc/doc/invoke.texi
>>> @@ -703,7 +703,8 @@ Objective-C and Objective-C++ Dialects}.
>>> -mrestrict-it @gol
>>> -mverbose-cost-dump @gol
>>> -mpure-code @gol
>>> --mcmse}
>>> +-mcmse @gol
>>> +-mfdpic}
>>>
>>> @emph{AVR Options}
>>> @gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol
>>> @@ -17912,6 +17913,23 @@ MOVT instruction.
>>> Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
>>> Development Tools Engineering Specification", which can be found on
>>> @url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
>>> +
>>> +@item -mfdpic
>>> +@itemx -mno-fdpic
>>> +@opindex mfdpic
>>> +@opindex mno-fdpic
>>> +Select the FDPIC ABI, which uses function descriptors to represent
>>
>> Maybe "64-bit function descriptors"? Just a suggestion, might not be useful.
>>
>> OK with that change, thanks.
>
> OK, here is a new version, where I added a few words to explain that -static
> is not supported.
>
> Thanks,
> Christophe
>
>>
>> Richard
>>
>>> +pointers to functions. When the compiler is configured for
>>> +@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default
>>> +and implies @option{-fPIE} if none of the PIC/PIE-related options is
>>> +provided. On other targets, it only enables the FDPIC-specific code
>>> +generation features, and the user should explicitly provide the
>>> +PIC/PIE-related options as needed.
>>> +
>>> +The opposite @option{-mno-fdpic} option is useful (and required) to
>>> +build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi})
>>> +toolchain as the one used to build the userland programs.
>>> +
>>> @end table
>>>
>>> @node AVR Options
>> .
>>
>
> From c936684e2b77ff5716bd8b67c617dcad088c72e0 Mon Sep 17 00:00:00 2001
> From: Christophe Lyon <christophe.lyon@linaro.org>
> Date: Thu, 8 Feb 2018 10:44:32 +0100
> Subject: [ARM/FDPIC v6 01/24] [ARM] FDPIC: Add -mfdpic option support
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> Micka«l Guªn© <mickael.guene@st.com>
>
> gcc/
> * config/arm/arm.opt: Add -mfdpic option.
> * doc/invoke.texi: Add documentation for -mfdpic.
>
> Change-Id: I05b98d6ae87c2b3fc04dd7fba415c730accdf33e
>
> diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
> index 9067d49..2ed3bd5 100644
> --- a/gcc/config/arm/arm.opt
> +++ b/gcc/config/arm/arm.opt
> @@ -306,3 +306,7 @@ Cost to assume for a branch insn.
> mgeneral-regs-only
> Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
> Generate code which uses the core registers only (r0-r14).
> +
> +mfdpic
> +Target Report Mask(FDPIC)
> +Enable Function Descriptor PIC mode.
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 29585cf..b77fa06 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -703,7 +703,8 @@ Objective-C and Objective-C++ Dialects}.
> -mrestrict-it @gol
> -mverbose-cost-dump @gol
> -mpure-code @gol
> --mcmse}
> +-mcmse @gol
> +-mfdpic}
>
> @emph{AVR Options}
> @gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol
> @@ -17912,6 +17913,27 @@ MOVT instruction.
> Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
> Development Tools Engineering Specification", which can be found on
> @url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
> +
> +@item -mfdpic
> +@itemx -mno-fdpic
> +@opindex mfdpic
> +@opindex mno-fdpic
> +Select the FDPIC ABI, which uses 64-bit function descriptors to
> +represent pointers to functions. When the compiler is configured for
> +@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default
> +and implies @option{-fPIE} if none of the PIC/PIE-related options is
> +provided. On other targets, it only enables the FDPIC-specific code
> +generation features, and the user should explicitly provide the
> +PIC/PIE-related options as needed.
> +
> +Note that static linking is not supported because it would still
> +involve the dynamic linker when the program self-relocates. If such
> +behaviour is acceptable, use -static and -Wl,-dynamic-linker options.
"behavior". (To correct correct spelling :-/)
OK with that change if there are no objections before the rest of
the series is approved.
> +
> +The opposite @option{-mno-fdpic} option is useful (and required) to
> +build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi})
> +toolchain as the one used to build the userland programs.
> +
> @end table
>
> @node AVR Options
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-08-29 15:14 ` Christophe Lyon
2019-08-30 9:30 ` Richard Sandiford
@ 2019-08-30 14:40 ` Jonathan Wakely
1 sibling, 0 replies; 109+ messages in thread
From: Jonathan Wakely @ 2019-08-30 14:40 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches, richard.sandiford, libstdc++
On 29/08/19 16:54 +0200, Christophe Lyon wrote:
>On 12/07/2019 08:49, Richard Sandiford wrote:
>>Christophe Lyon <christophe.lyon@st.com> writes:
>>>The new arm-uclinuxfdpiceabi target behaves pretty much like
>>>arm-linux-gnueabi. In order the enable the same set of features, we
>>>have to update several configure scripts that generally match targets
>>>like *-*-linux*: in most places, we add *-uclinux* where there is
>>>already *-linux*, or uclinux* when there is already linux*.
>>>
>>>In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
>>>because there is already a different behaviour for *-*uclinux* target.
>>>
>>>In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
>>>libraries support is required, as uclinux does not guarantee that.
>>>
>>>2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>>
>>> config/
>>> * futex.m4: Handle *-uclinux*.
>>> * tls.m4 (GCC_CHECK_TLS): Likewise.
>>>
>>> gcc/
>>> * config.gcc: Handle *-*-uclinuxfdpiceabi.
>>>
>>> libatomic/
>>> * configure.tgt: Handle arm*-*-uclinux*.
>>> * configure: Regenerate.
>>>
>>> libgcc/
>>> * config.host: Handle *-*-uclinuxfdpiceabi.
>>>
>>> libitm/
>>> * configure.tgt: Handle *-*-uclinux*.
>>> * configure: Regenerate.
>>>
>>> libstdc++-v3/
>>> * acinclude.m4: Handle uclinux*.
>>> * configure: Regenerate.
>>> * configure.host: Handle uclinux*
>>>
>>> * libtool.m4: Handle uclinux*.
>>
>>Has the libtool.m4 patch been submitted to upstream libtool?
>>I think this is supposed to be handled by submitting there first
>>and then cherry-picking into gcc, so that the change isn't lost
>>by a future import.
>>
>I added a comment to libtool.m4 about this.
>
>>>[...]
>>>
>>>diff --git a/config/tls.m4 b/config/tls.m4
>>>index 1a5fc59..a487aa4 100644
>>>--- a/config/tls.m4
>>>+++ b/config/tls.m4
>>>@@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
>>> dnl Shared library options may depend on the host; this check
>>> dnl is only known to be needed for GNU/Linux.
>>> case $host in
>>>- *-*-linux*)
>>>+ *-*-linux* | -*-uclinux*)
>>> LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
>>> ;;
>>> esac
>>
>>Is this right for all uclinux targets?
>I don't think so, now restricted to -*-uclinuxfdpic*
>
>>
>>>diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
>>>index 84258d8..cb0fdc5 100644
>>>--- a/libstdc++-v3/acinclude.m4
>>>+++ b/libstdc++-v3/acinclude.m4
>>
>>It'd probably be worth splitting out the libstdc++-v3 bits and
>>submitting them separately, cc:ing libstdc++@gcc.gnu.org. But...
>
>I've now split the patch into two parts (both attached here)
>>
>>>@@ -1404,7 +1404,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
>>> ac_has_nanosleep=yes
>>> ac_has_sched_yield=yes
>>> ;;
>>>- gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
>>>+ gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
>>> AC_MSG_CHECKING([for at least GNU libc 2.17])
>>> AC_TRY_COMPILE(
>>> [#include <features.h>],
>>
>>is this the right thing to do? It seems odd to be testing the glibc
>>version for uclibc.
>>
>>Do you want to support multiple possible settings of
>>ac_has_clock_monotonic and ac_has_clock_realtime? Or could you just
>>hard-code the values, given particular baseline assumptions about the
>>version of uclibc etc.? Hard-coding would then make....
>>
>>>@@ -1526,7 +1526,7 @@ AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [
>>> if test x"$ac_has_clock_monotonic" != x"yes"; then
>>> case ${target_os} in
>>>- linux*)
>>>+ linux* | uclinux*)
>>> AC_MSG_CHECKING([for clock_gettime syscall])
>>> AC_TRY_COMPILE(
>>> [#include <unistd.h>
>>
>>...this redundant.
>>
>Right, now fixed.
>
>>>@@ -2415,7 +2415,7 @@ AC_DEFUN([GLIBCXX_ENABLE_CLOCALE], [
>>> # Default to "generic".
>>> if test $enable_clocale_flag = auto; then
>>> case ${target_os} in
>>>- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
>>>+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
>>> enable_clocale_flag=gnu
>>> ;;
>>> darwin*)
>>
>>This too seems to be choosing a glibc setting for a uclibc target.
>Indeed.
>
>>
>>>@@ -2661,7 +2661,7 @@ AC_DEFUN([GLIBCXX_ENABLE_ALLOCATOR], [
>>> # Default to "new".
>>> if test $enable_libstdcxx_allocator_flag = auto; then
>>> case ${target_os} in
>>>- linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
>>>+ linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu | uclinux*)
>>> enable_libstdcxx_allocator_flag=new
>>> ;;
>>> *)
>>
>>The full case is:
>>
>> # Probe for host-specific support if no specific model is specified.
>> # Default to "new".
>> if test $enable_libstdcxx_allocator_flag = auto; then
>> case ${target_os} in
>> linux* | gnu* | kfreebsd*-gnu | knetbsd*-gnu)
>> enable_libstdcxx_allocator_flag=new
>> ;;
>> *)
>> enable_libstdcxx_allocator_flag=new
>> ;;
>> esac
>> fi
>>
>>which looks a bit redundant :-)
>
>Right :-)
>
>Thanks,
>
>Christophe
>
>>
>>Thanks,
>>Richard
>>.
>>
>
From 81c84839b8f004b7b52317850f27f58e05bec6ad Mon Sep 17 00:00:00 2001
>From: Christophe Lyon <christophe.lyon@linaro.org>
>Date: Fri, 4 May 2018 15:11:35 +0000
>Subject: [ARM/FDPIC v6 02/24] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in
> configure scripts
>
>The new arm-uclinuxfdpiceabi target behaves pretty much like
>arm-linux-gnueabi. In order the enable the same set of features, we
s/In order the enable/In order to enable/
The libstdc++ part is OK for trunk.
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions
2019-08-30 9:31 ` Kyrill Tkachov
@ 2019-08-30 14:44 ` Jonathan Wakely
0 siblings, 0 replies; 109+ messages in thread
From: Jonathan Wakely @ 2019-08-30 14:44 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches, libstdc++, ian
On 30/08/19 10:02 +0100, Kyrill Tkachov wrote:
>As Richard mentioned in an earlier post the generic libgcc and
>libstdc++ changes will need approval from the relevant maintainers.
>
>CC'ing the libstdc++ list and the libgcc maintainer.
The libstdc++ change is OK for trunk.
>On 5/15/19 1:39 PM, Christophe Lyon wrote:
>>The main difference with existing support is that function addresses
>>are function descriptor addresses instead. This means that all code
>>dealing with function pointers now has to cope with function
>>descriptors instead.
>>
>>For the same reason, Linux kernel helpers can no longer be called by
>>dereferencing their address, so we implement wrappers that directly
>>call the kernel helpers.
>>
>>When restoring a function address, we also have to restore the FDPIC
>>register value (r9).
>>
>>2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>       Mickaël Guêné <mickael.guene@st.com>
>>
>>Â Â Â Â Â Â Â gcc/
>>Â Â Â Â Â Â Â * ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
>>Â Â Â Â Â Â Â field.
>>Â Â Â Â Â Â Â (FDPIC_REGNUM): New define.
>>
>>Â Â Â Â Â Â Â libgcc/
>>Â Â Â Â Â Â Â * config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
>>Â Â Â Â Â Â Â (__kernel_dmb): Likewise.
>>Â Â Â Â Â Â Â (__fdpic_cmpxchg): New function.
>>Â Â Â Â Â Â Â (__fdpic_dmb): New function.
>>Â Â Â Â Â Â Â * config/arm/unwind-arm.h (FDPIC_REGNUM): New define.
>>Â Â Â Â Â Â Â (gnu_Unwind_Find_got): New function.
>>Â Â Â Â Â Â Â (_Unwind_decode_typeinfo_ptr): Add FDPIC support.
>>Â Â Â Â Â Â Â * unwind-arm-common.inc (UCB_PR_GOT): New.
>>Â Â Â Â Â Â Â (funcdesc_t): New struct.
>>Â Â Â Â Â Â Â (get_eit_entry): Add FDPIC support.
>>Â Â Â Â Â Â Â (unwind_phase2): Likewise.
>>Â Â Â Â Â Â Â (unwind_phase2_forced): Likewise.
>>Â Â Â Â Â Â Â (__gnu_Unwind_RaiseException): Likewise.
>>Â Â Â Â Â Â Â (__gnu_Unwind_Resume): Likewise.
>>Â Â Â Â Â Â Â (__gnu_Unwind_Backtrace): Likewise.
>>Â Â Â Â Â Â Â * unwind-pe.h (read_encoded_value_with_base): Likewise.
>>
>>Â Â Â Â Â Â Â libstdc++/
>>Â Â Â Â Â Â Â * libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
>>Â Â Â Â Â Â Â support.
>>
>>Change-Id: I64b81cfaf390a05f2fd121f44ba1912cb4b47cae
>>
>>diff --git a/gcc/ginclude/unwind-arm-common.h
>>b/gcc/ginclude/unwind-arm-common.h
>>index 6df783e..d4eb03e 100644
>>--- a/gcc/ginclude/unwind-arm-common.h
>>+++ b/gcc/ginclude/unwind-arm-common.h
>>@@ -91,7 +91,7 @@ extern "C" {
>>Â Â Â Â Â Â Â Â Â Â _uw reserved2;Â /* Personality routine address */
>>Â Â Â Â Â Â Â Â Â Â _uw reserved3;Â /* Saved callsite address */
>>Â Â Â Â Â Â Â Â Â Â _uw reserved4;Â /* Forced unwind stop arg */
>>-Â Â Â Â Â Â Â Â _uw reserved5;
>>+Â Â Â Â Â Â Â Â _uw reserved5;Â /* Personality routine GOT value in FDPIC
>>mode. */
>>Â Â Â Â Â Â Â Â }
>>Â Â Â Â Â Â unwinder_cache;
>>Â Â Â Â Â Â /* Propagation barrier cache (valid after phase 1): */
>>diff --git a/libgcc/config/arm/linux-atomic.c
>>b/libgcc/config/arm/linux-atomic.c
>>index 06a6d46..565f829 100644
>>--- a/libgcc/config/arm/linux-atomic.c
>>+++ b/libgcc/config/arm/linux-atomic.c
>>@@ -25,11 +25,62 @@ see the files COPYING3 and COPYING.RUNTIME
>>respectively. If not, see
>>
>> /* Kernel helper for compare-and-exchange. */
>>Â typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr);
>>-#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
>>+
>>+#define STR(X) #X
>>+#define XSTR(X) STR(X)
>>+
>>+#define KERNEL_CMPXCHG 0xffff0fc0
>>+
>>+#if __FDPIC__
>>+/* Non-FDPIC ABIs call __kernel_cmpxchg directly by dereferencing its
>>+Â Â address, but under FDPIC we would generate a broken call
>>+Â Â sequence. That's why we have to implement __kernel_cmpxchg and
>>+  __kernel_dmb here: this way, the FDPIC call sequence works. */
>>+#define __kernel_cmpxchg __fdpic_cmpxchg
>>+#else
>>+#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) KERNEL_CMPXCHG)
>>+#endif
>>
>> /* Kernel helper for memory barrier. */
>>Â typedef void (__kernel_dmb_t) (void);
>>-#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
>>+
>>+#define KERNEL_DMB 0xffff0fa0
>>+
>>+#if __FDPIC__
>>+#define __kernel_dmb __fdpic_dmb
>>+#else
>>+#define __kernel_dmb (*(__kernel_dmb_t *) KERNEL_DMB)
>>+#endif
>>+
>>+#if __FDPIC__
>>+static int __fdpic_cmpxchg (int oldval, int newval, int *ptr)
>>+{
>>+Â int result;
>>+
>>+Â asm volatile (
>>+              "ldr   ip, 1f\n\t"
>>+              "bx    ip\n\t"
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â "1:\n\t"
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â ".word " XSTR(KERNEL_CMPXCHG) "\n\t"
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â : "=r" (result)
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â : "r" (oldval) , "r" (newval), "r" (ptr)
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â : "r3", "memory");
>>+Â /* The result is actually returned by the kernel helper, we need
>>+    this to avoid a warning. */
>>+Â return result;
>>+}
>>+
>>+static void __fdpic_dmb (void)
>>+{
>>+Â asm volatile (
>>+              "ldr   ip, 1f\n\t"
>>+              "bx    ip\n\t"
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â "1:\n\t"
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â ".word " XSTR(KERNEL_DMB) "\n\t"
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â );
>>+}
>>+
>>+#endif
>>
>>Â /* Note: we implement byte, short and int versions of atomic
>>operations using
>>Â Â Â the above kernel helpers; see linux-atomic-64bit.c for "long
>>long" (64-bit)
>>diff --git a/libgcc/config/arm/unwind-arm.h
>>b/libgcc/config/arm/unwind-arm.h
>>index 43c5379..2bf320a 100644
>>--- a/libgcc/config/arm/unwind-arm.h
>>+++ b/libgcc/config/arm/unwind-arm.h
>>@@ -33,9 +33,33 @@
>> /* Use IP as a scratch register within the personality routine. */
>>Â #define UNWIND_POINTER_REG 12
>>
>>+#define FDPIC_REGNUM 9
>>+
>>+#define STR(x) #x
>>+#define XSTR(x) STR(x)
>>+
>>Â #ifdef __cplusplus
>>Â extern "C" {
>>Â #endif
>>+_Unwind_Ptr __attribute__((weak)) __gnu_Unwind_Find_got (_Unwind_Ptr);
>>+
>>+static inline _Unwind_Ptr gnu_Unwind_Find_got (_Unwind_Ptr ptr)
>>+{
>>+Â Â Â _Unwind_Ptr res;
>>+
>>+Â Â Â if (__gnu_Unwind_Find_got)
>>+Â Â Â Â Â Â res =Â __gnu_Unwind_Find_got (ptr);
>>+Â Â Â else
>>+Â Â Â Â Â {
>>+Â Â Â Â Â Â asm volatile ("mov %[result], r" XSTR(FDPIC_REGNUM)
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â : [result]"=r" (res)
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â :
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â :);
>>+Â Â Â Â Â }
>>+
>>+Â Â Â return res;
>>+}
>>+
>>  /* Decode an R_ARM_TARGET2 relocation. */
>>Â Â static inline _Unwind_Word
>>Â Â _Unwind_decode_typeinfo_ptr (_Unwind_Word base __attribute__
>>((unused)),
>>@@ -48,7 +72,12 @@ extern "C" {
>>Â Â Â Â Â Â if (!tmp)
>>Â Â Â Â Â Â Â Â return 0;
>>
>>-#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
>>+#if __FDPIC__
>>+Â Â Â Â Â /* For FDPIC, we store the offset of the GOT entry. */
>>+Â Â Â Â Â /* So, first get GOT from dynamic linker and then use
>>indirect access. */
>>+Â Â Â Â Â tmp += gnu_Unwind_Find_got (ptr);
>>+Â Â Â Â Â tmp = *(_Unwind_Word *) tmp;
>>+#elif (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
>>Â Â Â Â || defined(__FreeBSD__) || defined(__fuchsia__)
>>      /* Pc-relative indirect. */
>>Â #define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel |
>>DW_EH_PE_indirect)
>>diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
>>index fd572fe..0bacc11 100644
>>--- a/libgcc/unwind-arm-common.inc
>>+++ b/libgcc/unwind-arm-common.inc
>>@@ -62,6 +62,7 @@ __gnu_Unwind_Find_exidx (_Unwind_Ptr, int *);
>>Â #define UCB_PR_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved2)
>>Â #define UCB_SAVED_CALLSITE_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved3)
>>Â #define UCB_FORCED_STOP_ARG(ucbp) ((ucbp)->unwinder_cache.reserved4)
>>+#define UCB_PR_GOT(ucbp) ((ucbp)->unwinder_cache.reserved5)
>>
>> /* Unwind descriptors. */
>>
>>@@ -85,6 +86,16 @@ typedef struct __EIT_entry
>>Â Â _uw content;
>>Â } __EIT_entry;
>>
>>+#ifdef __FDPIC__
>>+
>>+/* Only used in FDPIC case. */
>>+struct funcdesc_t
>>+{
>>+Â unsigned int ptr;
>>+Â unsigned int got;
>>+};
>>+#endif
>>+
>> /* Assembly helper functions. */
>>
>> /* Restore core register state. Never returns. */
>>@@ -259,7 +270,21 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
>>return_address)
>>Â Â Â Â {
>>      /* One of the predefined standard routines. */
>>Â Â Â Â Â Â _uw idx = (*(_uw *) ucbp->pr_cache.ehtp >> 24) & 0xf;
>>+#if __FDPIC__
>>+Â Â Â Â Â {
>>+Â Â Â Â Â Â struct funcdesc_t *funcdesc
>>+Â Â Â Â Â Â Â Â = (struct funcdesc_t *) __gnu_unwind_get_pr_addr (idx);
>>+Â Â Â Â Â Â if (funcdesc)
>>+Â Â Â Â Â Â Â Â {
>>+Â Â Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = funcdesc->ptr;
>>+Â Â Â Â Â Â Â Â Â Â UCB_PR_GOT (ucbp) = funcdesc->got;
>>+Â Â Â Â Â Â Â Â }
>>+Â Â Â Â Â Â else
>>+Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = 0;
>>+Â Â Â Â Â }
>>+#else
>>Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = __gnu_unwind_get_pr_addr (idx);
>>+#endif
>>Â Â Â Â Â Â if (UCB_PR_ADDR (ucbp) == 0)
>>Â Â Â Â Â Â Â Â {
>>Â Â Â Â Â Â Â Â Â Â /* Failed */
>>@@ -270,6 +295,10 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
>>return_address)
>>Â Â Â Â {
>>Â Â Â Â Â Â /* Execute region offset to PR */
>>Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = selfrel_offset31 (ucbp->pr_cache.ehtp);
>>+#if __FDPIC__
>>+Â Â Â Â Â UCB_PR_GOT (ucbp)
>>+Â Â Â Â Â Â = (unsigned int) gnu_Unwind_Find_got ((_Unwind_Ptr)
>>UCB_PR_ADDR (ucbp));
>>+#endif
>>Â Â Â Â }
>>Â Â return _URC_OK;
>>Â }
>>@@ -291,14 +320,29 @@ unwind_phase2 (_Unwind_Control_Block * ucbp,
>>phase2_vrs * vrs)
>>Â Â Â Â Â Â UCB_SAVED_CALLSITE_ADDR (ucbp) = VRS_PC(vrs);
>>
>>      /* Call the pr to decide what to do. */
>>+#if __FDPIC__
>>+Â Â Â Â Â {
>>+Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
>>+Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
>>+Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
>>+Â Â Â Â Â Â pr_result = ((personality_routine) &funcdesc)
>>+Â Â Â Â Â Â Â Â (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs);
>>+Â Â Â Â Â }
>>+#else
>>Â Â Â Â Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
>>Â Â Â Â Â Â Â Â (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs);
>>+#endif
>>Â Â Â Â }
>>Â Â while (pr_result == _URC_CONTINUE_UNWIND);
>>
>>Â Â if (pr_result != _URC_INSTALL_CONTEXT)
>>Â Â Â Â abort();
>>
>>+#if __FDPIC__
>>+ /* r9 could have been lost due to PLT jump. Restore correct value. */
>>+Â vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (vrs));
>>+#endif
>>+
>>Â Â uw_restore_core_regs (vrs, &vrs->core);
>>Â }
>>
>>@@ -346,8 +390,18 @@ unwind_phase2_forced (_Unwind_Control_Block
>>*ucbp, phase2_vrs *entry_vrs,
>>Â Â Â Â Â Â Â Â Â Â next_vrs = saved_vrs;
>>
>>          /* Call the pr to decide what to do. */
>>+#if __FDPIC__
>>+Â Â Â Â Â Â Â Â {
>>+Â Â Â Â Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
>>+Â Â Â Â Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
>>+Â Â Â Â Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
>>+Â Â Â Â Â Â Â Â Â Â pr_result = ((personality_routine) &funcdesc)
>>+Â Â Â Â Â Â Â Â Â Â Â Â (action, ucbp, (void *) &next_vrs);
>>+Â Â Â Â Â Â Â Â }
>>+#else
>>Â Â Â Â Â Â Â Â Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
>>Â Â Â Â Â Â Â Â Â Â Â Â (action, ucbp, (void *) &next_vrs);
>>+#endif
>>
>>Â Â Â Â Â Â Â Â Â Â saved_vrs.prev_sp = VRS_SP (&next_vrs);
>>Â Â Â Â Â Â Â Â }
>>@@ -384,6 +438,11 @@ unwind_phase2_forced (_Unwind_Control_Block
>>*ucbp, phase2_vrs *entry_vrs,
>>Â Â Â Â Â Â return _URC_FAILURE;
>>Â Â Â Â }
>>
>>+#if __FDPIC__
>>+ /* r9 could have been lost due to PLT jump. Restore correct value. */
>>+Â saved_vrs.core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC
>>(&saved_vrs));
>>+#endif
>>+
>>Â Â uw_restore_core_regs (&saved_vrs, &saved_vrs.core);
>>Â }
>>
>>@@ -429,8 +488,18 @@ __gnu_Unwind_RaiseException
>>(_Unwind_Control_Block * ucbp,
>>Â Â Â Â Â Â Â Â return _URC_FAILURE;
>>
>>      /* Call the pr to decide what to do. */
>>+#if __FDPIC__
>>+Â Â Â Â Â {
>>+Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
>>+Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
>>+Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
>>+Â Â Â Â Â Â pr_result = ((personality_routine) &funcdesc)
>>+Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs);
>>+Â Â Â Â Â }
>>+#else
>>Â Â Â Â Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
>>Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs);
>>+#endif
>>Â Â Â Â }
>>Â Â while (pr_result == _URC_CONTINUE_UNWIND);
>>
>>@@ -488,13 +557,27 @@ __gnu_Unwind_Resume (_Unwind_Control_Block *
>>ucbp, phase2_vrs * entry_vrs)
>>Â Â Â Â }
>>
>>  /* Call the cached PR. */
>>+#if __FDPIC__
>>+Â {
>>+Â Â Â volatile struct funcdesc_t funcdesc;
>>+Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
>>+Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
>>+Â Â Â pr_result = ((personality_routine) &funcdesc)
>>+Â Â Â Â Â (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs);
>>+Â }
>>+#else
>>Â Â pr_result = ((personality_routine) UCB_PR_ADDR (ucbp))
>>Â Â Â Â Â Â Â Â (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs);
>>+#endif
>>
>>Â Â switch (pr_result)
>>Â Â Â Â {
>>Â Â Â Â case _URC_INSTALL_CONTEXT:
>>      /* Upload the registers to enter the landing pad. */
>>+#if __FDPIC__
>>+     /* r9 could have been lost due to PLT jump. Restore correct
>>value. */
>>+Â Â Â Â Â entry_vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC
>>(entry_vrs));
>>+#endif
>>Â Â Â Â Â Â uw_restore_core_regs (entry_vrs, &entry_vrs->core);
>>
>>Â Â Â Â case _URC_CONTINUE_UNWIND:
>>@@ -586,9 +669,20 @@ __gnu_Unwind_Backtrace(_Unwind_Trace_Fn trace,
>>void * trace_argument,
>>Â Â Â Â Â Â Â Â }
>>
>>      /* Call the pr to decide what to do. */
>>+#if __FDPIC__
>>+Â Â Â Â Â {
>>+Â Â Â Â Â Â volatile struct funcdesc_t funcdesc;
>>+Â Â Â Â Â Â funcdesc.ptr = UCB_PR_ADDR (ucbp);
>>+Â Â Â Â Â Â funcdesc.got = UCB_PR_GOT (ucbp);
>>+Â Â Â Â Â Â code = ((personality_routine) &funcdesc)
>>+Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND,
>>+Â Â Â Â Â Â Â Â Â ucbp, (void *) &saved_vrs);
>>+Â Â Â Â Â }
>>+#else
>>Â Â Â Â Â Â code = ((personality_routine) UCB_PR_ADDR (ucbp))
>>Â Â Â Â Â Â Â Â (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND,
>>Â Â Â Â Â Â Â Â Â ucbp, (void *) &saved_vrs);
>>+#endif
>>Â Â Â Â }
>>Â Â while (code != _URC_END_OF_STACK
>>Â Â Â Â Â Â Â Â Â && code != _URC_FAILURE);
>>diff --git a/libgcc/unwind-pe.h b/libgcc/unwind-pe.h
>>index 4ed1c66..1c9dae5 100644
>>--- a/libgcc/unwind-pe.h
>>+++ b/libgcc/unwind-pe.h
>>@@ -262,10 +262,27 @@ read_encoded_value_with_base (unsigned char
>>encoding, _Unwind_Ptr base,
>>
>>Â Â Â Â Â Â if (result != 0)
>>Â Â Â Â Â Â Â Â {
>>+#if __FDPIC__
>>+Â Â Â Â Â Â Â Â /* FDPIC relative addresses imply taking the GOT address
>>+           into account. */
>>+Â Â Â Â Â Â Â Â if ((encoding & DW_EH_PE_pcrel) && (encoding &
>>DW_EH_PE_indirect))
>>+Â Â Â Â Â Â Â Â Â Â {
>>+Â Â Â Â Â Â Â Â Â Â Â Â result += gnu_Unwind_Find_got ((_Unwind_Ptr) u);
>>+Â Â Â Â Â Â Â Â Â Â Â Â result = *(_Unwind_Internal_Ptr *) result;
>>+Â Â Â Â Â Â Â Â Â Â }
>>+Â Â Â Â Â Â Â Â else
>>+Â Â Â Â Â Â Â Â Â Â {
>>+Â Â Â Â Â Â Â Â Â Â Â Â result += ((encoding & 0x70) == DW_EH_PE_pcrel
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? (_Unwind_Internal_Ptr) u : base);
>>+Â Â Â Â Â Â Â Â Â Â Â Â if (encoding & DW_EH_PE_indirect)
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â result = *(_Unwind_Internal_Ptr *) result;
>>+Â Â Â Â Â Â Â Â Â Â }
>>+#else
>>Â Â Â Â Â Â Â Â Â Â result += ((encoding & 0x70) == DW_EH_PE_pcrel
>>Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ? (_Unwind_Internal_Ptr) u : base);
>>Â Â Â Â Â Â Â Â Â Â if (encoding & DW_EH_PE_indirect)
>>Â Â Â Â Â Â Â Â Â Â Â Â result = *(_Unwind_Internal_Ptr *) result;
>>+#endif
>>Â Â Â Â Â Â Â Â }
>>Â Â Â Â }
>>
>>diff --git a/libstdc++-v3/libsupc++/eh_personality.cc
>>b/libstdc++-v3/libsupc++/eh_personality.cc
>>index 35e4e46..1528ab9 100644
>>--- a/libstdc++-v3/libsupc++/eh_personality.cc
>>+++ b/libstdc++-v3/libsupc++/eh_personality.cc
>>@@ -93,7 +93,15 @@ get_ttype_entry (lsda_header_info *info, _uleb128_t i)
>>Â Â _Unwind_Ptr ptr;
>>
>>Â Â i *= size_of_encoded_value (info->ttype_encoding);
>>-Â read_encoded_value_with_base (info->ttype_encoding, info->ttype_base,
>>+Â read_encoded_value_with_base (
>>+#if __FDPIC__
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Force these flags to nake sure to
>>+                                 take the GOT into account. */
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â (DW_EH_PE_pcrel | DW_EH_PE_indirect),
>>+#else
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â info->ttype_encoding,
>>+#endif
>>+Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â info->ttype_base,
>>Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â info->TType - i, &ptr);
>>
>>Â Â return reinterpret_cast<const std::type_info *>(ptr);
>>--
>>2.6.3
>>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-08-30 9:30 ` Richard Sandiford
@ 2019-08-30 14:48 ` Christophe Lyon
2019-08-30 15:15 ` Richard Sandiford
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-08-30 14:48 UTC (permalink / raw)
To: Christophe Lyon, gcc Patches, libstdc++, Richard Sandiford
On Fri, 30 Aug 2019 at 11:00, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Christophe Lyon <christophe.lyon@st.com> writes:
> > @@ -785,7 +785,7 @@ case ${target} in
> > esac
> > tmake_file="t-slibgcc"
> > case $target in
> > - *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
> > + *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
> > :;;
> > *-*-gnu*)
> > native_system_header_dir=/include
>
> I don't think this is necessary, since this target will never match the
> following *-*-gnu*) stanza anyway.
OK (I thought it was clearer to add the fdpic config where we already
have linux that would not match)
>
> > diff --git a/libtool.m4 b/libtool.m4
> > index 8966762..64e507a 100644
> > --- a/libtool.m4
> > +++ b/libtool.m4
> > @@ -3734,7 +3739,7 @@ m4_if([$1], [CXX], [
> > ;;
> > esac
> > ;;
> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
> > case $cc_basename in
> > KCC*)
> > # KAI C++ Compiler
>
> Is this needed? It seems to be in the !GCC branch of an if/else.
I must admit I didn't test this case. I thought it was needed because
this target does not match "linux*", in case someone tries to compile
with another compiler...
>
> If it is needed, the default:
>
> _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
>
> seems correct for non-FDPIC uclinux.
>
So, either use uclinuxfdpiceabi above, or do nothing and do not try to
support other compilers?
> > @@ -4032,7 +4037,7 @@ m4_if([$1], [CXX], [
> > _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
> > ;;
> >
> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
> > case $cc_basename in
> > # old Intel for x86_64 which still supported -KPIC.
> > ecc*)
>
> Same here.
>
> > @@ -5946,7 +5951,7 @@ if test "$_lt_caught_CXX_error" != yes; then
> > _LT_TAGVAR(inherit_rpath, $1)=yes
> > ;;
> >
> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
> > case $cc_basename in
> > KCC*)
> > # Kuck and Associates, Inc. (KAI) C++ Compiler
>
> Here too the code seems to be dealing specifically with non-GCC compilers.
>
> > @@ -6598,7 +6603,7 @@ interix[[3-9]]*)
> > _LT_TAGVAR(postdeps,$1)=
> > ;;
> >
> > -linux*)
> > +linux* | uclinux*)
> > case `$CC -V 2>&1 | sed 5q` in
> > *Sun\ C*)
> > # Sun C++ 5.9
>
> Here too. (It only seems to do anything for Sun's C compiler.)
>
> The fewer hunks we have to maintain downstream the better :-)
>
Sure.
I thought safer/cleaner to prepare the cases for non-GCC compilers, I
guess it's better not to add that until proven useful?
Thanks,
Christophe
> Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-08-30 14:48 ` Christophe Lyon
@ 2019-08-30 15:15 ` Richard Sandiford
2019-09-02 7:51 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Richard Sandiford @ 2019-08-30 15:15 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc Patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> On Fri, 30 Aug 2019 at 11:00, Richard Sandiford
> <richard.sandiford@arm.com> wrote:
>>
>> Christophe Lyon <christophe.lyon@st.com> writes:
>> > @@ -785,7 +785,7 @@ case ${target} in
>> > esac
>> > tmake_file="t-slibgcc"
>> > case $target in
>> > - *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
>> > + *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
>> > :;;
>> > *-*-gnu*)
>> > native_system_header_dir=/include
>>
>> I don't think this is necessary, since this target will never match the
>> following *-*-gnu*) stanza anyway.
> OK (I thought it was clearer to add the fdpic config where we already
> have linux that would not match)
I think the idea is to match pure GNU systems only in the second stanza
(i.e. GNU/Hurd). So we need the first stanza to exclude hybrid-GNU
systems like GNU/Linux, GNU/Solaris, GNU/FreeBSD, etc.
Since uclinuxfdpiceabi isn't a GNU-based system, I don't think it
needs to appear at all.
>> > diff --git a/libtool.m4 b/libtool.m4
>> > index 8966762..64e507a 100644
>> > --- a/libtool.m4
>> > +++ b/libtool.m4
>> > @@ -3734,7 +3739,7 @@ m4_if([$1], [CXX], [
>> > ;;
>> > esac
>> > ;;
>> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
>> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
>> > case $cc_basename in
>> > KCC*)
>> > # KAI C++ Compiler
>>
>> Is this needed? It seems to be in the !GCC branch of an if/else.
> I must admit I didn't test this case. I thought it was needed because
> this target does not match "linux*", in case someone tries to compile
> with another compiler...
>
>
>>
>> If it is needed, the default:
>>
>> _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
>>
>> seems correct for non-FDPIC uclinux.
>>
> So, either use uclinuxfdpiceabi above, or do nothing and do not try to
> support other compilers?
Yeah. I think the latter's better, since in this context we only
need libtool.m4 to support building with GCC. The decision might
be different for upstream libtool, but do any commercial compilers
support Arm FDPIC yet?
>> > @@ -4032,7 +4037,7 @@ m4_if([$1], [CXX], [
>> > _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
>> > ;;
>> >
>> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
>> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
>> > case $cc_basename in
>> > # old Intel for x86_64 which still supported -KPIC.
>> > ecc*)
>>
>> Same here.
>>
>> > @@ -5946,7 +5951,7 @@ if test "$_lt_caught_CXX_error" != yes; then
>> > _LT_TAGVAR(inherit_rpath, $1)=yes
>> > ;;
>> >
>> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
>> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
>> > case $cc_basename in
>> > KCC*)
>> > # Kuck and Associates, Inc. (KAI) C++ Compiler
>>
>> Here too the code seems to be dealing specifically with non-GCC compilers.
>>
>> > @@ -6598,7 +6603,7 @@ interix[[3-9]]*)
>> > _LT_TAGVAR(postdeps,$1)=
>> > ;;
>> >
>> > -linux*)
>> > +linux* | uclinux*)
>> > case `$CC -V 2>&1 | sed 5q` in
>> > *Sun\ C*)
>> > # Sun C++ 5.9
>>
>> Here too. (It only seems to do anything for Sun's C compiler.)
>>
>> The fewer hunks we have to maintain downstream the better :-)
>>
> Sure.
>
> I thought safer/cleaner to prepare the cases for non-GCC compilers, I
> guess it's better not to add that until proven useful?
Yeah, I think so. I guess it depends on your POV. To me, it seems
cleaner to add uclinux* and uclinuxfdpiceabi only where we know there's
a specific need, since that's also how we decide which of uclinux* and
uclinuxfdpiceabi to use.
Thanks,
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-08-30 15:15 ` Richard Sandiford
@ 2019-09-02 7:51 ` Christophe Lyon
2019-09-02 8:31 ` Richard Sandiford
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-02 7:51 UTC (permalink / raw)
To: Christophe Lyon, Christophe Lyon, gcc Patches, Richard Sandiford
[-- Attachment #1: Type: text/plain, Size: 4187 bytes --]
On Fri, 30 Aug 2019 at 16:49, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Christophe Lyon <christophe.lyon@linaro.org> writes:
> > On Fri, 30 Aug 2019 at 11:00, Richard Sandiford
> > <richard.sandiford@arm.com> wrote:
> >>
> >> Christophe Lyon <christophe.lyon@st.com> writes:
> >> > @@ -785,7 +785,7 @@ case ${target} in
> >> > esac
> >> > tmake_file="t-slibgcc"
> >> > case $target in
> >> > - *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
> >> > + *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
> >> > :;;
> >> > *-*-gnu*)
> >> > native_system_header_dir=/include
> >>
> >> I don't think this is necessary, since this target will never match the
> >> following *-*-gnu*) stanza anyway.
> > OK (I thought it was clearer to add the fdpic config where we already
> > have linux that would not match)
>
> I think the idea is to match pure GNU systems only in the second stanza
> (i.e. GNU/Hurd). So we need the first stanza to exclude hybrid-GNU
> systems like GNU/Linux, GNU/Solaris, GNU/FreeBSD, etc.
>
> Since uclinuxfdpiceabi isn't a GNU-based system, I don't think it
> needs to appear at all.
>
> >> > diff --git a/libtool.m4 b/libtool.m4
> >> > index 8966762..64e507a 100644
> >> > --- a/libtool.m4
> >> > +++ b/libtool.m4
> >> > @@ -3734,7 +3739,7 @@ m4_if([$1], [CXX], [
> >> > ;;
> >> > esac
> >> > ;;
> >> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> >> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
> >> > case $cc_basename in
> >> > KCC*)
> >> > # KAI C++ Compiler
> >>
> >> Is this needed? It seems to be in the !GCC branch of an if/else.
> > I must admit I didn't test this case. I thought it was needed because
> > this target does not match "linux*", in case someone tries to compile
> > with another compiler...
> >
> >
> >>
> >> If it is needed, the default:
> >>
> >> _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
> >>
> >> seems correct for non-FDPIC uclinux.
> >>
> > So, either use uclinuxfdpiceabi above, or do nothing and do not try to
> > support other compilers?
>
> Yeah. I think the latter's better, since in this context we only
> need libtool.m4 to support building with GCC. The decision might
> be different for upstream libtool, but do any commercial compilers
> support Arm FDPIC yet?
>
> >> > @@ -4032,7 +4037,7 @@ m4_if([$1], [CXX], [
> >> > _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
> >> > ;;
> >> >
> >> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> >> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
> >> > case $cc_basename in
> >> > # old Intel for x86_64 which still supported -KPIC.
> >> > ecc*)
> >>
> >> Same here.
> >>
> >> > @@ -5946,7 +5951,7 @@ if test "$_lt_caught_CXX_error" != yes; then
> >> > _LT_TAGVAR(inherit_rpath, $1)=yes
> >> > ;;
> >> >
> >> > - linux* | k*bsd*-gnu | kopensolaris*-gnu)
> >> > + linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
> >> > case $cc_basename in
> >> > KCC*)
> >> > # Kuck and Associates, Inc. (KAI) C++ Compiler
> >>
> >> Here too the code seems to be dealing specifically with non-GCC compilers.
> >>
> >> > @@ -6598,7 +6603,7 @@ interix[[3-9]]*)
> >> > _LT_TAGVAR(postdeps,$1)=
> >> > ;;
> >> >
> >> > -linux*)
> >> > +linux* | uclinux*)
> >> > case `$CC -V 2>&1 | sed 5q` in
> >> > *Sun\ C*)
> >> > # Sun C++ 5.9
> >>
> >> Here too. (It only seems to do anything for Sun's C compiler.)
> >>
> >> The fewer hunks we have to maintain downstream the better :-)
> >>
> > Sure.
> >
> > I thought safer/cleaner to prepare the cases for non-GCC compilers, I
> > guess it's better not to add that until proven useful?
>
> Yeah, I think so. I guess it depends on your POV. To me, it seems
> cleaner to add uclinux* and uclinuxfdpiceabi only where we know there's
> a specific need, since that's also how we decide which of uclinux* and
> uclinuxfdpiceabi to use.
>
OK, here is an updated version of this patch.
Christophe
> Thanks,
> Richard
[-- Attachment #2: 0002-ARM-FDPIC-Handle-arm-uclinuxfdpiceabi-in-configure-s.patch --]
[-- Type: text/x-patch, Size: 10791 bytes --]
commit 0dbd18d60be654fa2ff2ae85670cc096db5217a5
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Fri May 4 15:11:35 2018 +0000
[ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order to enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.
In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.
In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
config/
* futex.m4: Handle *-uclinux*.
* tls.m4 (GCC_CHECK_TLS): Likewise.
gcc/
* config.gcc: Handle *-*-uclinuxfdpiceabi.
libatomic/
* configure.tgt: Handle arm*-*-uclinux*.
* configure: Regenerate.
libgcc/
* config.host: Handle *-*-uclinuxfdpiceabi.
libitm/
* configure.tgt: Handle *-*-uclinux*.
* configure: Regenerate.
* libtool.m4: Handle uclinuxfdpiceabi.
Change-Id: Ib3a08905879ef917ee6c04c3988cf4ced7209fef
diff --git a/config/futex.m4 b/config/futex.m4
index e95144d..4dffe15 100644
--- a/config/futex.m4
+++ b/config/futex.m4
@@ -9,7 +9,7 @@ AC_DEFUN([GCC_LINUX_FUTEX],[dnl
GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
permit yes|no|default)
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
diff --git a/config/tls.m4 b/config/tls.m4
index 1a5fc59..7532305 100644
--- a/config/tls.m4
+++ b/config/tls.m4
@@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
dnl Shared library options may depend on the host; this check
dnl is only known to be needed for GNU/Linux.
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinuxfdpic*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
diff --git a/gcc/config.gcc b/gcc/config.gcc
index c7a464c..721729d 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -776,7 +776,7 @@ case ${target} in
*-*-fuchsia*)
native_system_header_dir=/include
;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
extra_options="$extra_options gnu-user.opt"
gas=yes
gnu_ld=yes
@@ -805,7 +805,7 @@ case ${target} in
*-*-*android*)
tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC"
;;
- *-*-*uclibc*)
+ *-*-*uclibc* | *-*-uclinuxfdpiceabi)
tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
;;
*-*-*musl*)
@@ -1167,7 +1167,7 @@ arm*-*-netbsdelf*)
tmake_file="${tmake_file} arm/t-arm"
target_cpu_cname="strongarm"
;;
-arm*-*-linux-*) # ARM GNU/Linux with ELF
+arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
extra_options="${extra_options} linux-android.opt"
case $target in
diff --git a/libatomic/configure b/libatomic/configure
index e7076a0..92bd26a 100755
--- a/libatomic/configure
+++ b/libatomic/configure
@@ -6055,7 +6055,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -9135,7 +9135,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -10666,7 +10666,12 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+
+# uclinux* changes (here and below) have been submitted to the libtool
+# project, but have not yet been accepted: they are GCC-local changes
+# for the time being. (See
+# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index ecbb7d3..38e77ce 100644
--- a/libatomic/configure.tgt
+++ b/libatomic/configure.tgt
@@ -124,7 +124,7 @@ case "${target}" in
config_path="${config_path} linux/aarch64 posix"
;;
- arm*-*-linux*)
+ arm*-*-linux* | arm*-*-uclinux*)
# OS support for atomic primitives.
config_path="${config_path} linux/arm posix"
;;
diff --git a/libgcc/config.host b/libgcc/config.host
index 91abc84..facca2a 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -245,7 +245,7 @@ case ${host} in
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-fuchsia"
extra_parts="crtbegin.o crtend.o"
;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-gld t-slibgcc-elf-ver t-linux"
extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
if test x$enable_vtable_verify = xyes; then
@@ -435,7 +435,7 @@ arm*-*-fuchsia*)
arm*-*-netbsdelf*)
tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
;;
-arm*-*-linux*) # ARM GNU/Linux with ELF
+arm*-*-linux* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix t-crtfm"
tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc"
tm_file="$tm_file arm/bpabi-lib.h"
diff --git a/libitm/configure b/libitm/configure
old mode 100644
new mode 100755
index fb742d7..fc679c8
--- a/libitm/configure
+++ b/libitm/configure
@@ -6731,7 +6731,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -9812,7 +9812,7 @@ _LT_EOF
archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
@@ -11343,7 +11343,12 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+
+# uclinux* changes (here and below) have been submitted to the libtool
+# project, but have not yet been accepted: they are GCC-local changes
+# for the time being. (See
+# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -15003,7 +15008,12 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+
+# uclinux* changes (here and below) have been submitted to the libtool
+# project, but have not yet been accepted: they are GCC-local changes
+# for the time being. (See
+# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -16468,7 +16478,7 @@ fi
case "$target" in
- *-linux*)
+ *-linux* | *-uclinux*)
case "$enable_linux_futex" in
default)
# If headers don't have gettid/futex syscalls definition, then
@@ -16591,7 +16601,7 @@ _ACEOF
if ac_fn_c_try_link "$LINENO"; then :
chktls_save_LDFLAGS="$LDFLAGS"
case $host in
- *-*-linux*)
+ *-*-linux* | -*-uclinuxfdpic*)
LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
;;
esac
diff --git a/libitm/configure.tgt b/libitm/configure.tgt
index 4c0b602..eea865d 100644
--- a/libitm/configure.tgt
+++ b/libitm/configure.tgt
@@ -127,7 +127,7 @@ config_path="$ARCH posix generic"
# Other system configury
case "${target}" in
- *-*-linux*)
+ *-*-linux* | *-*-uclinux*)
if test "$enable_linux_futex" = yes; then
config_path="linux/$ARCH linux $config_path"
fi
diff --git a/libtool.m4 b/libtool.m4
index 8966762..e194e89 100644
--- a/libtool.m4
+++ b/libtool.m4
@@ -2449,7 +2449,12 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+
+# uclinux* changes (here and below) have been submitted to the libtool
+# project, but have not yet been accepted: they are GCC-local changes
+# for the time being. (See
+# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
version_type=linux
need_lib_prefix=no
need_version=no
@@ -3089,7 +3094,7 @@ irix5* | irix6* | nonstopux*)
;;
# This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
lt_cv_deplibs_check_method=pass_all
;;
@@ -4449,7 +4454,7 @@ _LT_EOF
_LT_TAGVAR(archive_expsym_cmds, $1)='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
;;
- gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+ gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
tmp_diet=no
if test "$host_os" = linux-dietlibc; then
case $cc_basename in
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
2019-09-02 7:51 ` Christophe Lyon
@ 2019-09-02 8:31 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-09-02 8:31 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc Patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index c7a464c..721729d 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -1167,7 +1167,7 @@ arm*-*-netbsdelf*)
> tmake_file="${tmake_file} arm/t-arm"
> target_cpu_cname="strongarm"
> ;;
> -arm*-*-linux-*) # ARM GNU/Linux with ELF
> +arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
> tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
> extra_options="${extra_options} linux-android.opt"
> case $target in
Better to remove the "# ARM GNU/Linux with ELF" comment too, since it
doesn't cover the new case and was already misleading given the
bionic support.
> diff --git a/libgcc/config.host b/libgcc/config.host
> index 91abc84..facca2a 100644
> --- a/libgcc/config.host
> +++ b/libgcc/config.host
> @@ -435,7 +435,7 @@ arm*-*-fuchsia*)
> arm*-*-netbsdelf*)
> tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
> ;;
> -arm*-*-linux*) # ARM GNU/Linux with ELF
> +arm*-*-linux* | arm*-*-uclinuxfdpiceabi) # ARM GNU/Linux with ELF
> tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix t-crtfm"
> tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc"
> tm_file="$tm_file arm/bpabi-lib.h"
Same here.
OK with those changes, thanks.
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-08-29 15:39 ` Christophe Lyon
@ 2019-09-02 16:12 ` Richard Sandiford
2019-09-02 20:04 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Richard Sandiford @ 2019-09-02 16:12 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
Sorry for the slow reply.
Christophe Lyon <christophe.lyon@st.com> writes:
> On 16/07/2019 13:58, Richard Sandiford wrote:
>> Christophe Lyon <christophe.lyon@st.com> writes:
>>> +(define_insn "*restore_pic_register_after_call"
>>> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
>>> + (match_operand:SI 1 "nonimmediate_operand" "r,m")]
>>> + UNSPEC_PIC_RESTORE)
>>> + (use (match_dup 1))
>>> + (clobber (match_dup 0))])
>>> + ]
>>> + ""
>>> + "@
>>> + mov\t%0, %1
>>> + ldr\t%0, %1"
>>> +)
>>> +
>>> (define_expand "call_internal"
>>> [(parallel [(call (match_operand 0 "memory_operand" "")
>>> (match_operand 1 "general_operand" ""))
>>
>> Since operand 0 is significant after the instruction, I think this
>> should be:
>>
>> (define_insn "*restore_pic_register_after_call"
>> [(set (match_operand:SI 0 "s_register_operand" "+r,r")
>> (unspec:SI [(match_dup 0)
>> (match_operand:SI 1 "nonimmediate_operand" "r,m")]
>> UNSPEC_PIC_RESTORE))]
>> ...
>>
>> The (use (match_dup 1)) looks redundant, since the unspec itself
>> uses operand 1.
>>
> When I try that, I have cases where the restore instruction is discarded, when the call happens just before function return. Since r9 is caller-saved, it should be restored but after dse2 the dumps say:
> (insn (set (reg:SI 9 r9)
> (unspec:SI [
> (reg:SI 9 r9)
> (reg:SI 4 r4 [121])
> ] UNSPEC_PIC_RESTORE))
> (expr_list:REG_UNUSED (reg:SI 9 r9) (nil))))
>
> and this is later removed by cprop_hardreg (which says the exit block uses r4, sp, and lr: should I make it use r9?)
But if it's caller-saved (i.e. call-clobbered), function A shouldn't
need to restore r9 after a call unless A needs the value of r9 for
something. I.e. A shouldn't need to restore r9 for A's own caller,
because the caller should be doing that iself.
So if r9 is caller-saved and not referenced between the call and
function exit, deleting the restore sounds like the right thing to do.
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-09-02 16:12 ` Richard Sandiford
@ 2019-09-02 20:04 ` Christophe Lyon
2019-09-03 8:40 ` Richard Sandiford
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-02 20:04 UTC (permalink / raw)
To: Christophe Lyon, gcc Patches, Richard Sandiford
[-- Attachment #1: Type: text/plain, Size: 2606 bytes --]
On Mon, 2 Sep 2019 at 18:12, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Sorry for the slow reply.
>
> Christophe Lyon <christophe.lyon@st.com> writes:
> > On 16/07/2019 13:58, Richard Sandiford wrote:
> >> Christophe Lyon <christophe.lyon@st.com> writes:
> >>> +(define_insn "*restore_pic_register_after_call"
> >>> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
> >>> + (match_operand:SI 1 "nonimmediate_operand" "r,m")]
> >>> + UNSPEC_PIC_RESTORE)
> >>> + (use (match_dup 1))
> >>> + (clobber (match_dup 0))])
> >>> + ]
> >>> + ""
> >>> + "@
> >>> + mov\t%0, %1
> >>> + ldr\t%0, %1"
> >>> +)
> >>> +
> >>> (define_expand "call_internal"
> >>> [(parallel [(call (match_operand 0 "memory_operand" "")
> >>> (match_operand 1 "general_operand" ""))
> >>
> >> Since operand 0 is significant after the instruction, I think this
> >> should be:
> >>
> >> (define_insn "*restore_pic_register_after_call"
> >> [(set (match_operand:SI 0 "s_register_operand" "+r,r")
> >> (unspec:SI [(match_dup 0)
> >> (match_operand:SI 1 "nonimmediate_operand" "r,m")]
> >> UNSPEC_PIC_RESTORE))]
> >> ...
> >>
> >> The (use (match_dup 1)) looks redundant, since the unspec itself
> >> uses operand 1.
> >>
> > When I try that, I have cases where the restore instruction is discarded, when the call happens just before function return. Since r9 is caller-saved, it should be restored but after dse2 the dumps say:
> > (insn (set (reg:SI 9 r9)
> > (unspec:SI [
> > (reg:SI 9 r9)
> > (reg:SI 4 r4 [121])
> > ] UNSPEC_PIC_RESTORE))
> > (expr_list:REG_UNUSED (reg:SI 9 r9) (nil))))
> >
> > and this is later removed by cprop_hardreg (which says the exit block uses r4, sp, and lr: should I make it use r9?)
>
> But if it's caller-saved (i.e. call-clobbered), function A shouldn't
> need to restore r9 after a call unless A needs the value of r9 for
> something. I.e. A shouldn't need to restore r9 for A's own caller,
> because the caller should be doing that iself.
>
> So if r9 is caller-saved and not referenced between the call and
> function exit, deleting the restore sounds like the right thing to do.
>
Of course! I should have found that myself: I tried this change before I removed
an "optimization" we had that avoided restoring r9 before calling
functions in the same module... thus breaking the ABI.
Since the previous patch I send didn't have this "optimization", the
above now works.
New patch attached.
Thanks!
Christophe
> Richard
[-- Attachment #2: 0004-ARM-FDPIC-Add-support-for-FDPIC-for-arm-architecture.patch --]
[-- Type: text/x-patch, Size: 19616 bytes --]
commit 7b606c39834c5fefbde30a3131f9b123d02e7491
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu Feb 8 11:10:51 2018 +0100
[ARM] FDPIC: Add support for FDPIC for arm architecture
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.
When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
FDPIC_REGNUM.
(arm_function_ok_for_sibcall): Disable sibcall optimization if we
have no decl or go through PLT.
(calculate_pic_address_constant): New function.
(legitimize_pic_address): Call calculate_pic_address_constant.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_emit_call_insn): Add support for FDPIC.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
Define. (FDPIC_REGNUM): New define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
gcc/testsuite/
* gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.
Change-Id: I1e96d260074ab7b75d36cdff5d34ad898f35c66f
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 6e256ee..34695fa 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
builtin_define ("__ARM_EABI__");
}
+ def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+
def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 485bc68..272968a 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
extern int arm_const_double_inline_cost (rtx);
extern bool arm_const_double_by_parts (rtx);
extern bool arm_const_double_by_immediates (rtx);
+extern rtx arm_load_function_descriptor (rtx funcdesc);
extern void arm_emit_call_insn (rtx, rtx, bool);
bool detect_cmse_nonsecure_call (tree);
extern const char *output_call (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 45abcd8..ea6ea37 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3485,6 +3485,14 @@ arm_option_override (void)
if (flag_pic && TARGET_VXWORKS_RTP)
arm_pic_register = 9;
+ /* If in FDPIC mode then force arm_pic_register to be r9. */
+ if (TARGET_FDPIC)
+ {
+ arm_pic_register = FDPIC_REGNUM;
+ if (TARGET_THUMB1)
+ sorry ("FDPIC mode is not supported in Thumb-1 mode.");
+ }
+
if (arm_pic_register_string != NULL)
{
int pic_register = decode_reg_name (arm_pic_register_string);
@@ -7295,6 +7303,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
if (cfun->machine->sibcall_blocked)
return false;
+ if (TARGET_FDPIC)
+ {
+ /* In FDPIC, never tailcall something for which we have no decl:
+ the target function could be in a different module, requiring
+ a different FDPIC register value. */
+ if (decl == NULL)
+ return false;
+
+ /* Don't tailcall if we go through the PLT since the FDPIC
+ register is then corrupted and we don't restore it after
+ static function calls. */
+ if (!targetm.binds_local_p (decl))
+ return false;
+ }
+
/* Never tailcall something if we are generating code for Thumb-1. */
if (TARGET_THUMB1)
return false;
@@ -7501,6 +7524,24 @@ require_pic_register (rtx pic_reg, bool compute_now)
}
}
+/* Generate insns to calculate the address of ORIG in pic mode. */
+static rtx_insn *
+calculate_pic_address_constant (rtx reg, rtx pic_reg, rtx orig)
+{
+ rtx pat;
+ rtx mem;
+
+ pat = gen_calculate_pic_address (reg, pic_reg, orig);
+
+ /* Make the MEM as close to a constant as possible. */
+ mem = SET_SRC (pat);
+ gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
+ MEM_READONLY_P (mem) = 1;
+ MEM_NOTRAP_P (mem) = 1;
+
+ return emit_insn (pat);
+}
+
/* Legitimize PIC load to ORIG into REG. If REG is NULL, a new pseudo is
created to hold the result of the load. If not NULL, PIC_REG indicates
which register to use as PIC register, otherwise it is decided by register
@@ -7545,24 +7586,13 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg,
insn = arm_pic_static_addr (orig, reg);
else
{
- rtx pat;
- rtx mem;
-
/* If this function doesn't have a pic register, create one now. */
require_pic_register (pic_reg, compute_now);
if (pic_reg == NULL_RTX)
pic_reg = cfun->machine->pic_reg;
- pat = gen_calculate_pic_address (reg, pic_reg, orig);
-
- /* Make the MEM as close to a constant as possible. */
- mem = SET_SRC (pat);
- gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
- MEM_READONLY_P (mem) = 1;
- MEM_NOTRAP_P (mem) = 1;
-
- insn = emit_insn (pat);
+ insn = calculate_pic_address_constant (reg, pic_reg, orig);
}
/* Put a REG_EQUAL note on this insn, so that it can be optimized
@@ -7711,7 +7741,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
{
rtx l1, labelno, pic_tmp, pic_rtx;
- if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
+ if (crtl->uses_pic_offset_table == 0
+ || TARGET_SINGLE_PIC_BASE
+ || TARGET_FDPIC)
return;
gcc_assert (flag_pic);
@@ -7780,28 +7812,132 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
emit_use (pic_reg);
}
+/* Try to determine whether an object, referenced via ORIG, will be
+ placed in the text or data segment. This is used in FDPIC mode, to
+ decide which relocations to use when accessing ORIG. *IS_READONLY
+ is set to true if ORIG is a read-only location, false otherwise.
+ Return true if we could determine the location of ORIG, false
+ otherwise. *IS_READONLY is valid only when we return true. */
+static bool
+arm_is_segment_info_known (rtx orig, bool *is_readonly)
+{
+ *is_readonly = false;
+
+ if (GET_CODE (orig) == LABEL_REF)
+ {
+ *is_readonly = true;
+ return true;
+ }
+
+ if (SYMBOL_REF_P (orig))
+ {
+ if (CONSTANT_POOL_ADDRESS_P (orig))
+ {
+ *is_readonly = true;
+ return true;
+ }
+ else if (SYMBOL_REF_LOCAL_P (orig)
+ && !SYMBOL_REF_EXTERNAL_P (orig)
+ && SYMBOL_REF_DECL (orig)
+ && (!DECL_P (SYMBOL_REF_DECL (orig))
+ || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
+ {
+ tree decl = SYMBOL_REF_DECL (orig);
+ tree init = (TREE_CODE (decl) == VAR_DECL)
+ ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
+ ? decl : 0;
+ int reloc = 0;
+ bool named_section, readonly;
+
+ if (init && init != error_mark_node)
+ reloc = compute_reloc_for_constant (init);
+
+ named_section = TREE_CODE (decl) == VAR_DECL
+ && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
+ readonly = decl_readonly_section (decl, reloc);
+
+ /* We don't know where the link script will put a named
+ section, so return false in such a case. */
+ if (named_section)
+ return false;
+
+ *is_readonly = readonly;
+ return true;
+ }
+ else
+ {
+ /* We don't know. */
+ return false;
+ }
+ }
+ else
+ gcc_unreachable ();
+
+ return false;
+}
+
/* Generate code to load the address of a static var when flag_pic is set. */
static rtx_insn *
arm_pic_static_addr (rtx orig, rtx reg)
{
rtx l1, labelno, offset_rtx;
+ rtx_insn *insn;
gcc_assert (flag_pic);
- /* We use an UNSPEC rather than a LABEL_REF because this label
- never appears in the code stream. */
- labelno = GEN_INT (pic_labelno++);
- l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- l1 = gen_rtx_CONST (VOIDmode, l1);
+ bool is_readonly = false;
+ bool info_known = false;
+
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig))
+ info_known = arm_is_segment_info_known (orig, &is_readonly);
+
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig)
+ && !info_known)
+ {
+ /* We don't know where orig is stored, so we have be
+ pessimistic and use a GOT relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ insn = calculate_pic_address_constant (reg, pic_reg, orig);
+ }
+ else if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && (SYMBOL_REF_FUNCTION_P (orig)
+ || (info_known && !is_readonly)))
+ {
+ /* We use the GOTOFF relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
+ emit_insn (gen_movsi (reg, l1));
+ insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
+ }
+ else
+ {
+ /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
+ PC-relative access. */
+ /* We use an UNSPEC rather than a LABEL_REF because this label
+ never appears in the code stream. */
+ labelno = GEN_INT (pic_labelno++);
+ l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ l1 = gen_rtx_CONST (VOIDmode, l1);
+
+ /* On the ARM the PC register contains 'dot + 8' at the time of the
+ addition, on the Thumb it is 'dot + 4'. */
+ offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
+ offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
+ UNSPEC_SYMBOL_OFFSET);
+ offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
- /* On the ARM the PC register contains 'dot + 8' at the time of the
- addition, on the Thumb it is 'dot + 4'. */
- offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
- offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
- UNSPEC_SYMBOL_OFFSET);
- offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
+ insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
+ labelno));
+ }
- return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
+ return insn;
}
/* Return nonzero if X is valid as an ARM state addressing register. */
@@ -8510,7 +8646,7 @@ load_tls_operand (rtx x, rtx reg)
static rtx_insn *
arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
{
- rtx label, labelno, sum;
+ rtx label, labelno = NULL_RTX, sum;
gcc_assert (reloc != TLS_DESCSEQ);
start_sequence ();
@@ -16112,9 +16248,32 @@ get_jump_table_size (rtx_jump_table_data *insn)
return 0;
}
+/* Emit insns to load the function address from FUNCDESC (an FDPIC
+ function descriptor) into a register and the GOT address into the
+ FDPIC register, returning an rtx for the register holding the
+ function address. */
+
+rtx
+arm_load_function_descriptor (rtx funcdesc)
+{
+ rtx fnaddr_reg = gen_reg_rtx (Pmode);
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+ rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+
+ emit_move_insn (fnaddr_reg, fnaddr);
+
+ /* The ABI requires the entry point address to be loaded first, but
+ since we cannot support lazy binding for lack of atomic load of
+ two 32-bits values, we do not need to bother to prevent the
+ previous load from being moved after that of the GOT address. */
+ emit_insn (gen_restore_pic_register_after_call (pic_reg, gotaddr));
+
+ return fnaddr_reg;
+}
+
/* Return the maximum amount of padding that will be inserted before
label LABEL. */
-
static HOST_WIDE_INT
get_label_padding (rtx label)
{
@@ -18249,6 +18408,12 @@ arm_emit_call_insn (rtx pat, rtx addr, bool sibcall)
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), cfun->machine->pic_reg);
}
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), fdpic_reg);
+ }
+
if (TARGET_AAPCS_BASED)
{
/* For AAPCS, IP and CC can be clobbered by veneers inserted by the
@@ -23069,9 +23234,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
&& (!SYMBOL_REF_LOCAL_P (x)
|| (SYMBOL_REF_DECL (x)
? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
- fputs ("(GOT)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTFUNCDESC)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
else
- fputs ("(GOTOFF)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTOFFFUNCDESC)", asm_out_file);
+ else
+ {
+ bool is_readonly;
+
+ if (arm_is_segment_info_known (x, &is_readonly))
+ fputs ("(GOTOFF)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
+ }
+ }
+
+ /* For FDPIC we also have to mark symbol for .data section. */
+ if (TARGET_FDPIC
+ && NEED_GOT_RELOC
+ && flag_pic
+ && !making_const_table
+ && SYMBOL_REF_P (x))
+ {
+ if (SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(FUNCDESC)", asm_out_file);
}
fputc ('\n', asm_out_file);
return true;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 4866e1e..7b50ef5 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -892,6 +892,9 @@ extern int arm_arch_cmse;
Pascal), so the following is not true. */
#define STATIC_CHAIN_REGNUM 12
+/* r9 is the FDPIC register (base register for GOT and FUNCDESC accesses). */
+#define FDPIC_REGNUM 9
+
/* Define this to be where the real frame pointer is if it is not possible to
work out the offset between the frame pointer and the automatic variables
until after register allocation has taken place. FRAME_POINTER_REGNUM
@@ -1948,6 +1951,10 @@ extern unsigned arm_pic_register;
data addresses in memory. */
#define PIC_OFFSET_TABLE_REGNUM arm_pic_register
+/* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT
+ entries would need to handle saving and restoring it). */
+#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC
+
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. One exception is
UNSPEC_TLS, which is always PIC. */
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 0aecd03..b0ebb13 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8140,6 +8140,11 @@
: !REG_P (callee))
XEXP (operands[0], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[0], 0)
+ = arm_load_function_descriptor (XEXP (operands[0], 0));
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_internal (operands[0], operands[1],
@@ -8151,10 +8156,33 @@
pat = gen_call_internal (operands[0], operands[1], operands[2]);
arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg =
+ get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ initial_fdpic_reg));
+ }
+
DONE;
}"
)
+(define_insn "restore_pic_register_after_call"
+ [(set (match_operand:SI 0 "s_register_operand" "+r,r")
+ (unspec:SI [(match_dup 0)
+ (match_operand:SI 1 "nonimmediate_operand" "r,m")]
+ UNSPEC_PIC_RESTORE))]
+ ""
+ "@
+ mov\t%0, %1
+ ldr\t%0, %1"
+)
+
(define_expand "call_internal"
[(parallel [(call (match_operand 0 "memory_operand" "")
(match_operand 1 "general_operand" ""))
@@ -8228,6 +8256,11 @@
: !REG_P (callee))
XEXP (operands[1], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[1], 0)))
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[1], 0)
+ = arm_load_function_descriptor (XEXP (operands[1], 0));
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_value_internal (operands[0], operands[1],
@@ -8240,6 +8273,18 @@
operands[2], operands[3]);
arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg =
+ get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ initial_fdpic_reg));
+ }
+
DONE;
}"
)
@@ -8582,7 +8627,7 @@
(const_int 0))
(match_operand 1 "" "")
(match_operand 2 "" "")])]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
@@ -8649,7 +8694,7 @@
(define_expand "untyped_return"
[(match_operand:BLK 0 "memory_operand" "")
(match_operand 1 "" "")]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 174bcc5..bda35d5 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -89,6 +89,7 @@
UNSPEC_SP_SET ; Represent the setting of stack protector's canary
UNSPEC_SP_TEST ; Represent the testing of stack protector's canary
; against the guard.
+ UNSPEC_PIC_RESTORE ; Use to restore fdpic register
])
(define_c_enum "unspec" [
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
index 4753e36..51a76fc 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -17,5 +17,5 @@ F (__fp16 a, __fp16 b, __fp16 c)
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
-/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
index 41c7ab7..ae65fb8 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
@@ -16,5 +16,5 @@ F (__fp16 a, __fp16 b, __fp16 c)
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
-/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-09-02 20:04 ` Christophe Lyon
@ 2019-09-03 8:40 ` Richard Sandiford
2019-09-04 19:59 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Richard Sandiford @ 2019-09-03 8:40 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc Patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> @@ -3485,6 +3485,14 @@ arm_option_override (void)
> if (flag_pic && TARGET_VXWORKS_RTP)
> arm_pic_register = 9;
>
> + /* If in FDPIC mode then force arm_pic_register to be r9. */
> + if (TARGET_FDPIC)
> + {
> + arm_pic_register = FDPIC_REGNUM;
> + if (TARGET_THUMB1)
> + sorry ("FDPIC mode is not supported in Thumb-1 mode.");
Should be no "." at the end.
> + }
> +
> if (arm_pic_register_string != NULL)
> {
> int pic_register = decode_reg_name (arm_pic_register_string);
> [...]
> @@ -7295,6 +7303,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
> if (cfun->machine->sibcall_blocked)
> return false;
>
> + if (TARGET_FDPIC)
> + {
> + /* In FDPIC, never tailcall something for which we have no decl:
> + the target function could be in a different module, requiring
> + a different FDPIC register value. */
> + if (decl == NULL)
> + return false;
> +
> + /* Don't tailcall if we go through the PLT since the FDPIC
> + register is then corrupted and we don't restore it after
> + static function calls. */
> + if (!targetm.binds_local_p (decl))
> + return false;
> + }
> +
> /* Never tailcall something if we are generating code for Thumb-1. */
> if (TARGET_THUMB1)
> return false;
Is this still needed after you removed the optimisation to avoid
restoring r9? (Not really a review comment, just curious.)
> [...]
> @@ -7780,28 +7812,132 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
> emit_use (pic_reg);
> }
>
> +/* Try to determine whether an object, referenced via ORIG, will be
> + placed in the text or data segment. This is used in FDPIC mode, to
> + decide which relocations to use when accessing ORIG. *IS_READONLY
> + is set to true if ORIG is a read-only location, false otherwise.
> + Return true if we could determine the location of ORIG, false
> + otherwise. *IS_READONLY is valid only when we return true. */
> +static bool
> +arm_is_segment_info_known (rtx orig, bool *is_readonly)
> +{
> + *is_readonly = false;
> +
> + if (GET_CODE (orig) == LABEL_REF)
> + {
> + *is_readonly = true;
> + return true;
> + }
> +
> + if (SYMBOL_REF_P (orig))
> + {
> + if (CONSTANT_POOL_ADDRESS_P (orig))
> + {
> + *is_readonly = true;
> + return true;
> + }
> + else if (SYMBOL_REF_LOCAL_P (orig)
> + && !SYMBOL_REF_EXTERNAL_P (orig)
> + && SYMBOL_REF_DECL (orig)
> + && (!DECL_P (SYMBOL_REF_DECL (orig))
> + || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
This can just be an "if".
> + {
> + tree decl = SYMBOL_REF_DECL (orig);
> + tree init = (TREE_CODE (decl) == VAR_DECL)
> + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
> + ? decl : 0;
> + int reloc = 0;
> + bool named_section, readonly;
> +
> + if (init && init != error_mark_node)
> + reloc = compute_reloc_for_constant (init);
> +
> + named_section = TREE_CODE (decl) == VAR_DECL
> + && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
> + readonly = decl_readonly_section (decl, reloc);
> +
> + /* We don't know where the link script will put a named
> + section, so return false in such a case. */
> + if (named_section)
> + return false;
> +
> + *is_readonly = readonly;
> + return true;
> + }
> + else
> + {
> + /* We don't know. */
> + return false;
> + }
> + }
> + else
> + gcc_unreachable ();
> +
> + return false;
Then this can end with:
/* We don't know. */
return false;
}
gcc_unreachable ();
}
> +}
> +
> /* Generate code to load the address of a static var when flag_pic is set. */
> static rtx_insn *
> arm_pic_static_addr (rtx orig, rtx reg)
> {
> rtx l1, labelno, offset_rtx;
> + rtx_insn *insn;
>
> gcc_assert (flag_pic);
>
> - /* We use an UNSPEC rather than a LABEL_REF because this label
> - never appears in the code stream. */
> - labelno = GEN_INT (pic_labelno++);
> - l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
> - l1 = gen_rtx_CONST (VOIDmode, l1);
> + bool is_readonly = false;
> + bool info_known = false;
> +
> + if (TARGET_FDPIC
> + && SYMBOL_REF_P (orig)
> + && !SYMBOL_REF_FUNCTION_P (orig))
> + info_known = arm_is_segment_info_known (orig, &is_readonly);
> +
> + if (TARGET_FDPIC
> + && SYMBOL_REF_P (orig)
> + && !SYMBOL_REF_FUNCTION_P (orig)
> + && !info_known)
> + {
> + /* We don't know where orig is stored, so we have be
> + pessimistic and use a GOT relocation. */
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +
> + insn = calculate_pic_address_constant (reg, pic_reg, orig);
> + }
> + else if (TARGET_FDPIC
> + && SYMBOL_REF_P (orig)
> + && (SYMBOL_REF_FUNCTION_P (orig)
> + || (info_known && !is_readonly)))
The info_known check is redundant here. I think it's actually clearer
without, since it's then more obvious that the final "else" is handling:
!SYMBOL_REF_FUNCTION_P (orig) && is_readonly
(Initially I misread the condition and was wondering why it was safe to
drop to the "else" when "!info_known". But it doesn't do that of course.)
> + {
> + /* We use the GOTOFF relocation. */
> + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> +
> + rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
> + emit_insn (gen_movsi (reg, l1));
> + insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
> + }
> + else
> + {
> + /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
> + PC-relative access. */
> + /* We use an UNSPEC rather than a LABEL_REF because this label
> + never appears in the code stream. */
> + labelno = GEN_INT (pic_labelno++);
> + l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
> + l1 = gen_rtx_CONST (VOIDmode, l1);
> +
> + /* On the ARM the PC register contains 'dot + 8' at the time of the
> + addition, on the Thumb it is 'dot + 4'. */
> + offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
> + offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
> + UNSPEC_SYMBOL_OFFSET);
> + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
>
> - /* On the ARM the PC register contains 'dot + 8' at the time of the
> - addition, on the Thumb it is 'dot + 4'. */
> - offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
> - offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
> - UNSPEC_SYMBOL_OFFSET);
> - offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
> + insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
> + labelno));
> + }
>
> - return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
> + return insn;
> }
>
> /* Return nonzero if X is valid as an ARM state addressing register. */
> @@ -8510,7 +8646,7 @@ load_tls_operand (rtx x, rtx reg)
> static rtx_insn *
> arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
> {
> - rtx label, labelno, sum;
> + rtx label, labelno = NULL_RTX, sum;
>
> gcc_assert (reloc != TLS_DESCSEQ);
> start_sequence ();
Looks like this might be a stray change (not mentioned in the changelog).
> [...]
> @@ -23069,9 +23234,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
> && (!SYMBOL_REF_LOCAL_P (x)
> || (SYMBOL_REF_DECL (x)
> ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
> - fputs ("(GOT)", asm_out_file);
> + {
> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> + fputs ("(GOTFUNCDESC)", asm_out_file);
> + else
> + fputs ("(GOT)", asm_out_file);
> + }
> else
> - fputs ("(GOTOFF)", asm_out_file);
> + {
> + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> + fputs ("(GOTOFFFUNCDESC)", asm_out_file);
> + else
> + {
> + bool is_readonly;
> +
> + if (arm_is_segment_info_known (x, &is_readonly))
> + fputs ("(GOTOFF)", asm_out_file);
> + else
> + fputs ("(GOT)", asm_out_file);
> + }
It looks like this changes behaviour for non-FDPIC. Is that intentional?
Or should it be:
if (!TARGET_FDPIC
|| arm_is_segment_info_known (x, &is_readonly))
?
> + }
> + }
> +
> + /* For FDPIC we also have to mark symbol for .data section. */
> + if (TARGET_FDPIC
> + && NEED_GOT_RELOC
> + && flag_pic
> + && !making_const_table
> + && SYMBOL_REF_P (x))
> + {
> + if (SYMBOL_REF_FUNCTION_P (x))
> + fputs ("(FUNCDESC)", asm_out_file);
> }
> fputc ('\n', asm_out_file);
> return true;
Given:
> > Can NEED_GOT_RELOC or flag_pic be false for TARGET_FDPIC?
> No.
>
> > Is !flag_pic TARGET_FDPIC supported?
> No; flag_pic is false when we use -mno-fdpic, so we revert to the "usual" abi then
the flag_pic and NEED_GOT_RELOC checks look redundant.
Might as well put the SYMBOL_REF_FUNCTION_P (x) in the main "if"
statement rather than split it out.
> [...]
> @@ -8151,10 +8156,33 @@
> pat = gen_call_internal (operands[0], operands[1], operands[2]);
> arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
> }
> +
> + /* Restore FDPIC register (r9) after call. */
> + if (TARGET_FDPIC)
> + {
> + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + rtx initial_fdpic_reg =
> + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
Formatting nit: "=" should be on the next line.
> +
> + emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
> + initial_fdpic_reg));
> + }
> +
> DONE;
> }"
> )
>
> [...]
> @@ -8240,6 +8273,18 @@
> operands[2], operands[3]);
> arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
> }
> +
> + /* Restore FDPIC register (r9) after call. */
> + if (TARGET_FDPIC)
> + {
> + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> + rtx initial_fdpic_reg =
> + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
Same here.
Looks good otherwise, thanks.
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support.
2019-05-15 12:43 ` [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support Christophe Lyon
@ 2019-09-04 14:16 ` Kyrill Tkachov
2019-09-04 20:03 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-09-04 14:16 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe,
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
> TLS_IE32_FDPIC.
>
> We do not support the GNU2 TLS dialect.
>
> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â gcc/
> Â Â Â Â Â Â Â * config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
> Â Â Â Â Â Â Â TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
> Â Â Â Â Â Â Â (arm_call_tls_get_addr): Add FDPIC support.
> Â Â Â Â Â Â Â (legitimize_tls_address): Likewise.
> Â Â Â Â Â Â Â (arm_emit_tls_decoration): Likewise.
>
> Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 99d13bf..5fc7a20 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -2379,9 +2379,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
>
> Â enum tls_reloc {
> Â Â TLS_GD32,
> +Â TLS_GD32_FDPIC,
> Â Â TLS_LDM32,
> +Â TLS_LDM32_FDPIC,
> Â Â TLS_LDO32,
> Â Â TLS_IE32,
> +Â TLS_IE32_FDPIC,
> Â Â TLS_LE32,
> Â Â TLS_DESCSEQÂ /* GNU scheme */
> Â };
> @@ -8760,20 +8763,34 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx
> *valuep, int reloc)
> Â Â gcc_assert (reloc != TLS_DESCSEQ);
> Â Â start_sequence ();
>
> -Â labelno = GEN_INT (pic_labelno++);
> -Â label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> UNSPEC_PIC_LABEL);
> -Â label = gen_rtx_CONST (VOIDmode, label);
> +Â if (TARGET_FDPIC)
> +Â Â Â {
> +Â Â Â Â Â sum = gen_rtx_UNSPEC (Pmode,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (2, x, GEN_INT (reloc)),
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â UNSPEC_TLS);
> +Â Â Â }
> +Â else
> +Â Â Â {
> +Â Â Â Â Â labelno = GEN_INT (pic_labelno++);
> +Â Â Â Â Â label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> UNSPEC_PIC_LABEL);
> +Â Â Â Â Â label = gen_rtx_CONST (VOIDmode, label);
>
> -Â sum = gen_rtx_UNSPEC (Pmode,
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (4, x, GEN_INT (reloc), label,
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TARGET_ARM ? 8 : 4)),
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â UNSPEC_TLS);
> +Â Â Â Â Â sum = gen_rtx_UNSPEC (Pmode,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (4, x, GEN_INT (reloc), label,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TARGET_ARM ? 8 : 4)),
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â UNSPEC_TLS);
> +Â Â Â }
> Â Â reg = load_tls_operand (sum, reg);
>
> -Â if (TARGET_ARM)
> -Â Â Â emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
> +Â if (TARGET_FDPIC)
> +Â Â Â {
> +Â Â Â Â Â emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode,
> FDPIC_REGNUM)));
> +Â Â Â }
No {} around single statement.
> Â Â else
> -Â Â Â emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> +Â Â Â if (TARGET_ARM)
> +Â Â Â Â Â emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
Merge that "if" with the "else" in an "else if"
> +Â Â Â else
> +Â Â Â Â Â emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
>
> Â Â *valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX,
>                                      LCT_PURE, /* LCT_CONST? */
> @@ -8808,6 +8825,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
> Â Â return reg;
> Â }
>
> +
> Â rtx
> Â legitimize_tls_address (rtx x, rtx reg)
> Â {
> @@ -8820,6 +8838,9 @@ legitimize_tls_address (rtx x, rtx reg)
> Â Â Â Â case TLS_MODEL_GLOBAL_DYNAMIC:
> Â Â Â Â Â Â if (TARGET_GNU2_TLS)
> Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â Â Â Â Â gcc_unreachable();
> +
Use gcc_assert (TARGET_FDPIC)
> Â Â Â Â Â Â Â Â Â Â reg = arm_tls_descseq_addr (x, reg);
>
> Â Â Â Â Â Â Â Â Â Â tp = arm_load_tp (NULL_RTX);
> @@ -8829,7 +8850,10 @@ legitimize_tls_address (rtx x, rtx reg)
> Â Â Â Â Â Â else
> Â Â Â Â Â Â Â Â {
> Â Â Â Â Â Â Â Â Â Â /* Original scheme */
> -Â Â Â Â Â Â Â Â insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
> +Â Â Â Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â Â Â Â Â insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
> +Â Â Â Â Â Â Â Â else
> +Â Â Â Â Â Â Â Â Â Â insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
> Â Â Â Â Â Â Â Â Â Â dest = gen_reg_rtx (Pmode);
> Â Â Â Â Â Â Â Â Â Â emit_libcall_block (insns, dest, ret, x);
> Â Â Â Â Â Â Â Â }
> @@ -8838,6 +8862,9 @@ legitimize_tls_address (rtx x, rtx reg)
> Â Â Â Â case TLS_MODEL_LOCAL_DYNAMIC:
> Â Â Â Â Â Â if (TARGET_GNU2_TLS)
> Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â Â Â Â Â gcc_unreachable();
> +
Likewise.
Ok with those changes.
Thanks,
Kyrill
> Â Â Â Â Â Â Â Â Â Â reg = arm_tls_descseq_addr (x, reg);
>
> Â Â Â Â Â Â Â Â Â Â tp = arm_load_tp (NULL_RTX);
> @@ -8846,7 +8873,10 @@ legitimize_tls_address (rtx x, rtx reg)
> Â Â Â Â Â Â Â Â }
> Â Â Â Â Â Â else
> Â Â Â Â Â Â Â Â {
> -Â Â Â Â Â Â Â Â insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
> +Â Â Â Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â Â Â Â Â insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
> +Â Â Â Â Â Â Â Â else
> +Â Â Â Â Â Â Â Â Â Â insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
>
> Â Â Â Â Â Â Â Â Â Â /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
>              share the LDM result with other LD model accesses. */
> @@ -8865,23 +8895,35 @@ legitimize_tls_address (rtx x, rtx reg)
> Â Â Â Â Â Â return dest;
>
> Â Â Â Â case TLS_MODEL_INITIAL_EXEC:
> -Â Â Â Â Â labelno = GEN_INT (pic_labelno++);
> -Â Â Â Â Â label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> UNSPEC_PIC_LABEL);
> -Â Â Â Â Â label = gen_rtx_CONST (VOIDmode, label);
> -Â Â Â Â Â sum = gen_rtx_UNSPEC (Pmode,
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TARGET_ARM ? 8 : 4)),
> -Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â UNSPEC_TLS);
> -Â Â Â Â Â reg = load_tls_operand (sum, reg);
> -
> -Â Â Â Â Â if (TARGET_ARM)
> -Â Â Â Â Â Â emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
> -Â Â Â Â Â else if (TARGET_THUMB2)
> -Â Â Â Â Â Â emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
> +Â Â Â Â Â if (TARGET_FDPIC)
> +Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â sum = gen_rtx_UNSPEC (Pmode,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (2, x, GEN_INT
> (TLS_IE32_FDPIC)),
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â UNSPEC_TLS);
> +Â Â Â Â Â Â Â Â reg = load_tls_operand (sum, reg);
> +Â Â Â Â Â Â Â Â emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode,
> FDPIC_REGNUM)));
> +Â Â Â Â Â Â Â Â emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
> +Â Â Â Â Â Â }
> Â Â Â Â Â Â else
> Â Â Â Â Â Â Â Â {
> -Â Â Â Â Â Â Â Â emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> -Â Â Â Â Â Â Â Â emit_move_insn (reg, gen_const_mem (SImode, reg));
> +Â Â Â Â Â Â Â Â labelno = GEN_INT (pic_labelno++);
> +Â Â Â Â Â Â Â Â label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> UNSPEC_PIC_LABEL);
> +Â Â Â Â Â Â Â Â label = gen_rtx_CONST (VOIDmode, label);
> +Â Â Â Â Â Â Â Â sum = gen_rtx_UNSPEC (Pmode,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gen_rtvec (4, x, GEN_INT (TLS_IE32),
> label,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TARGET_ARM ? 8 : 4)),
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â UNSPEC_TLS);
> +Â Â Â Â Â Â Â Â reg = load_tls_operand (sum, reg);
> +
> +Â Â Â Â Â Â Â Â if (TARGET_ARM)
> +Â Â Â Â Â Â Â Â Â Â emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
> +Â Â Â Â Â Â Â Â else if (TARGET_THUMB2)
> +Â Â Â Â Â Â Â Â Â Â emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg,
> labelno));
> +Â Â Â Â Â Â Â Â else
> +Â Â Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â Â Â emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> +Â Â Â Â Â Â Â Â Â Â Â Â emit_move_insn (reg, gen_const_mem (SImode, reg));
> +Â Â Â Â Â Â Â Â Â Â }
> Â Â Â Â Â Â Â Â }
>
> Â Â Â Â Â Â tp = arm_load_tp (NULL_RTX);
> @@ -28218,15 +28260,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x)
> Â Â Â Â case TLS_GD32:
> Â Â Â Â Â Â fputs ("(tlsgd)", fp);
> Â Â Â Â Â Â break;
> +Â Â Â case TLS_GD32_FDPIC:
> +Â Â Â Â Â fputs ("(tlsgd_fdpic)", fp);
> +Â Â Â Â Â break;
> Â Â Â Â case TLS_LDM32:
> Â Â Â Â Â Â fputs ("(tlsldm)", fp);
> Â Â Â Â Â Â break;
> +Â Â Â case TLS_LDM32_FDPIC:
> +Â Â Â Â Â fputs ("(tlsldm_fdpic)", fp);
> +Â Â Â Â Â break;
> Â Â Â Â case TLS_LDO32:
> Â Â Â Â Â Â fputs ("(tlsldo)", fp);
> Â Â Â Â Â Â break;
> Â Â Â Â case TLS_IE32:
> Â Â Â Â Â Â fputs ("(gottpoff)", fp);
> Â Â Â Â Â Â break;
> +Â Â Â case TLS_IE32_FDPIC:
> +Â Â Â Â Â fputs ("(gottpoff_fdpic)", fp);
> +Â Â Â Â Â break;
> Â Â Â Â case TLS_LE32:
> Â Â Â Â Â Â fputs ("(tpoff)", fp);
> Â Â Â Â Â Â break;
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame
2019-05-15 12:44 ` [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame Christophe Lyon
@ 2019-09-04 14:19 ` Kyrill Tkachov
0 siblings, 0 replies; 109+ messages in thread
From: Kyrill Tkachov @ 2019-09-04 14:19 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches
Hi Christophe,
On 5/15/19 1:39 PM, Christophe Lyon wrote:
> 2019-XX-XXÂ Christophe Lyon <christophe.lyon@st.com>
>        Mickaël Guêné <mickael.guene@st.com>
>
> Â Â Â Â Â Â Â libgcc/
> Â Â Â Â Â Â Â * unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN)
> Â Â Â Â Â Â Â (THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC)
> Â Â Â Â Â Â Â (FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER)
> Â Â Â Â Â Â Â (FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT)
> Â Â Â Â Â Â Â (ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0,
> FDPIC_T2_LDR_R12_WITH_FUNCDESC)
> Â Â Â Â Â Â Â (FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New.
> Â Â Â Â Â Â Â (__gnu_personality_sigframe_fdpic): New.
> Â Â Â Â Â Â Â (get_eit_entry): Add FDPIC signal frame support.
>
At this point I'm looking that the code is FDPIC-specific and thus won't
break other targets.
I'll have to trust your testing that this is correct for FDPIC.
Ok.
Thanks,
Kyrill
> Change-Id: I7f9527cc50665dd1a731b7badf71c319fb38bf57
>
> diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
> index 0bacc11..c9a82b7 100644
> --- a/libgcc/unwind-arm-common.inc
> +++ b/libgcc/unwind-arm-common.inc
> @@ -30,6 +30,26 @@
> Â #include <sys/sdt.h>
> Â #endif
>
> +#if __FDPIC__
> +/* Load r7 with rt_sigreturn value. */
> +#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad     /* mov  r7, #0xad */
> +#define THUMB2_SET_R7_RT_SIGRETURN    0x07adf04f     /* mov.w r7,
> #0xad */
> +
> +/* FDPIC jump to restorer sequence. */
> +#define FDPIC_LDR_R12_WITH_FUNCDESC   0xe59fc004     /* ldr  r12,
> [pc, #4] */
> +#define FDPIC_LDR_R9_WITH_GOT         0xe59c9004     /* ldr  r9,
> [r12, #4] */
> +#define FDPIC_LDR_PC_WITH_RESTORER    0xe59cf000     /* ldr  pc,
> [r12] */
> +#define FDPIC_T2_LDR_R12_WITH_FUNCDESC 0xc008f8df    /* ldr.w r12,
> [pc, #8] */
> +#define FDPIC_T2_LDR_R9_WITH_GOT      0x9004f8dc     /* ldr.w r9,
> [r12, #4] */
> +#define FDPIC_T2_LDR_PC_WITH_RESTORER  0xf000f8dc    /* ldr.w pc,
> [r12] */
> +#define FDPIC_FUNCDESC_OFFSETÂ Â Â Â Â Â Â Â Â 12
> +
> +/* Signal frame offsets. */
> +#define ARM_NEW_RT_SIGFRAME_UCONTEXTÂ Â 0x80
> +#define ARM_UCONTEXT_SIGCONTEXTÂ Â Â Â Â Â Â Â Â Â Â Â Â Â Â 0x14
> +#define ARM_SIGCONTEXT_R0Â Â Â Â Â Â Â Â Â Â Â Â Â 0xc
> +#endif
> +
> Â /* We add a prototype for abort here to avoid creating a dependency on
>    target headers. */
> Â extern void abort (void);
> @@ -199,6 +219,45 @@ search_EIT_table (const __EIT_entry * table, int
> nrec, _uw return_address)
> Â Â Â Â }
> Â }
>
> +#if __FDPIC__
> +/* VFP is not restored, but this is sufficient to allow unwinding. */
> +static _Unwind_Reason_Code
> +__gnu_personality_sigframe_fdpic (_Unwind_State state,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â _Unwind_Control_Block *ucbp,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â _Unwind_Context *context)
> +{
> +Â Â Â unsigned int sp;
> +Â Â Â unsigned int pc;
> +Â Â Â unsigned int funcdesc;
> +Â Â Â unsigned int handler;
> +Â Â Â unsigned int first_handler_instruction;
> +Â Â Â int i;
> +
> +Â Â Â _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp);
> +Â Â Â _Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc);
> +
> +Â Â Â funcdesc = *(unsigned int *)((pc & ~1) + FDPIC_FUNCDESC_OFFSET);
> +Â Â Â handler = *(unsigned int *)(funcdesc);
> +Â Â Â first_handler_instruction = *(unsigned int *)(handler & ~1);
> +
> +Â Â Â /* Adjust SP to point to the start of registers according to
> +      signal type. */
> +Â Â Â if (first_handler_instruction == ARM_SET_R7_RT_SIGRETURN
> +Â Â Â Â Â Â || first_handler_instruction == THUMB2_SET_R7_RT_SIGRETURN)
> +Â Â Â Â Â Â sp += ARM_NEW_RT_SIGFRAME_UCONTEXT
> +Â Â Â Â Â Â Â Â + ARM_UCONTEXT_SIGCONTEXT
> +Â Â Â Â Â Â Â Â + ARM_SIGCONTEXT_R0;
> +Â Â Â else
> +Â Â Â Â Â Â sp += ARM_UCONTEXT_SIGCONTEXT
> +Â Â Â Â Â Â Â Â + ARM_SIGCONTEXT_R0;
> +   /* Restore regs saved on stack by the kernel. */
> +Â Â Â for (i = 0; i < 16; i++)
> +Â Â Â Â Â Â _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp +
> 4 * i);
> +
> +Â Â Â return _URC_CONTINUE_UNWIND;
> +}
> +#endif
> +
> Â /* Find the exception index table eintry for the given address.
> Â Â Â Fill in the relevant fields of the UCB.
>    Returns _URC_FAILURE if an error occurred, _URC_OK on success. */
> @@ -222,6 +281,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
> return_address)
> &nrec);
> Â Â Â Â Â Â if (!eitp)
> Â Â Â Â Â Â Â Â {
> +#if __FDPIC__
> +Â Â Â Â Â Â Â Â /* If we are unwinding a signal handler then perhaps we have
> +           reached a trampoline. Try to detect jump to restorer
> +           sequence. */
> +Â Â Â Â Â Â Â Â _uw *pc = (_uw *)((return_address+2) & ~1);
> +Â Â Â Â Â Â Â Â if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
> +Â Â Â Â Â Â Â Â Â Â Â Â Â && pc[1] == FDPIC_LDR_R9_WITH_GOT
> +Â Â Â Â Â Â Â Â Â Â Â Â Â && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
> +Â Â Â Â Â Â Â Â Â Â Â Â || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
> +Â Â Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â Â Â struct funcdesc_t *funcdesc
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = funcdesc->ptr;
> +Â Â Â Â Â Â Â Â Â Â Â Â UCB_PR_GOT (ucbp) = funcdesc->got;
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â return _URC_OK;
> +Â Â Â Â Â Â Â Â Â Â }
> +#endif
> Â Â Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = 0;
> Â Â Â Â Â Â Â Â Â Â return _URC_FAILURE;
> Â Â Â Â Â Â Â Â }
> @@ -236,6 +316,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
> return_address)
>
> Â Â if (!eitp)
> Â Â Â Â {
> +#if __FDPIC__
> +Â Â Â Â Â /* If we are unwinding a signal handler then perhaps we have
> +       reached a trampoline. Try to detect jump to restorer
> +       sequence. */
> +Â Â Â Â Â _uw *pc = (_uw *)((return_address+2) & ~1);
> +Â Â Â Â Â if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
> +Â Â Â Â Â Â Â Â Â && pc[1] == FDPIC_LDR_R9_WITH_GOT
> +Â Â Â Â Â Â Â Â Â && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
> +Â Â Â Â Â Â Â Â || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
> +Â Â Â Â Â Â Â Â Â Â Â Â && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
> +Â Â Â Â Â Â Â Â Â Â Â Â && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
> +Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â struct funcdesc_t *funcdesc
> +Â Â Â Â Â Â Â Â Â Â = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
> +
> +Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = funcdesc->ptr;
> +Â Â Â Â Â Â Â Â UCB_PR_GOT (ucbp) = funcdesc->got;
> +
> +Â Â Â Â Â Â Â Â return _URC_OK;
> +Â Â Â Â Â Â }
> +#endif
> Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = 0;
> Â Â Â Â Â Â return _URC_FAILURE;
> Â Â Â Â }
> @@ -244,6 +345,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw
> return_address)
>   /* Can this frame be unwound at all? */
> Â Â if (eitp->content == EXIDX_CANTUNWIND)
> Â Â Â Â {
> +#if __FDPIC__
> +Â Â Â Â Â /* If we are unwinding a signal handler then perhaps we have
> +       reached a trampoline. Try to detect jump to restorer
> +       sequence. */
> +Â Â Â Â Â _uw *pc = (_uw *)((return_address+2) & ~1);
> +Â Â Â Â Â if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
> +Â Â Â Â Â Â Â Â Â && pc[1] == FDPIC_LDR_R9_WITH_GOT
> +Â Â Â Â Â Â Â Â Â && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
> +Â Â Â Â Â Â Â Â || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
> +Â Â Â Â Â Â Â Â Â Â Â Â && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
> +Â Â Â Â Â Â Â Â Â Â Â Â && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
> +Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â struct funcdesc_t *funcdesc
> +Â Â Â Â Â Â Â Â Â Â = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
> +
> +Â Â Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = funcdesc->ptr;
> +Â Â Â Â Â Â Â Â UCB_PR_GOT (ucbp) = funcdesc->got;
> +
> +Â Â Â Â Â Â Â Â return _URC_OK;
> +Â Â Â Â Â Â }
> +#endif
> Â Â Â Â Â Â UCB_PR_ADDR (ucbp) = 0;
> Â Â Â Â Â Â return _URC_END_OF_STACK;
> Â Â Â Â }
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-09-03 8:40 ` Richard Sandiford
@ 2019-09-04 19:59 ` Christophe Lyon
2019-09-05 8:03 ` Richard Sandiford
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-04 19:59 UTC (permalink / raw)
To: Christophe Lyon, Christophe Lyon, gcc Patches, Richard Sandiford
[-- Attachment #1: Type: text/plain, Size: 11859 bytes --]
On Tue, 3 Sep 2019 at 10:40, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Christophe Lyon <christophe.lyon@linaro.org> writes:
> > @@ -3485,6 +3485,14 @@ arm_option_override (void)
> > if (flag_pic && TARGET_VXWORKS_RTP)
> > arm_pic_register = 9;
> >
> > + /* If in FDPIC mode then force arm_pic_register to be r9. */
> > + if (TARGET_FDPIC)
> > + {
> > + arm_pic_register = FDPIC_REGNUM;
> > + if (TARGET_THUMB1)
> > + sorry ("FDPIC mode is not supported in Thumb-1 mode.");
>
> Should be no "." at the end.
Done
>
> > + }
> > +
> > if (arm_pic_register_string != NULL)
> > {
> > int pic_register = decode_reg_name (arm_pic_register_string);
> > [...]
> > @@ -7295,6 +7303,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
> > if (cfun->machine->sibcall_blocked)
> > return false;
> >
> > + if (TARGET_FDPIC)
> > + {
> > + /* In FDPIC, never tailcall something for which we have no decl:
> > + the target function could be in a different module, requiring
> > + a different FDPIC register value. */
> > + if (decl == NULL)
> > + return false;
> > +
> > + /* Don't tailcall if we go through the PLT since the FDPIC
> > + register is then corrupted and we don't restore it after
> > + static function calls. */
> > + if (!targetm.binds_local_p (decl))
> > + return false;
> > + }
> > +
> > /* Never tailcall something if we are generating code for Thumb-1. */
> > if (TARGET_THUMB1)
> > return false;
>
> Is this still needed after you removed the optimisation to avoid
> restoring r9? (Not really a review comment, just curious.)
You are right: it's not needed anymore, I forgot to remove it.
>
> > [...]
> > @@ -7780,28 +7812,132 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
> > emit_use (pic_reg);
> > }
> >
> > +/* Try to determine whether an object, referenced via ORIG, will be
> > + placed in the text or data segment. This is used in FDPIC mode, to
> > + decide which relocations to use when accessing ORIG. *IS_READONLY
> > + is set to true if ORIG is a read-only location, false otherwise.
> > + Return true if we could determine the location of ORIG, false
> > + otherwise. *IS_READONLY is valid only when we return true. */
> > +static bool
> > +arm_is_segment_info_known (rtx orig, bool *is_readonly)
> > +{
> > + *is_readonly = false;
> > +
> > + if (GET_CODE (orig) == LABEL_REF)
> > + {
> > + *is_readonly = true;
> > + return true;
> > + }
> > +
> > + if (SYMBOL_REF_P (orig))
> > + {
> > + if (CONSTANT_POOL_ADDRESS_P (orig))
> > + {
> > + *is_readonly = true;
> > + return true;
> > + }
> > + else if (SYMBOL_REF_LOCAL_P (orig)
> > + && !SYMBOL_REF_EXTERNAL_P (orig)
> > + && SYMBOL_REF_DECL (orig)
> > + && (!DECL_P (SYMBOL_REF_DECL (orig))
> > + || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
>
> This can just be an "if".
>
Done
> > + {
> > + tree decl = SYMBOL_REF_DECL (orig);
> > + tree init = (TREE_CODE (decl) == VAR_DECL)
> > + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
> > + ? decl : 0;
> > + int reloc = 0;
> > + bool named_section, readonly;
> > +
> > + if (init && init != error_mark_node)
> > + reloc = compute_reloc_for_constant (init);
> > +
> > + named_section = TREE_CODE (decl) == VAR_DECL
> > + && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
> > + readonly = decl_readonly_section (decl, reloc);
> > +
> > + /* We don't know where the link script will put a named
> > + section, so return false in such a case. */
> > + if (named_section)
> > + return false;
> > +
> > + *is_readonly = readonly;
> > + return true;
> > + }
> > + else
> > + {
> > + /* We don't know. */
> > + return false;
> > + }
> > + }
> > + else
> > + gcc_unreachable ();
> > +
> > + return false;
>
> Then this can end with:
>
> /* We don't know. */
> return false;
> }
>
> gcc_unreachable ();
> }
>
OK
> > +}
> > +
> > /* Generate code to load the address of a static var when flag_pic is set. */
> > static rtx_insn *
> > arm_pic_static_addr (rtx orig, rtx reg)
> > {
> > rtx l1, labelno, offset_rtx;
> > + rtx_insn *insn;
> >
> > gcc_assert (flag_pic);
> >
> > - /* We use an UNSPEC rather than a LABEL_REF because this label
> > - never appears in the code stream. */
> > - labelno = GEN_INT (pic_labelno++);
> > - l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
> > - l1 = gen_rtx_CONST (VOIDmode, l1);
> > + bool is_readonly = false;
> > + bool info_known = false;
> > +
> > + if (TARGET_FDPIC
> > + && SYMBOL_REF_P (orig)
> > + && !SYMBOL_REF_FUNCTION_P (orig))
> > + info_known = arm_is_segment_info_known (orig, &is_readonly);
> > +
> > + if (TARGET_FDPIC
> > + && SYMBOL_REF_P (orig)
> > + && !SYMBOL_REF_FUNCTION_P (orig)
> > + && !info_known)
> > + {
> > + /* We don't know where orig is stored, so we have be
> > + pessimistic and use a GOT relocation. */
> > + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> > +
> > + insn = calculate_pic_address_constant (reg, pic_reg, orig);
> > + }
> > + else if (TARGET_FDPIC
> > + && SYMBOL_REF_P (orig)
> > + && (SYMBOL_REF_FUNCTION_P (orig)
> > + || (info_known && !is_readonly)))
>
> The info_known check is redundant here. I think it's actually clearer
> without, since it's then more obvious that the final "else" is handling:
>
> !SYMBOL_REF_FUNCTION_P (orig) && is_readonly
>
> (Initially I misread the condition and was wondering why it was safe to
> drop to the "else" when "!info_known". But it doesn't do that of course.)
>
OK, done
> > + {
> > + /* We use the GOTOFF relocation. */
> > + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> > +
> > + rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
> > + emit_insn (gen_movsi (reg, l1));
> > + insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
> > + }
> > + else
> > + {
> > + /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
> > + PC-relative access. */
> > + /* We use an UNSPEC rather than a LABEL_REF because this label
> > + never appears in the code stream. */
> > + labelno = GEN_INT (pic_labelno++);
> > + l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
> > + l1 = gen_rtx_CONST (VOIDmode, l1);
> > +
> > + /* On the ARM the PC register contains 'dot + 8' at the time of the
> > + addition, on the Thumb it is 'dot + 4'. */
> > + offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
> > + offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
> > + UNSPEC_SYMBOL_OFFSET);
> > + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
> >
> > - /* On the ARM the PC register contains 'dot + 8' at the time of the
> > - addition, on the Thumb it is 'dot + 4'. */
> > - offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
> > - offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
> > - UNSPEC_SYMBOL_OFFSET);
> > - offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
> > + insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
> > + labelno));
> > + }
> >
> > - return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
> > + return insn;
> > }
> >
> > /* Return nonzero if X is valid as an ARM state addressing register. */
> > @@ -8510,7 +8646,7 @@ load_tls_operand (rtx x, rtx reg)
> > static rtx_insn *
> > arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
> > {
> > - rtx label, labelno, sum;
> > + rtx label, labelno = NULL_RTX, sum;
> >
> > gcc_assert (reloc != TLS_DESCSEQ);
> > start_sequence ();
>
> Looks like this might be a stray change (not mentioned in the changelog).
Right, it belongs to patch 10/21 "Implement TLS support".
The initialization avoids a warning about possibly non-initialized variable.
>
> > [...]
> > @@ -23069,9 +23234,37 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
> > && (!SYMBOL_REF_LOCAL_P (x)
> > || (SYMBOL_REF_DECL (x)
> > ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
> > - fputs ("(GOT)", asm_out_file);
> > + {
> > + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> > + fputs ("(GOTFUNCDESC)", asm_out_file);
> > + else
> > + fputs ("(GOT)", asm_out_file);
> > + }
> > else
> > - fputs ("(GOTOFF)", asm_out_file);
> > + {
> > + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
> > + fputs ("(GOTOFFFUNCDESC)", asm_out_file);
> > + else
> > + {
> > + bool is_readonly;
> > +
> > + if (arm_is_segment_info_known (x, &is_readonly))
> > + fputs ("(GOTOFF)", asm_out_file);
> > + else
> > + fputs ("(GOT)", asm_out_file);
> > + }
>
> It looks like this changes behaviour for non-FDPIC. Is that intentional?
> Or should it be:
>
> if (!TARGET_FDPIC
> || arm_is_segment_info_known (x, &is_readonly))
>
> ?
You are right, it was not intentional.
Unfortunately, it does not introduce a regression on
arm-none-linux-gnueabi[hf] with the GCC testsuite.
Fixed.
>
> > + }
> > + }
> > +
> > + /* For FDPIC we also have to mark symbol for .data section. */
> > + if (TARGET_FDPIC
> > + && NEED_GOT_RELOC
> > + && flag_pic
> > + && !making_const_table
> > + && SYMBOL_REF_P (x))
> > + {
> > + if (SYMBOL_REF_FUNCTION_P (x))
> > + fputs ("(FUNCDESC)", asm_out_file);
> > }
> > fputc ('\n', asm_out_file);
> > return true;
>
> Given:
>
> > > Can NEED_GOT_RELOC or flag_pic be false for TARGET_FDPIC?
> > No.
> >
> > > Is !flag_pic TARGET_FDPIC supported?
> > No; flag_pic is false when we use -mno-fdpic, so we revert to the "usual" abi then
>
> the flag_pic and NEED_GOT_RELOC checks look redundant.
>
> Might as well put the SYMBOL_REF_FUNCTION_P (x) in the main "if"
> statement rather than split it out.
>
OK
> > [...]
> > @@ -8151,10 +8156,33 @@
> > pat = gen_call_internal (operands[0], operands[1], operands[2]);
> > arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
> > }
> > +
> > + /* Restore FDPIC register (r9) after call. */
> > + if (TARGET_FDPIC)
> > + {
> > + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> > + rtx initial_fdpic_reg =
> > + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
>
> Formatting nit: "=" should be on the next line.
OK
>
> > +
> > + emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
> > + initial_fdpic_reg));
> > + }
> > +
> > DONE;
> > }"
> > )
> >
> > [...]
> > @@ -8240,6 +8273,18 @@
> > operands[2], operands[3]);
> > arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
> > }
> > +
> > + /* Restore FDPIC register (r9) after call. */
> > + if (TARGET_FDPIC)
> > + {
> > + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
> > + rtx initial_fdpic_reg =
> > + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
>
> Same here.
OK
>
> Looks good otherwise, thanks.
>
Here is an updated version, thanks!
> Richard
[-- Attachment #2: 0004-ARM-FDPIC-Add-support-for-FDPIC-for-arm-architecture.patch --]
[-- Type: text/x-patch, Size: 19039 bytes --]
commit d257f25ea571139c80a93124ff91894921d46fa0
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu Feb 8 11:10:51 2018 +0100
[ARM] FDPIC: Add support for FDPIC for arm architecture
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.
When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
FDPIC_REGNUM.
(arm_function_ok_for_sibcall): Disable sibcall optimization if we
have no decl or go through PLT.
(calculate_pic_address_constant): New function.
(legitimize_pic_address): Call calculate_pic_address_constant.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_emit_call_insn): Add support for FDPIC.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
Define. (FDPIC_REGNUM): New define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.
gcc/testsuite/
* gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.
Change-Id: I1e96d260074ab7b75d36cdff5d34ad898f35c66f
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 6e256ee..34695fa 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
builtin_define ("__ARM_EABI__");
}
+ def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+
def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 485bc68..272968a 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void);
extern int arm_const_double_inline_cost (rtx);
extern bool arm_const_double_by_parts (rtx);
extern bool arm_const_double_by_immediates (rtx);
+extern rtx arm_load_function_descriptor (rtx funcdesc);
extern void arm_emit_call_insn (rtx, rtx, bool);
bool detect_cmse_nonsecure_call (tree);
extern const char *output_call (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 45abcd8..541b139 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3485,6 +3485,14 @@ arm_option_override (void)
if (flag_pic && TARGET_VXWORKS_RTP)
arm_pic_register = 9;
+ /* If in FDPIC mode then force arm_pic_register to be r9. */
+ if (TARGET_FDPIC)
+ {
+ arm_pic_register = FDPIC_REGNUM;
+ if (TARGET_THUMB1)
+ sorry ("FDPIC mode is not supported in Thumb-1 mode");
+ }
+
if (arm_pic_register_string != NULL)
{
int pic_register = decode_reg_name (arm_pic_register_string);
@@ -7295,6 +7303,15 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
if (cfun->machine->sibcall_blocked)
return false;
+ if (TARGET_FDPIC)
+ {
+ /* In FDPIC, never tailcall something for which we have no decl:
+ the target function could be in a different module, requiring
+ a different FDPIC register value. */
+ if (decl == NULL)
+ return false;
+ }
+
/* Never tailcall something if we are generating code for Thumb-1. */
if (TARGET_THUMB1)
return false;
@@ -7501,6 +7518,24 @@ require_pic_register (rtx pic_reg, bool compute_now)
}
}
+/* Generate insns to calculate the address of ORIG in pic mode. */
+static rtx_insn *
+calculate_pic_address_constant (rtx reg, rtx pic_reg, rtx orig)
+{
+ rtx pat;
+ rtx mem;
+
+ pat = gen_calculate_pic_address (reg, pic_reg, orig);
+
+ /* Make the MEM as close to a constant as possible. */
+ mem = SET_SRC (pat);
+ gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
+ MEM_READONLY_P (mem) = 1;
+ MEM_NOTRAP_P (mem) = 1;
+
+ return emit_insn (pat);
+}
+
/* Legitimize PIC load to ORIG into REG. If REG is NULL, a new pseudo is
created to hold the result of the load. If not NULL, PIC_REG indicates
which register to use as PIC register, otherwise it is decided by register
@@ -7545,24 +7580,13 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg,
insn = arm_pic_static_addr (orig, reg);
else
{
- rtx pat;
- rtx mem;
-
/* If this function doesn't have a pic register, create one now. */
require_pic_register (pic_reg, compute_now);
if (pic_reg == NULL_RTX)
pic_reg = cfun->machine->pic_reg;
- pat = gen_calculate_pic_address (reg, pic_reg, orig);
-
- /* Make the MEM as close to a constant as possible. */
- mem = SET_SRC (pat);
- gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
- MEM_READONLY_P (mem) = 1;
- MEM_NOTRAP_P (mem) = 1;
-
- insn = emit_insn (pat);
+ insn = calculate_pic_address_constant (reg, pic_reg, orig);
}
/* Put a REG_EQUAL note on this insn, so that it can be optimized
@@ -7711,7 +7735,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
{
rtx l1, labelno, pic_tmp, pic_rtx;
- if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
+ if (crtl->uses_pic_offset_table == 0
+ || TARGET_SINGLE_PIC_BASE
+ || TARGET_FDPIC)
return;
gcc_assert (flag_pic);
@@ -7780,28 +7806,128 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg)
emit_use (pic_reg);
}
+/* Try to determine whether an object, referenced via ORIG, will be
+ placed in the text or data segment. This is used in FDPIC mode, to
+ decide which relocations to use when accessing ORIG. *IS_READONLY
+ is set to true if ORIG is a read-only location, false otherwise.
+ Return true if we could determine the location of ORIG, false
+ otherwise. *IS_READONLY is valid only when we return true. */
+static bool
+arm_is_segment_info_known (rtx orig, bool *is_readonly)
+{
+ *is_readonly = false;
+
+ if (GET_CODE (orig) == LABEL_REF)
+ {
+ *is_readonly = true;
+ return true;
+ }
+
+ if (SYMBOL_REF_P (orig))
+ {
+ if (CONSTANT_POOL_ADDRESS_P (orig))
+ {
+ *is_readonly = true;
+ return true;
+ }
+ if (SYMBOL_REF_LOCAL_P (orig)
+ && !SYMBOL_REF_EXTERNAL_P (orig)
+ && SYMBOL_REF_DECL (orig)
+ && (!DECL_P (SYMBOL_REF_DECL (orig))
+ || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
+ {
+ tree decl = SYMBOL_REF_DECL (orig);
+ tree init = (TREE_CODE (decl) == VAR_DECL)
+ ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
+ ? decl : 0;
+ int reloc = 0;
+ bool named_section, readonly;
+
+ if (init && init != error_mark_node)
+ reloc = compute_reloc_for_constant (init);
+
+ named_section = TREE_CODE (decl) == VAR_DECL
+ && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
+ readonly = decl_readonly_section (decl, reloc);
+
+ /* We don't know where the link script will put a named
+ section, so return false in such a case. */
+ if (named_section)
+ return false;
+
+ *is_readonly = readonly;
+ return true;
+ }
+ else
+ /* We don't know. */
+ return false;
+ }
+
+ gcc_unreachable ();
+}
+
/* Generate code to load the address of a static var when flag_pic is set. */
static rtx_insn *
arm_pic_static_addr (rtx orig, rtx reg)
{
rtx l1, labelno, offset_rtx;
+ rtx_insn *insn;
gcc_assert (flag_pic);
- /* We use an UNSPEC rather than a LABEL_REF because this label
- never appears in the code stream. */
- labelno = GEN_INT (pic_labelno++);
- l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- l1 = gen_rtx_CONST (VOIDmode, l1);
+ bool is_readonly = false;
+ bool info_known = false;
- /* On the ARM the PC register contains 'dot + 8' at the time of the
- addition, on the Thumb it is 'dot + 4'. */
- offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
- offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
- UNSPEC_SYMBOL_OFFSET);
- offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig))
+ info_known = arm_is_segment_info_known (orig, &is_readonly);
- return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
+ if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && !SYMBOL_REF_FUNCTION_P (orig)
+ && !info_known)
+ {
+ /* We don't know where orig is stored, so we have be
+ pessimistic and use a GOT relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ insn = calculate_pic_address_constant (reg, pic_reg, orig);
+ }
+ else if (TARGET_FDPIC
+ && SYMBOL_REF_P (orig)
+ && (SYMBOL_REF_FUNCTION_P (orig)
+ || !is_readonly))
+ {
+ /* We use the GOTOFF relocation. */
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+
+ rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM);
+ emit_insn (gen_movsi (reg, l1));
+ insn = emit_insn (gen_addsi3 (reg, reg, pic_reg));
+ }
+ else
+ {
+ /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use
+ PC-relative access. */
+ /* We use an UNSPEC rather than a LABEL_REF because this label
+ never appears in the code stream. */
+ labelno = GEN_INT (pic_labelno++);
+ l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ l1 = gen_rtx_CONST (VOIDmode, l1);
+
+ /* On the ARM the PC register contains 'dot + 8' at the time of the
+ addition, on the Thumb it is 'dot + 4'. */
+ offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
+ offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
+ UNSPEC_SYMBOL_OFFSET);
+ offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
+
+ insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx,
+ labelno));
+ }
+
+ return insn;
}
/* Return nonzero if X is valid as an ARM state addressing register. */
@@ -16112,9 +16238,32 @@ get_jump_table_size (rtx_jump_table_data *insn)
return 0;
}
+/* Emit insns to load the function address from FUNCDESC (an FDPIC
+ function descriptor) into a register and the GOT address into the
+ FDPIC register, returning an rtx for the register holding the
+ function address. */
+
+rtx
+arm_load_function_descriptor (rtx funcdesc)
+{
+ rtx fnaddr_reg = gen_reg_rtx (Pmode);
+ rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+ rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+
+ emit_move_insn (fnaddr_reg, fnaddr);
+
+ /* The ABI requires the entry point address to be loaded first, but
+ since we cannot support lazy binding for lack of atomic load of
+ two 32-bits values, we do not need to bother to prevent the
+ previous load from being moved after that of the GOT address. */
+ emit_insn (gen_restore_pic_register_after_call (pic_reg, gotaddr));
+
+ return fnaddr_reg;
+}
+
/* Return the maximum amount of padding that will be inserted before
label LABEL. */
-
static HOST_WIDE_INT
get_label_padding (rtx label)
{
@@ -18249,6 +18398,12 @@ arm_emit_call_insn (rtx pat, rtx addr, bool sibcall)
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), cfun->machine->pic_reg);
}
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), fdpic_reg);
+ }
+
if (TARGET_AAPCS_BASED)
{
/* For AAPCS, IP and CC can be clobbered by veneers inserted by the
@@ -23069,10 +23224,36 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
&& (!SYMBOL_REF_LOCAL_P (x)
|| (SYMBOL_REF_DECL (x)
? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0))))
- fputs ("(GOT)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTFUNCDESC)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
else
- fputs ("(GOTOFF)", asm_out_file);
+ {
+ if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(GOTOFFFUNCDESC)", asm_out_file);
+ else
+ {
+ bool is_readonly;
+
+ if (!TARGET_FDPIC
+ || arm_is_segment_info_known (x, &is_readonly))
+ fputs ("(GOTOFF)", asm_out_file);
+ else
+ fputs ("(GOT)", asm_out_file);
+ }
+ }
}
+
+ /* For FDPIC we also have to mark symbol for .data section. */
+ if (TARGET_FDPIC
+ && !making_const_table
+ && SYMBOL_REF_P (x)
+ && SYMBOL_REF_FUNCTION_P (x))
+ fputs ("(FUNCDESC)", asm_out_file);
+
fputc ('\n', asm_out_file);
return true;
}
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 4866e1e..7b50ef5 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -892,6 +892,9 @@ extern int arm_arch_cmse;
Pascal), so the following is not true. */
#define STATIC_CHAIN_REGNUM 12
+/* r9 is the FDPIC register (base register for GOT and FUNCDESC accesses). */
+#define FDPIC_REGNUM 9
+
/* Define this to be where the real frame pointer is if it is not possible to
work out the offset between the frame pointer and the automatic variables
until after register allocation has taken place. FRAME_POINTER_REGNUM
@@ -1948,6 +1951,10 @@ extern unsigned arm_pic_register;
data addresses in memory. */
#define PIC_OFFSET_TABLE_REGNUM arm_pic_register
+/* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT
+ entries would need to handle saving and restoring it). */
+#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC
+
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. One exception is
UNSPEC_TLS, which is always PIC. */
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 0aecd03..6d26e9e 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8140,6 +8140,11 @@
: !REG_P (callee))
XEXP (operands[0], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[0], 0)
+ = arm_load_function_descriptor (XEXP (operands[0], 0));
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_internal (operands[0], operands[1],
@@ -8151,10 +8156,33 @@
pat = gen_call_internal (operands[0], operands[1], operands[2]);
arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg
+ = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ initial_fdpic_reg));
+ }
+
DONE;
}"
)
+(define_insn "restore_pic_register_after_call"
+ [(set (match_operand:SI 0 "s_register_operand" "+r,r")
+ (unspec:SI [(match_dup 0)
+ (match_operand:SI 1 "nonimmediate_operand" "r,m")]
+ UNSPEC_PIC_RESTORE))]
+ ""
+ "@
+ mov\t%0, %1
+ ldr\t%0, %1"
+)
+
(define_expand "call_internal"
[(parallel [(call (match_operand 0 "memory_operand" "")
(match_operand 1 "general_operand" ""))
@@ -8228,6 +8256,11 @@
: !REG_P (callee))
XEXP (operands[1], 0) = force_reg (Pmode, callee);
+ if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[1], 0)))
+ /* Indirect call: set r9 with FDPIC value of callee. */
+ XEXP (operands[1], 0)
+ = arm_load_function_descriptor (XEXP (operands[1], 0));
+
if (detect_cmse_nonsecure_call (addr))
{
pat = gen_nonsecure_call_value_internal (operands[0], operands[1],
@@ -8240,6 +8273,18 @@
operands[2], operands[3]);
arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
}
+
+ /* Restore FDPIC register (r9) after call. */
+ if (TARGET_FDPIC)
+ {
+ rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
+ rtx initial_fdpic_reg
+ = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);
+
+ emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
+ initial_fdpic_reg));
+ }
+
DONE;
}"
)
@@ -8582,7 +8627,7 @@
(const_int 0))
(match_operand 1 "" "")
(match_operand 2 "" "")])]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
@@ -8649,7 +8694,7 @@
(define_expand "untyped_return"
[(match_operand:BLK 0 "memory_operand" "")
(match_operand 1 "" "")]
- "TARGET_EITHER"
+ "TARGET_EITHER && !TARGET_FDPIC"
"
{
int i;
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 174bcc5..bda35d5 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -89,6 +89,7 @@
UNSPEC_SP_SET ; Represent the setting of stack protector's canary
UNSPEC_SP_TEST ; Represent the testing of stack protector's canary
; against the guard.
+ UNSPEC_PIC_RESTORE ; Use to restore fdpic register
])
(define_c_enum "unspec" [
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
index 4753e36..51a76fc 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -17,5 +17,5 @@ F (__fp16 a, __fp16 b, __fp16 c)
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
-/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
index 41c7ab7..ae65fb8 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
@@ -16,5 +16,5 @@ F (__fp16 a, __fp16 b, __fp16 c)
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
-/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support.
2019-09-04 14:16 ` Kyrill Tkachov
@ 2019-09-04 20:03 ` Christophe Lyon
2019-09-09 8:54 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-04 20:03 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 8712 bytes --]
On Wed, 4 Sep 2019 at 16:16, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
>
> Hi Christophe,
>
> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
> > TLS_IE32_FDPIC.
> >
> > We do not support the GNU2 TLS dialect.
> >
> > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > Mickaël Guêné <mickael.guene@st.com>
> >
> > gcc/
> > * config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
> > TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
> > (arm_call_tls_get_addr): Add FDPIC support.
> > (legitimize_tls_address): Likewise.
> > (arm_emit_tls_decoration): Likewise.
> >
> > Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a
> >
> > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> > index 99d13bf..5fc7a20 100644
> > --- a/gcc/config/arm/arm.c
> > +++ b/gcc/config/arm/arm.c
> > @@ -2379,9 +2379,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
> >
> > enum tls_reloc {
> > TLS_GD32,
> > + TLS_GD32_FDPIC,
> > TLS_LDM32,
> > + TLS_LDM32_FDPIC,
> > TLS_LDO32,
> > TLS_IE32,
> > + TLS_IE32_FDPIC,
> > TLS_LE32,
> > TLS_DESCSEQ /* GNU scheme */
> > };
> > @@ -8760,20 +8763,34 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx
> > *valuep, int reloc)
> > gcc_assert (reloc != TLS_DESCSEQ);
> > start_sequence ();
> >
> > - labelno = GEN_INT (pic_labelno++);
> > - label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > UNSPEC_PIC_LABEL);
> > - label = gen_rtx_CONST (VOIDmode, label);
> > + if (TARGET_FDPIC)
> > + {
> > + sum = gen_rtx_UNSPEC (Pmode,
> > + gen_rtvec (2, x, GEN_INT (reloc)),
> > + UNSPEC_TLS);
> > + }
> > + else
> > + {
> > + labelno = GEN_INT (pic_labelno++);
> > + label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > UNSPEC_PIC_LABEL);
> > + label = gen_rtx_CONST (VOIDmode, label);
> >
> > - sum = gen_rtx_UNSPEC (Pmode,
> > - gen_rtvec (4, x, GEN_INT (reloc), label,
> > - GEN_INT (TARGET_ARM ? 8 : 4)),
> > - UNSPEC_TLS);
> > + sum = gen_rtx_UNSPEC (Pmode,
> > + gen_rtvec (4, x, GEN_INT (reloc), label,
> > + GEN_INT (TARGET_ARM ? 8 : 4)),
> > + UNSPEC_TLS);
> > + }
> > reg = load_tls_operand (sum, reg);
> >
> > - if (TARGET_ARM)
> > - emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
> > + if (TARGET_FDPIC)
> > + {
> > + emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode,
> > FDPIC_REGNUM)));
> > + }
>
> No {} around single statement.
>
> > else
> > - emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > + if (TARGET_ARM)
> > + emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
>
>
> Merge that "if" with the "else" in an "else if"
>
> > + else
> > + emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> >
> > *valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX,
> > LCT_PURE, /* LCT_CONST? */
> > @@ -8808,6 +8825,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
> > return reg;
> > }
> >
> > +
> > rtx
> > legitimize_tls_address (rtx x, rtx reg)
> > {
> > @@ -8820,6 +8838,9 @@ legitimize_tls_address (rtx x, rtx reg)
> > case TLS_MODEL_GLOBAL_DYNAMIC:
> > if (TARGET_GNU2_TLS)
> > {
> > + if (TARGET_FDPIC)
> > + gcc_unreachable();
> > +
>
> Use gcc_assert (TARGET_FDPIC)
>
>
> > reg = arm_tls_descseq_addr (x, reg);
> >
> > tp = arm_load_tp (NULL_RTX);
> > @@ -8829,7 +8850,10 @@ legitimize_tls_address (rtx x, rtx reg)
> > else
> > {
> > /* Original scheme */
> > - insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
> > + if (TARGET_FDPIC)
> > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
> > + else
> > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
> > dest = gen_reg_rtx (Pmode);
> > emit_libcall_block (insns, dest, ret, x);
> > }
> > @@ -8838,6 +8862,9 @@ legitimize_tls_address (rtx x, rtx reg)
> > case TLS_MODEL_LOCAL_DYNAMIC:
> > if (TARGET_GNU2_TLS)
> > {
> > + if (TARGET_FDPIC)
> > + gcc_unreachable();
> > +
>
> Likewise.
>
> Ok with those changes.
Thanks, here is the updated version, with the initialization of labelno in
call_tls_get_addr moved from patch 4/21.
>
> Thanks,
>
> Kyrill
>
>
> > reg = arm_tls_descseq_addr (x, reg);
> >
> > tp = arm_load_tp (NULL_RTX);
> > @@ -8846,7 +8873,10 @@ legitimize_tls_address (rtx x, rtx reg)
> > }
> > else
> > {
> > - insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
> > + if (TARGET_FDPIC)
> > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
> > + else
> > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
> >
> > /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
> > share the LDM result with other LD model accesses. */
> > @@ -8865,23 +8895,35 @@ legitimize_tls_address (rtx x, rtx reg)
> > return dest;
> >
> > case TLS_MODEL_INITIAL_EXEC:
> > - labelno = GEN_INT (pic_labelno++);
> > - label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > UNSPEC_PIC_LABEL);
> > - label = gen_rtx_CONST (VOIDmode, label);
> > - sum = gen_rtx_UNSPEC (Pmode,
> > - gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
> > - GEN_INT (TARGET_ARM ? 8 : 4)),
> > - UNSPEC_TLS);
> > - reg = load_tls_operand (sum, reg);
> > -
> > - if (TARGET_ARM)
> > - emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
> > - else if (TARGET_THUMB2)
> > - emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
> > + if (TARGET_FDPIC)
> > + {
> > + sum = gen_rtx_UNSPEC (Pmode,
> > + gen_rtvec (2, x, GEN_INT
> > (TLS_IE32_FDPIC)),
> > + UNSPEC_TLS);
> > + reg = load_tls_operand (sum, reg);
> > + emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode,
> > FDPIC_REGNUM)));
> > + emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
> > + }
> > else
> > {
> > - emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > - emit_move_insn (reg, gen_const_mem (SImode, reg));
> > + labelno = GEN_INT (pic_labelno++);
> > + label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > UNSPEC_PIC_LABEL);
> > + label = gen_rtx_CONST (VOIDmode, label);
> > + sum = gen_rtx_UNSPEC (Pmode,
> > + gen_rtvec (4, x, GEN_INT (TLS_IE32),
> > label,
> > + GEN_INT (TARGET_ARM ? 8 : 4)),
> > + UNSPEC_TLS);
> > + reg = load_tls_operand (sum, reg);
> > +
> > + if (TARGET_ARM)
> > + emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
> > + else if (TARGET_THUMB2)
> > + emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg,
> > labelno));
> > + else
> > + {
> > + emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > + emit_move_insn (reg, gen_const_mem (SImode, reg));
> > + }
> > }
> >
> > tp = arm_load_tp (NULL_RTX);
> > @@ -28218,15 +28260,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x)
> > case TLS_GD32:
> > fputs ("(tlsgd)", fp);
> > break;
> > + case TLS_GD32_FDPIC:
> > + fputs ("(tlsgd_fdpic)", fp);
> > + break;
> > case TLS_LDM32:
> > fputs ("(tlsldm)", fp);
> > break;
> > + case TLS_LDM32_FDPIC:
> > + fputs ("(tlsldm_fdpic)", fp);
> > + break;
> > case TLS_LDO32:
> > fputs ("(tlsldo)", fp);
> > break;
> > case TLS_IE32:
> > fputs ("(gottpoff)", fp);
> > break;
> > + case TLS_IE32_FDPIC:
> > + fputs ("(gottpoff_fdpic)", fp);
> > + break;
> > case TLS_LE32:
> > fputs ("(tpoff)", fp);
> > break;
> > --
> > 2.6.3
> >
[-- Attachment #2: 10-ARM-FDPIC-Implement-TLS-support.patch --]
[-- Type: text/x-patch, Size: 6406 bytes --]
commit 481d4161a6cdf88091cd2fef7ee7fe6b8a836d18
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu Feb 8 14:42:05 2018 +0100
[ARM] FDPIC: Implement TLS support.
Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.
We do not support the GNU2 TLS dialect.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
(arm_call_tls_get_addr): Add FDPIC support.
(legitimize_tls_address): Likewise.
(arm_emit_tls_decoration): Likewise.
Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8930ff2..724edea 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2379,9 +2379,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
enum tls_reloc {
TLS_GD32,
+ TLS_GD32_FDPIC,
TLS_LDM32,
+ TLS_LDM32_FDPIC,
TLS_LDO32,
TLS_IE32,
+ TLS_IE32_FDPIC,
TLS_LE32,
TLS_DESCSEQ /* GNU scheme */
};
@@ -8742,22 +8745,33 @@ load_tls_operand (rtx x, rtx reg)
static rtx_insn *
arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
{
- rtx label, labelno, sum;
+ rtx label, labelno = NULL_RTX, sum;
gcc_assert (reloc != TLS_DESCSEQ);
start_sequence ();
- labelno = GEN_INT (pic_labelno++);
- label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- label = gen_rtx_CONST (VOIDmode, label);
+ if (TARGET_FDPIC)
+ {
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (reloc)),
+ UNSPEC_TLS);
+ }
+ else
+ {
+ labelno = GEN_INT (pic_labelno++);
+ label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ label = gen_rtx_CONST (VOIDmode, label);
- sum = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (4, x, GEN_INT (reloc), label,
- GEN_INT (TARGET_ARM ? 8 : 4)),
- UNSPEC_TLS);
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (4, x, GEN_INT (reloc), label,
+ GEN_INT (TARGET_ARM ? 8 : 4)),
+ UNSPEC_TLS);
+ }
reg = load_tls_operand (sum, reg);
- if (TARGET_ARM)
+ if (TARGET_FDPIC)
+ emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+ else if (TARGET_ARM)
emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
else
emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
@@ -8795,6 +8809,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
return reg;
}
+
rtx
legitimize_tls_address (rtx x, rtx reg)
{
@@ -8807,6 +8822,8 @@ legitimize_tls_address (rtx x, rtx reg)
case TLS_MODEL_GLOBAL_DYNAMIC:
if (TARGET_GNU2_TLS)
{
+ gcc_assert (TARGET_FDPIC);
+
reg = arm_tls_descseq_addr (x, reg);
tp = arm_load_tp (NULL_RTX);
@@ -8816,7 +8833,10 @@ legitimize_tls_address (rtx x, rtx reg)
else
{
/* Original scheme */
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
+ if (TARGET_FDPIC)
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
+ else
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
dest = gen_reg_rtx (Pmode);
emit_libcall_block (insns, dest, ret, x);
}
@@ -8825,6 +8845,8 @@ legitimize_tls_address (rtx x, rtx reg)
case TLS_MODEL_LOCAL_DYNAMIC:
if (TARGET_GNU2_TLS)
{
+ gcc_assert (TARGET_FDPIC);
+
reg = arm_tls_descseq_addr (x, reg);
tp = arm_load_tp (NULL_RTX);
@@ -8833,7 +8855,10 @@ legitimize_tls_address (rtx x, rtx reg)
}
else
{
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
+ if (TARGET_FDPIC)
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
+ else
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
share the LDM result with other LD model accesses. */
@@ -8852,23 +8877,35 @@ legitimize_tls_address (rtx x, rtx reg)
return dest;
case TLS_MODEL_INITIAL_EXEC:
- labelno = GEN_INT (pic_labelno++);
- label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- label = gen_rtx_CONST (VOIDmode, label);
- sum = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
- GEN_INT (TARGET_ARM ? 8 : 4)),
- UNSPEC_TLS);
- reg = load_tls_operand (sum, reg);
-
- if (TARGET_ARM)
- emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
- else if (TARGET_THUMB2)
- emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
+ if (TARGET_FDPIC)
+ {
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (TLS_IE32_FDPIC)),
+ UNSPEC_TLS);
+ reg = load_tls_operand (sum, reg);
+ emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+ emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
+ }
else
{
- emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
- emit_move_insn (reg, gen_const_mem (SImode, reg));
+ labelno = GEN_INT (pic_labelno++);
+ label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ label = gen_rtx_CONST (VOIDmode, label);
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
+ GEN_INT (TARGET_ARM ? 8 : 4)),
+ UNSPEC_TLS);
+ reg = load_tls_operand (sum, reg);
+
+ if (TARGET_ARM)
+ emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
+ else if (TARGET_THUMB2)
+ emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
+ else
+ {
+ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+ emit_move_insn (reg, gen_const_mem (SImode, reg));
+ }
}
tp = arm_load_tp (NULL_RTX);
@@ -28205,15 +28242,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x)
case TLS_GD32:
fputs ("(tlsgd)", fp);
break;
+ case TLS_GD32_FDPIC:
+ fputs ("(tlsgd_fdpic)", fp);
+ break;
case TLS_LDM32:
fputs ("(tlsldm)", fp);
break;
+ case TLS_LDM32_FDPIC:
+ fputs ("(tlsldm_fdpic)", fp);
+ break;
case TLS_LDO32:
fputs ("(tlsldo)", fp);
break;
case TLS_IE32:
fputs ("(gottpoff)", fp);
break;
+ case TLS_IE32_FDPIC:
+ fputs ("(gottpoff_fdpic)", fp);
+ break;
case TLS_LE32:
fputs ("(tpoff)", fp);
break;
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture
2019-09-04 19:59 ` Christophe Lyon
@ 2019-09-05 8:03 ` Richard Sandiford
0 siblings, 0 replies; 109+ messages in thread
From: Richard Sandiford @ 2019-09-05 8:03 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc Patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> + if (SYMBOL_REF_P (orig))
> + {
> + if (CONSTANT_POOL_ADDRESS_P (orig))
> + {
> + *is_readonly = true;
> + return true;
> + }
> + if (SYMBOL_REF_LOCAL_P (orig)
> + && !SYMBOL_REF_EXTERNAL_P (orig)
> + && SYMBOL_REF_DECL (orig)
> + && (!DECL_P (SYMBOL_REF_DECL (orig))
> + || !DECL_COMMON (SYMBOL_REF_DECL (orig))))
> + {
> + tree decl = SYMBOL_REF_DECL (orig);
> + tree init = (TREE_CODE (decl) == VAR_DECL)
> + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR)
> + ? decl : 0;
> + int reloc = 0;
> + bool named_section, readonly;
> +
> + if (init && init != error_mark_node)
> + reloc = compute_reloc_for_constant (init);
> +
> + named_section = TREE_CODE (decl) == VAR_DECL
> + && lookup_attribute ("section", DECL_ATTRIBUTES (decl));
> + readonly = decl_readonly_section (decl, reloc);
> +
> + /* We don't know where the link script will put a named
> + section, so return false in such a case. */
> + if (named_section)
> + return false;
> +
> + *is_readonly = readonly;
> + return true;
> + }
> + else
> + /* We don't know. */
> + return false;
Nit: no need for the "else".
OK with that changes, thanks.
Richard
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-08-29 15:37 ` Kyrill Tkachov
@ 2019-09-05 8:30 ` Christophe Lyon
2019-09-05 8:32 ` Christophe Lyon
2019-09-05 9:03 ` Kyrill Tkachov
0 siblings, 2 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-09-05 8:30 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 1696 bytes --]
On Thu, 29 Aug 2019 at 17:32, Kyrill Tkachov
<kyrylo.tkachov@foss.arm.com> wrote:
>
> Hi Christophe,
>
> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > Without this, when we are unwinding across a signal frame we can jump
> > to an even address which leads to an exception.
> >
> > This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
> > PC from the signal frame since the PC saved by the kernel has the LSB
> > bit set to zero.
> >
> > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > Mickaël Guêné <mickael.guene@st.com>
> >
> > libgcc/
> > * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
> > architecture.
> >
> > Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
> >
> > diff --git a/libgcc/config/arm/unwind-arm.c
> > b/libgcc/config/arm/unwind-arm.c
> > index 9ba73e7..ba47150 100644
> > --- a/libgcc/config/arm/unwind-arm.c
> > +++ b/libgcc/config/arm/unwind-arm.c
> > @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set
> > (_Unwind_Context *context,
> > return _UVRSR_FAILED;
> >
> > vrs->core.r[regno] = *(_uw *) valuep;
> > +#if defined(__ARM_ARCH_7M__)
> > + /* Force LSB bit since we always run thumb code. */
> > + if (regno == 15)
> > + vrs->core.r[regno] |= 1;
> > +#endif
>
> Hmm, this looks quite specific. There are other architectures that are
> thumb-only too (6-M, 7E-M etc).
>
> Would checking for __thumb__ be better?
>
Right.
The attached updated patch also uses R_PC instead of 15.
Christophe
> Thanks,
>
> Kyrill
>
>
> > return _UVRSR_OK;
> >
> > case _UVRSC_VFP:
> > --
> > 2.6.3
> >
[-- Attachment #2: 13-force-LSB-for-PC.patch --]
[-- Type: text/x-patch, Size: 1314 bytes --]
commit d50dfb233059bc5a110117047fe8f60d6580f095
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu Feb 8 14:52:02 2018 +0100
[ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.
This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
libgcc/
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
architecture.
Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 9ba73e7..8313ee0 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
return _UVRSR_FAILED;
vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__thumb__)
+ /* Force LSB bit since we always run thumb code. */
+ if (regno == R_PC)
+ vrs->core.r[regno] |= 1;
+#endif
return _UVRSR_OK;
case _UVRSC_VFP:
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-09-05 8:30 ` Christophe Lyon
@ 2019-09-05 8:32 ` Christophe Lyon
2019-09-05 20:56 ` Ian Lance Taylor
2019-09-05 9:03 ` Kyrill Tkachov
1 sibling, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-05 8:32 UTC (permalink / raw)
To: Kyrill Tkachov, Ian Lance Taylor; +Cc: Christophe Lyon, gcc-patches
Sorry, I forgot again to cc: Ian.
Thanks,
Christophe
On Thu, 5 Sep 2019 at 10:30, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> On Thu, 29 Aug 2019 at 17:32, Kyrill Tkachov
> <kyrylo.tkachov@foss.arm.com> wrote:
> >
> > Hi Christophe,
> >
> > On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > > Without this, when we are unwinding across a signal frame we can jump
> > > to an even address which leads to an exception.
> > >
> > > This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
> > > PC from the signal frame since the PC saved by the kernel has the LSB
> > > bit set to zero.
> > >
> > > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > > Mickaël Guêné <mickael.guene@st.com>
> > >
> > > libgcc/
> > > * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
> > > architecture.
> > >
> > > Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
> > >
> > > diff --git a/libgcc/config/arm/unwind-arm.c
> > > b/libgcc/config/arm/unwind-arm.c
> > > index 9ba73e7..ba47150 100644
> > > --- a/libgcc/config/arm/unwind-arm.c
> > > +++ b/libgcc/config/arm/unwind-arm.c
> > > @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set
> > > (_Unwind_Context *context,
> > > return _UVRSR_FAILED;
> > >
> > > vrs->core.r[regno] = *(_uw *) valuep;
> > > +#if defined(__ARM_ARCH_7M__)
> > > + /* Force LSB bit since we always run thumb code. */
> > > + if (regno == 15)
> > > + vrs->core.r[regno] |= 1;
> > > +#endif
> >
> > Hmm, this looks quite specific. There are other architectures that are
> > thumb-only too (6-M, 7E-M etc).
> >
> > Would checking for __thumb__ be better?
> >
> Right.
> The attached updated patch also uses R_PC instead of 15.
>
> Christophe
>
> > Thanks,
> >
> > Kyrill
> >
> >
> > > return _UVRSR_OK;
> > >
> > > case _UVRSC_VFP:
> > > --
> > > 2.6.3
> > >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-09-05 8:30 ` Christophe Lyon
2019-09-05 8:32 ` Christophe Lyon
@ 2019-09-05 9:03 ` Kyrill Tkachov
2019-09-09 8:58 ` Christophe Lyon
1 sibling, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-09-05 9:03 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc-patches
Hi Christophe,
On 9/5/19 9:30 AM, Christophe Lyon wrote:
> On Thu, 29 Aug 2019 at 17:32, Kyrill Tkachov
> <kyrylo.tkachov@foss.arm.com> wrote:
>> Hi Christophe,
>>
>> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>>> Without this, when we are unwinding across a signal frame we can jump
>>> to an even address which leads to an exception.
>>>
>>> This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
>>> PC from the signal frame since the PC saved by the kernel has the LSB
>>> bit set to zero.
>>>
>>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>> Mickaël Guêné <mickael.guene@st.com>
>>>
>>> libgcc/
>>> * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
>>> architecture.
>>>
>>> Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
>>>
>>> diff --git a/libgcc/config/arm/unwind-arm.c
>>> b/libgcc/config/arm/unwind-arm.c
>>> index 9ba73e7..ba47150 100644
>>> --- a/libgcc/config/arm/unwind-arm.c
>>> +++ b/libgcc/config/arm/unwind-arm.c
>>> @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set
>>> (_Unwind_Context *context,
>>> return _UVRSR_FAILED;
>>>
>>> vrs->core.r[regno] = *(_uw *) valuep;
>>> +#if defined(__ARM_ARCH_7M__)
>>> + /* Force LSB bit since we always run thumb code. */
>>> + if (regno == 15)
>>> + vrs->core.r[regno] |= 1;
>>> +#endif
>> Hmm, this looks quite specific. There are other architectures that are
>> thumb-only too (6-M, 7E-M etc).
>>
>> Would checking for __thumb__ be better?
>>
> Right.
> The attached updated patch also uses R_PC instead of 15.
Looks ok to me but we'll need to make sure this doesn't break non-FDPIC
targets now.
A bootstrap and test of an arm-none-linux-gnueabihf targeting thumb
should do it.
Thanks,
Kyrill
>
> Christophe
>
>> Thanks,
>>
>> Kyrill
>>
>>
>>> return _UVRSR_OK;
>>>
>>> case _UVRSC_VFP:
>>> --
>>> 2.6.3
>>>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-09-05 8:32 ` Christophe Lyon
@ 2019-09-05 20:56 ` Ian Lance Taylor
0 siblings, 0 replies; 109+ messages in thread
From: Ian Lance Taylor @ 2019-09-05 20:56 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Kyrill Tkachov, Christophe Lyon, gcc-patches
Christophe Lyon <christophe.lyon@linaro.org> writes:
> Sorry, I forgot again to cc: Ian.
As far as I'm concerned, it's fine for architecture maintainers to
approve changes to architecture-specific files in libgcc.
Ian
> On Thu, 5 Sep 2019 at 10:30, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>>
>> On Thu, 29 Aug 2019 at 17:32, Kyrill Tkachov
>> <kyrylo.tkachov@foss.arm.com> wrote:
>> >
>> > Hi Christophe,
>> >
>> > On 5/15/19 1:39 PM, Christophe Lyon wrote:
>> > > Without this, when we are unwinding across a signal frame we can jump
>> > > to an even address which leads to an exception.
>> > >
>> > > This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
>> > > PC from the signal frame since the PC saved by the kernel has the LSB
>> > > bit set to zero.
>> > >
>> > > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>> > > Mickaël Guêné <mickael.guene@st.com>
>> > >
>> > > libgcc/
>> > > * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
>> > > architecture.
>> > >
>> > > Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
>> > >
>> > > diff --git a/libgcc/config/arm/unwind-arm.c
>> > > b/libgcc/config/arm/unwind-arm.c
>> > > index 9ba73e7..ba47150 100644
>> > > --- a/libgcc/config/arm/unwind-arm.c
>> > > +++ b/libgcc/config/arm/unwind-arm.c
>> > > @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set
>> > > (_Unwind_Context *context,
>> > > return _UVRSR_FAILED;
>> > >
>> > > vrs->core.r[regno] = *(_uw *) valuep;
>> > > +#if defined(__ARM_ARCH_7M__)
>> > > + /* Force LSB bit since we always run thumb code. */
>> > > + if (regno == 15)
>> > > + vrs->core.r[regno] |= 1;
>> > > +#endif
>> >
>> > Hmm, this looks quite specific. There are other architectures that are
>> > thumb-only too (6-M, 7E-M etc).
>> >
>> > Would checking for __thumb__ be better?
>> >
>> Right.
>> The attached updated patch also uses R_PC instead of 15.
>>
>> Christophe
>>
>> > Thanks,
>> >
>> > Kyrill
>> >
>> >
>> > > return _UVRSR_OK;
>> > >
>> > > case _UVRSC_VFP:
>> > > --
>> > > 2.6.3
>> > >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-07-19 9:03 ` Kyrill Tkachov
@ 2019-09-06 8:01 ` Christophe Lyon
2019-09-06 8:28 ` Kyrill Tkachov
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-06 8:01 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
On Fri, 19 Jul 2019 at 11:00, Kyrill Tkachov
<kyrylo.tkachov@foss.arm.com> wrote:
>
>
> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > Since FDPIC currently supports arm and thumb-2 modes only, these tests
> > fail because they enforce an architecture version that doesn't match
> > these restrictions.
> >
> > This patch introduces new values for the arm_arch effective-target
> > (v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
> > needed, and adds them to the relevant tests. It also adds the
> > corresponding non-thumb effective-target to the tests that were
> > missing it.
> >
> > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> >
> > * lib/target-supports.exp
> > (check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
> > v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
> > * gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
> > effective-target.
> > * gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
> > * gcc.target/arm/attr_arm-err.c: Likewise.
> > * gcc.target/arm/ftest-armv4-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv4t-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv5t-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv5te-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv6-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv6-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv6k-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
> > * gcc.target/arm/ftest-armv6z-arm.c: Likewise.
> > * gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
> > * gcc.target/arm/g2.c: Likewise.
> > * gcc.target/arm/macro_defs1.c: Likewise.
> > * gcc.target/arm/pr59858.c: Likewise.
> > * gcc.target/arm/pr65647-2.c: Likewise.
> > * gcc.target/arm/pr79058.c: Likewise.
> > * gcc.target/arm/pr83712.c: Likewise.
> > * gcc.target/arm/pragma_arch_switch_2.c: Likewise.
> > * gcc.target/arm/scd42-1.c: Likewise.
> > * gcc.target/arm/scd42-2.c: Likewise.
> > * gcc.target/arm/scd42-3.c: Likewise.
> > * gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
> >
> Ok.
>
> This looks like a good improvement on its own.
>
Sigh, after more testing I found problems :(
> Thanks,
>
> Kyrill
>
>
>
> > Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
> >
> > diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > index d144b70..4e695cd 100644
> > --- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > +++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > @@ -1,4 +1,4 @@
> > -/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
> > +/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target
> > arm*-*-* } } */
> > /* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } {
> > "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
> > /* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" {
> > target arm*-*-* } } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > index 88528f1..886a012 100644
> > --- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > +++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6k" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> > /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
> > /* { dg-add-options arm_arch_v6k } */
> >
For instance on arm-linux-gnueabihf (thus defaulting to float-abi=hard),
arm_arch_v6k_thumb fails (because it tries to use thumb-1 + hard-float
which is not supported),
while the test itself would add -mfloat-abi=softfp, thus using a
supported configuration.
Is there a way to pass an argument to an effective-target directive?
(current, if one adds an argument, it's the target selector)
Or shall I add other effective-targets, eg arm_arch_v6k_thumb_softfp_ok?
Christophe
> > diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > index e1ed1c1..2eeb522 100644
> > --- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > @@ -2,6 +2,7 @@
> > Verify that unaligned_access is correctly with attribute target. */
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6" } } */
> > +/* { dg-require-effective-target arm_arch_v6_ok } */
> > /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
> > /* { dg-add-options arm_arch_v6 } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > index 630c06a..d410056 100644
> > --- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > +++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > @@ -2,6 +2,7 @@
> > /* { dg-do compile } */
> > /* { dg-require-effective-target arm_arm_ok } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6-m" } } */
> > +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > /* { dg-add-options arm_arch_v6m } */
> >
> > int __attribute__((target("arm")))
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > index 4b48ef8..447a8ec 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv4" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v4_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v4 } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > index 016506f..05db533 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv4t" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v4t_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v4t } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > index 9ef944e..78878f7 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv4t" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v4t } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > index a9403e9..bea25d09 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv5t" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v5t_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v5t } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > index f3ad07e..b25d17d 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv5t" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v5t } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > index f98c01a..7b37c7f 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv5te" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v5te } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > index 5d71787..27a64a2 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv5te" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v5te } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > index 88a5089..bfab765 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v6 } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > index 90ef9d2..15a6d75 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v6 } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > index 8de021a..721c9f9 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6k" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6k_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v6k } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > index c2fc270..b3b6ecf 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6k" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v6k } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > index ee075e2..27f71be 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6-m" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v6m } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > index 83b4bc4..259d2b5 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6t2" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v6t2 } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > index 1a1cbc5..e624ec5 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6t2" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v6t2 } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > index e2df0d4..66380bf 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6z" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6z_ok } */
> > /* { dg-options "-marm" } */
> > /* { dg-add-options arm_arch_v6z } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > index e4b94ef..23a4fcd 100644
> > --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6z" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
> > /* { dg-options "-mthumb" } */
> > /* { dg-add-options arm_arch_v6z } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/g2.c
> > b/gcc/testsuite/gcc.target/arm/g2.c
> > index e368017..da68c8b 100644
> > --- a/gcc/testsuite/gcc.target/arm/g2.c
> > +++ b/gcc/testsuite/gcc.target/arm/g2.c
> > @@ -4,6 +4,7 @@
> > /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > "-march=*" } { "-march=xscale" } } */
> > /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > "-mcpu=*" } { "-mcpu=xscale" } } */
> > /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> > "-mthumb" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > /* { dg-require-effective-target arm32 } */
> >
> > /* Brett Gaines' test case. */
> > diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > index 4cc9ae6..655ba93 100644
> > --- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > +++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-march=*" } { "-march=armv6-m" } } */
> > /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > "-marm" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > /* { dg-options "-march=armv6-m -mthumb" } */
> >
> > #ifdef __ARM_NEON_FP
> > diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c
> > b/gcc/testsuite/gcc.target/arm/pr59858.c
> > index a944b9a..bcfd5d5 100644
> > --- a/gcc/testsuite/gcc.target/arm/pr59858.c
> > +++ b/gcc/testsuite/gcc.target/arm/pr59858.c
> > @@ -1,6 +1,7 @@
> > /* { dg-do compile } */
> > /* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb
> > -fno-stack-protector -Os -fno-tree-loop-optimize
> > -fno-tree-dominator-opts -fPIC -w" } */
> > /* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft
> > -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> > +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> >
> > typedef enum {
> > REG_ENOSYS = -1,
> > diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > index f2985f8..3d9e75f 100644
> > --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > +++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > @@ -1,4 +1,5 @@
> > /* { dg-do compile } */
> > +/* { dg-require-effective-target arm_arch_v6_ok } */
> > /* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
> >
> > typedef struct {
> > diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c
> > b/gcc/testsuite/gcc.target/arm/pr79058.c
> > index 54a1d8a..7d078ac 100644
> > --- a/gcc/testsuite/gcc.target/arm/pr79058.c
> > +++ b/gcc/testsuite/gcc.target/arm/pr79058.c
> > @@ -1,5 +1,6 @@
> > /* { dg-do compile } */
> > /* { dg-require-effective-target arm_arm_ok } */
> > +/* { dg-require-effective-target arm_arch_v4_ok } */
> > /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } {
> > "-mcpu=arm7tdmi" } } */
> > /* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c
> > b/gcc/testsuite/gcc.target/arm/pr83712.c
> > index 8ed8cdf..4902ec9 100644
> > --- a/gcc/testsuite/gcc.target/arm/pr83712.c
> > +++ b/gcc/testsuite/gcc.target/arm/pr83712.c
> > @@ -1,4 +1,5 @@
> > /* { dg-do compile } */
> > +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> > /* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
> > #pragma GCC optimize ("-O2")
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > index b6211f9..c3361e7 100644
> > --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > @@ -2,6 +2,7 @@
> > /* { dg-skip-if "instruction not valid on thumb" { *-*-* } {
> > "-mthumb" } { "" } } */
> > /* { dg-do assemble } */
> > /* { dg-require-effective-target arm_arm_ok } */
> > +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > /* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99
> > -marm" } */
> >
> > #pragma GCC target ("arch=armv6")
> > diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c
> > b/gcc/testsuite/gcc.target/arm/scd42-1.c
> > index be60e64..2b8fc0b 100644
> > --- a/gcc/testsuite/gcc.target/arm/scd42-1.c
> > +++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
> > @@ -3,6 +3,7 @@
> > /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> > "-march=*" } { "-march=xscale" } } */
> > /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> > } { "-mcpu=xscale" } } */
> > /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> > "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> > +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> >
> > unsigned load1(void) __attribute__ ((naked));
> > diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c
> > b/gcc/testsuite/gcc.target/arm/scd42-2.c
> > index 6d9e5e1..4181a75 100644
> > --- a/gcc/testsuite/gcc.target/arm/scd42-2.c
> > +++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
> > @@ -4,6 +4,7 @@
> > /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > "-mcpu=*" } { "-mcpu=xscale" } } */
> > /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> > "-mthumb" } { "" } } */
> > /* { dg-require-effective-target arm32 } */
> > +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > /* { dg-options "-mcpu=xscale -O -marm" } */
> >
> > unsigned load2(void) __attribute__ ((naked));
> > diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c
> > b/gcc/testsuite/gcc.target/arm/scd42-3.c
> > index e566cb2..0afd121 100644
> > --- a/gcc/testsuite/gcc.target/arm/scd42-3.c
> > +++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
> > @@ -3,6 +3,7 @@
> > /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> > "-march=*" } { "-march=xscale" } } */
> > /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> > } { "-mcpu=xscale" } } */
> > /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> > "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> > +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> >
> > unsigned load4(void) __attribute__ ((naked));
> > diff --git a/gcc/testsuite/lib/target-supports.exp
> > b/gcc/testsuite/lib/target-supports.exp
> > index 60d68f4..3f091c5 100644
> > --- a/gcc/testsuite/lib/target-supports.exp
> > +++ b/gcc/testsuite/lib/target-supports.exp
> > @@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
> > foreach { armfunc armflag armdefs } {
> > v4 "-march=armv4 -marm" __ARM_ARCH_4__
> > v4t "-march=armv4t" __ARM_ARCH_4T__
> > + v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
> > v5t "-march=armv5t" __ARM_ARCH_5T__
> > + v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
> > v5te "-march=armv5te" __ARM_ARCH_5TE__
> > + v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
> > v6 "-march=armv6" __ARM_ARCH_6__
> > + v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
> > v6k "-march=armv6k" __ARM_ARCH_6K__
> > + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> > v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
> > v6z "-march=armv6z" __ARM_ARCH_6Z__
> > + v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
> > v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
> > v7a "-march=armv7-a" __ARM_ARCH_7A__
> > v7r "-march=armv7-r" __ARM_ARCH_7R__
> > --
> > 2.6.3
> >
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-09-06 8:01 ` Christophe Lyon
@ 2019-09-06 8:28 ` Kyrill Tkachov
2019-09-06 9:10 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Kyrill Tkachov @ 2019-09-06 8:28 UTC (permalink / raw)
To: Christophe Lyon; +Cc: Christophe Lyon, gcc-patches
On 9/6/19 9:01 AM, Christophe Lyon wrote:
> On Fri, 19 Jul 2019 at 11:00, Kyrill Tkachov
> <kyrylo.tkachov@foss.arm.com> wrote:
>>
>> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>>> Since FDPIC currently supports arm and thumb-2 modes only, these tests
>>> fail because they enforce an architecture version that doesn't match
>>> these restrictions.
>>>
>>> This patch introduces new values for the arm_arch effective-target
>>> (v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
>>> needed, and adds them to the relevant tests. It also adds the
>>> corresponding non-thumb effective-target to the tests that were
>>> missing it.
>>>
>>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
>>>
>>> * lib/target-supports.exp
>>> (check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
>>> v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
>>> * gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
>>> effective-target.
>>> * gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
>>> * gcc.target/arm/attr_arm-err.c: Likewise.
>>> * gcc.target/arm/ftest-armv4-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv4t-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv5t-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv5te-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv6-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv6-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv6k-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
>>> * gcc.target/arm/ftest-armv6z-arm.c: Likewise.
>>> * gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
>>> * gcc.target/arm/g2.c: Likewise.
>>> * gcc.target/arm/macro_defs1.c: Likewise.
>>> * gcc.target/arm/pr59858.c: Likewise.
>>> * gcc.target/arm/pr65647-2.c: Likewise.
>>> * gcc.target/arm/pr79058.c: Likewise.
>>> * gcc.target/arm/pr83712.c: Likewise.
>>> * gcc.target/arm/pragma_arch_switch_2.c: Likewise.
>>> * gcc.target/arm/scd42-1.c: Likewise.
>>> * gcc.target/arm/scd42-2.c: Likewise.
>>> * gcc.target/arm/scd42-3.c: Likewise.
>>> * gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
>>>
>> Ok.
>>
>> This looks like a good improvement on its own.
>>
> Sigh, after more testing I found problems :(
>
>> Thanks,
>>
>> Kyrill
>>
>>
>>
>>> Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
>>>
>>> diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
>>> b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
>>> index d144b70..4e695cd 100644
>>> --- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
>>> +++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
>>> @@ -1,4 +1,4 @@
>>> -/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
>>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target
>>> arm*-*-* } } */
>>> /* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } {
>>> "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
>>> /* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" {
>>> target arm*-*-* } } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
>>> b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
>>> index 88528f1..886a012 100644
>>> --- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
>>> +++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6k" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
>>> /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
>>> /* { dg-add-options arm_arch_v6k } */
>>>
> For instance on arm-linux-gnueabihf (thus defaulting to float-abi=hard),
> arm_arch_v6k_thumb fails (because it tries to use thumb-1 + hard-float
> which is not supported),
> while the test itself would add -mfloat-abi=softfp, thus using a
> supported configuration.
>
> Is there a way to pass an argument to an effective-target directive?
> (current, if one adds an argument, it's the target selector)
>
> Or shall I add other effective-targets, eg arm_arch_v6k_thumb_softfp_ok?
Sigh, at this point I'm thinking maybe we should have a
arm_arch_v6k_thumb target that basically assumes/forces softfp.
Thanks,
Kyrill
>
> Christophe
>
>>> diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
>>> b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
>>> index e1ed1c1..2eeb522 100644
>>> --- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
>>> +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
>>> @@ -2,6 +2,7 @@
>>> Verify that unaligned_access is correctly with attribute target. */
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6" } } */
>>> +/* { dg-require-effective-target arm_arch_v6_ok } */
>>> /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
>>> /* { dg-add-options arm_arch_v6 } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
>>> b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
>>> index 630c06a..d410056 100644
>>> --- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
>>> +++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
>>> @@ -2,6 +2,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-require-effective-target arm_arm_ok } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6-m" } } */
>>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
>>> /* { dg-add-options arm_arch_v6m } */
>>>
>>> int __attribute__((target("arm")))
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
>>> index 4b48ef8..447a8ec 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv4" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v4_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v4 } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
>>> index 016506f..05db533 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv4t" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v4t_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v4t } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
>>> index 9ef944e..78878f7 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv4t" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v4t } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
>>> index a9403e9..bea25d09 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv5t" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v5t_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v5t } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
>>> index f3ad07e..b25d17d 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv5t" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v5t } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
>>> index f98c01a..7b37c7f 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv5te" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v5te } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
>>> index 5d71787..27a64a2 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv5te" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v5te } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
>>> index 88a5089..bfab765 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v6 } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
>>> index 90ef9d2..15a6d75 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v6 } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
>>> index 8de021a..721c9f9 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6k" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6k_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v6k } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
>>> index c2fc270..b3b6ecf 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6k" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v6k } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
>>> index ee075e2..27f71be 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6-m" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v6m } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
>>> index 83b4bc4..259d2b5 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6t2" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v6t2 } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
>>> index 1a1cbc5..e624ec5 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6t2" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v6t2 } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
>>> index e2df0d4..66380bf 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6z" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6z_ok } */
>>> /* { dg-options "-marm" } */
>>> /* { dg-add-options arm_arch_v6z } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
>>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
>>> index e4b94ef..23a4fcd 100644
>>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
>>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6z" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
>>> /* { dg-options "-mthumb" } */
>>> /* { dg-add-options arm_arch_v6z } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/g2.c
>>> b/gcc/testsuite/gcc.target/arm/g2.c
>>> index e368017..da68c8b 100644
>>> --- a/gcc/testsuite/gcc.target/arm/g2.c
>>> +++ b/gcc/testsuite/gcc.target/arm/g2.c
>>> @@ -4,6 +4,7 @@
>>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
>>> "-march=*" } { "-march=xscale" } } */
>>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
>>> "-mcpu=*" } { "-mcpu=xscale" } } */
>>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
>>> "-mthumb" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
>>> /* { dg-require-effective-target arm32 } */
>>>
>>> /* Brett Gaines' test case. */
>>> diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c
>>> b/gcc/testsuite/gcc.target/arm/macro_defs1.c
>>> index 4cc9ae6..655ba93 100644
>>> --- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
>>> +++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-march=*" } { "-march=armv6-m" } } */
>>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
>>> "-marm" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
>>> /* { dg-options "-march=armv6-m -mthumb" } */
>>>
>>> #ifdef __ARM_NEON_FP
>>> diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c
>>> b/gcc/testsuite/gcc.target/arm/pr59858.c
>>> index a944b9a..bcfd5d5 100644
>>> --- a/gcc/testsuite/gcc.target/arm/pr59858.c
>>> +++ b/gcc/testsuite/gcc.target/arm/pr59858.c
>>> @@ -1,6 +1,7 @@
>>> /* { dg-do compile } */
>>> /* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb
>>> -fno-stack-protector -Os -fno-tree-loop-optimize
>>> -fno-tree-dominator-opts -fPIC -w" } */
>>> /* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft
>>> -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
>>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
>>>
>>> typedef enum {
>>> REG_ENOSYS = -1,
>>> diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c
>>> b/gcc/testsuite/gcc.target/arm/pr65647-2.c
>>> index f2985f8..3d9e75f 100644
>>> --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
>>> +++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
>>> @@ -1,4 +1,5 @@
>>> /* { dg-do compile } */
>>> +/* { dg-require-effective-target arm_arch_v6_ok } */
>>> /* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
>>>
>>> typedef struct {
>>> diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c
>>> b/gcc/testsuite/gcc.target/arm/pr79058.c
>>> index 54a1d8a..7d078ac 100644
>>> --- a/gcc/testsuite/gcc.target/arm/pr79058.c
>>> +++ b/gcc/testsuite/gcc.target/arm/pr79058.c
>>> @@ -1,5 +1,6 @@
>>> /* { dg-do compile } */
>>> /* { dg-require-effective-target arm_arm_ok } */
>>> +/* { dg-require-effective-target arm_arch_v4_ok } */
>>> /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } {
>>> "-mcpu=arm7tdmi" } } */
>>> /* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c
>>> b/gcc/testsuite/gcc.target/arm/pr83712.c
>>> index 8ed8cdf..4902ec9 100644
>>> --- a/gcc/testsuite/gcc.target/arm/pr83712.c
>>> +++ b/gcc/testsuite/gcc.target/arm/pr83712.c
>>> @@ -1,4 +1,5 @@
>>> /* { dg-do compile } */
>>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
>>> /* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
>>> #pragma GCC optimize ("-O2")
>>>
>>> diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
>>> b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
>>> index b6211f9..c3361e7 100644
>>> --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
>>> +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
>>> @@ -2,6 +2,7 @@
>>> /* { dg-skip-if "instruction not valid on thumb" { *-*-* } {
>>> "-mthumb" } { "" } } */
>>> /* { dg-do assemble } */
>>> /* { dg-require-effective-target arm_arm_ok } */
>>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
>>> /* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99
>>> -marm" } */
>>>
>>> #pragma GCC target ("arch=armv6")
>>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c
>>> b/gcc/testsuite/gcc.target/arm/scd42-1.c
>>> index be60e64..2b8fc0b 100644
>>> --- a/gcc/testsuite/gcc.target/arm/scd42-1.c
>>> +++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
>>> @@ -3,6 +3,7 @@
>>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
>>> "-march=*" } { "-march=xscale" } } */
>>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
>>> } { "-mcpu=xscale" } } */
>>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
>>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
>>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
>>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
>>>
>>> unsigned load1(void) __attribute__ ((naked));
>>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c
>>> b/gcc/testsuite/gcc.target/arm/scd42-2.c
>>> index 6d9e5e1..4181a75 100644
>>> --- a/gcc/testsuite/gcc.target/arm/scd42-2.c
>>> +++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
>>> @@ -4,6 +4,7 @@
>>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
>>> "-mcpu=*" } { "-mcpu=xscale" } } */
>>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
>>> "-mthumb" } { "" } } */
>>> /* { dg-require-effective-target arm32 } */
>>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
>>> /* { dg-options "-mcpu=xscale -O -marm" } */
>>>
>>> unsigned load2(void) __attribute__ ((naked));
>>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c
>>> b/gcc/testsuite/gcc.target/arm/scd42-3.c
>>> index e566cb2..0afd121 100644
>>> --- a/gcc/testsuite/gcc.target/arm/scd42-3.c
>>> +++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
>>> @@ -3,6 +3,7 @@
>>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
>>> "-march=*" } { "-march=xscale" } } */
>>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
>>> } { "-mcpu=xscale" } } */
>>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
>>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
>>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
>>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
>>>
>>> unsigned load4(void) __attribute__ ((naked));
>>> diff --git a/gcc/testsuite/lib/target-supports.exp
>>> b/gcc/testsuite/lib/target-supports.exp
>>> index 60d68f4..3f091c5 100644
>>> --- a/gcc/testsuite/lib/target-supports.exp
>>> +++ b/gcc/testsuite/lib/target-supports.exp
>>> @@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
>>> foreach { armfunc armflag armdefs } {
>>> v4 "-march=armv4 -marm" __ARM_ARCH_4__
>>> v4t "-march=armv4t" __ARM_ARCH_4T__
>>> + v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
>>> v5t "-march=armv5t" __ARM_ARCH_5T__
>>> + v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
>>> v5te "-march=armv5te" __ARM_ARCH_5TE__
>>> + v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
>>> v6 "-march=armv6" __ARM_ARCH_6__
>>> + v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
>>> v6k "-march=armv6k" __ARM_ARCH_6K__
>>> + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
>>> v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
>>> v6z "-march=armv6z" __ARM_ARCH_6Z__
>>> + v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
>>> v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
>>> v7a "-march=armv7-a" __ARM_ARCH_7A__
>>> v7r "-march=armv7-r" __ARM_ARCH_7R__
>>> --
>>> 2.6.3
>>>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-09-06 8:28 ` Kyrill Tkachov
@ 2019-09-06 9:10 ` Christophe Lyon
2019-09-06 17:44 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-06 9:10 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
On Fri, 6 Sep 2019 at 10:28, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
>
>
> On 9/6/19 9:01 AM, Christophe Lyon wrote:
> > On Fri, 19 Jul 2019 at 11:00, Kyrill Tkachov
> > <kyrylo.tkachov@foss.arm.com> wrote:
> >>
> >> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> >>> Since FDPIC currently supports arm and thumb-2 modes only, these tests
> >>> fail because they enforce an architecture version that doesn't match
> >>> these restrictions.
> >>>
> >>> This patch introduces new values for the arm_arch effective-target
> >>> (v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
> >>> needed, and adds them to the relevant tests. It also adds the
> >>> corresponding non-thumb effective-target to the tests that were
> >>> missing it.
> >>>
> >>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> >>>
> >>> * lib/target-supports.exp
> >>> (check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
> >>> v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
> >>> * gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
> >>> effective-target.
> >>> * gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
> >>> * gcc.target/arm/attr_arm-err.c: Likewise.
> >>> * gcc.target/arm/ftest-armv4-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv4t-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv5t-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv5te-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6k-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6z-arm.c: Likewise.
> >>> * gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
> >>> * gcc.target/arm/g2.c: Likewise.
> >>> * gcc.target/arm/macro_defs1.c: Likewise.
> >>> * gcc.target/arm/pr59858.c: Likewise.
> >>> * gcc.target/arm/pr65647-2.c: Likewise.
> >>> * gcc.target/arm/pr79058.c: Likewise.
> >>> * gcc.target/arm/pr83712.c: Likewise.
> >>> * gcc.target/arm/pragma_arch_switch_2.c: Likewise.
> >>> * gcc.target/arm/scd42-1.c: Likewise.
> >>> * gcc.target/arm/scd42-2.c: Likewise.
> >>> * gcc.target/arm/scd42-3.c: Likewise.
> >>> * gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
> >>>
> >> Ok.
> >>
> >> This looks like a good improvement on its own.
> >>
> > Sigh, after more testing I found problems :(
> >
> >> Thanks,
> >>
> >> Kyrill
> >>
> >>
> >>
> >>> Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
> >>>
> >>> diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> >>> b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> >>> index d144b70..4e695cd 100644
> >>> --- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> >>> +++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> >>> @@ -1,4 +1,4 @@
> >>> -/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
> >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target
> >>> arm*-*-* } } */
> >>> /* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } {
> >>> "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
> >>> /* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" {
> >>> target arm*-*-* } } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> >>> b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> >>> index 88528f1..886a012 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6k" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> >>> /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
> >>> /* { dg-add-options arm_arch_v6k } */
> >>>
> > For instance on arm-linux-gnueabihf (thus defaulting to float-abi=hard),
> > arm_arch_v6k_thumb fails (because it tries to use thumb-1 + hard-float
> > which is not supported),
> > while the test itself would add -mfloat-abi=softfp, thus using a
> > supported configuration.
> >
> > Is there a way to pass an argument to an effective-target directive?
> > (current, if one adds an argument, it's the target selector)
> >
> > Or shall I add other effective-targets, eg arm_arch_v6k_thumb_softfp_ok?
>
> Sigh, at this point I'm thinking maybe we should have a
> arm_arch_v6k_thumb target that basically assumes/forces softfp.
>
Sure, I can add:
+ v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
instead of
+ v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
as the original patch does.
But isn't there a risk of conflict on toolchains configured for
hard-float or testcases enforcing it?
And... I suppose I should to the same for v4t_thumb, v5t_thumb,
v5te_thumb, v6_thumb and v6z_thumb?
I see that v6m/v8m_base already forces float-abi=soft....
Christophe
> Thanks,
>
> Kyrill
>
>
> >
> > Christophe
> >
> >>> diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> >>> b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> >>> index e1ed1c1..2eeb522 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> >>> @@ -2,6 +2,7 @@
> >>> Verify that unaligned_access is correctly with attribute target. */
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> >>> /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
> >>> /* { dg-add-options arm_arch_v6 } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> >>> b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> >>> index 630c06a..d410056 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> >>> @@ -2,6 +2,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-require-effective-target arm_arm_ok } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6-m" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> >>> /* { dg-add-options arm_arch_v6m } */
> >>>
> >>> int __attribute__((target("arm")))
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> >>> index 4b48ef8..447a8ec 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv4" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v4_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v4 } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> >>> index 016506f..05db533 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv4t" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v4t_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v4t } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> >>> index 9ef944e..78878f7 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv4t" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v4t } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> >>> index a9403e9..bea25d09 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv5t" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5t_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v5t } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> >>> index f3ad07e..b25d17d 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv5t" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v5t } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> >>> index f98c01a..7b37c7f 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv5te" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v5te } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> >>> index 5d71787..27a64a2 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv5te" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v5te } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> >>> index 88a5089..bfab765 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v6 } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> >>> index 90ef9d2..15a6d75 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v6 } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> >>> index 8de021a..721c9f9 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6k" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6k_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v6k } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> >>> index c2fc270..b3b6ecf 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6k" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v6k } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> >>> index ee075e2..27f71be 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6-m" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v6m } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> >>> index 83b4bc4..259d2b5 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6t2" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v6t2 } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> >>> index 1a1cbc5..e624ec5 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6t2" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v6t2 } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> >>> index e2df0d4..66380bf 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6z" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6z_ok } */
> >>> /* { dg-options "-marm" } */
> >>> /* { dg-add-options arm_arch_v6z } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> >>> index e4b94ef..23a4fcd 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6z" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
> >>> /* { dg-options "-mthumb" } */
> >>> /* { dg-add-options arm_arch_v6z } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/g2.c
> >>> b/gcc/testsuite/gcc.target/arm/g2.c
> >>> index e368017..da68c8b 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/g2.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/g2.c
> >>> @@ -4,6 +4,7 @@
> >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> >>> "-march=*" } { "-march=xscale" } } */
> >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> >>> "-mcpu=*" } { "-mcpu=xscale" } } */
> >>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> >>> /* { dg-require-effective-target arm32 } */
> >>>
> >>> /* Brett Gaines' test case. */
> >>> diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> >>> b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> >>> index 4cc9ae6..655ba93 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-march=*" } { "-march=armv6-m" } } */
> >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> >>> "-marm" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> >>> /* { dg-options "-march=armv6-m -mthumb" } */
> >>>
> >>> #ifdef __ARM_NEON_FP
> >>> diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c
> >>> b/gcc/testsuite/gcc.target/arm/pr59858.c
> >>> index a944b9a..bcfd5d5 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/pr59858.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/pr59858.c
> >>> @@ -1,6 +1,7 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb
> >>> -fno-stack-protector -Os -fno-tree-loop-optimize
> >>> -fno-tree-dominator-opts -fPIC -w" } */
> >>> /* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft
> >>> -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> >>>
> >>> typedef enum {
> >>> REG_ENOSYS = -1,
> >>> diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> >>> b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> >>> index f2985f8..3d9e75f 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> >>> @@ -1,4 +1,5 @@
> >>> /* { dg-do compile } */
> >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> >>> /* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
> >>>
> >>> typedef struct {
> >>> diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c
> >>> b/gcc/testsuite/gcc.target/arm/pr79058.c
> >>> index 54a1d8a..7d078ac 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/pr79058.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/pr79058.c
> >>> @@ -1,5 +1,6 @@
> >>> /* { dg-do compile } */
> >>> /* { dg-require-effective-target arm_arm_ok } */
> >>> +/* { dg-require-effective-target arm_arch_v4_ok } */
> >>> /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } {
> >>> "-mcpu=arm7tdmi" } } */
> >>> /* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c
> >>> b/gcc/testsuite/gcc.target/arm/pr83712.c
> >>> index 8ed8cdf..4902ec9 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/pr83712.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/pr83712.c
> >>> @@ -1,4 +1,5 @@
> >>> /* { dg-do compile } */
> >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> >>> /* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
> >>> #pragma GCC optimize ("-O2")
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> >>> b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> >>> index b6211f9..c3361e7 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> >>> @@ -2,6 +2,7 @@
> >>> /* { dg-skip-if "instruction not valid on thumb" { *-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> /* { dg-do assemble } */
> >>> /* { dg-require-effective-target arm_arm_ok } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> >>> /* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99
> >>> -marm" } */
> >>>
> >>> #pragma GCC target ("arch=armv6")
> >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c
> >>> b/gcc/testsuite/gcc.target/arm/scd42-1.c
> >>> index be60e64..2b8fc0b 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/scd42-1.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
> >>> @@ -3,6 +3,7 @@
> >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> >>> "-march=*" } { "-march=xscale" } } */
> >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> >>> } { "-mcpu=xscale" } } */
> >>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> >>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> >>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> >>>
> >>> unsigned load1(void) __attribute__ ((naked));
> >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c
> >>> b/gcc/testsuite/gcc.target/arm/scd42-2.c
> >>> index 6d9e5e1..4181a75 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/scd42-2.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
> >>> @@ -4,6 +4,7 @@
> >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> >>> "-mcpu=*" } { "-mcpu=xscale" } } */
> >>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> >>> "-mthumb" } { "" } } */
> >>> /* { dg-require-effective-target arm32 } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> >>> /* { dg-options "-mcpu=xscale -O -marm" } */
> >>>
> >>> unsigned load2(void) __attribute__ ((naked));
> >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c
> >>> b/gcc/testsuite/gcc.target/arm/scd42-3.c
> >>> index e566cb2..0afd121 100644
> >>> --- a/gcc/testsuite/gcc.target/arm/scd42-3.c
> >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
> >>> @@ -3,6 +3,7 @@
> >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> >>> "-march=*" } { "-march=xscale" } } */
> >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> >>> } { "-mcpu=xscale" } } */
> >>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> >>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> >>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> >>>
> >>> unsigned load4(void) __attribute__ ((naked));
> >>> diff --git a/gcc/testsuite/lib/target-supports.exp
> >>> b/gcc/testsuite/lib/target-supports.exp
> >>> index 60d68f4..3f091c5 100644
> >>> --- a/gcc/testsuite/lib/target-supports.exp
> >>> +++ b/gcc/testsuite/lib/target-supports.exp
> >>> @@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
> >>> foreach { armfunc armflag armdefs } {
> >>> v4 "-march=armv4 -marm" __ARM_ARCH_4__
> >>> v4t "-march=armv4t" __ARM_ARCH_4T__
> >>> + v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
> >>> v5t "-march=armv5t" __ARM_ARCH_5T__
> >>> + v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
> >>> v5te "-march=armv5te" __ARM_ARCH_5TE__
> >>> + v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
> >>> v6 "-march=armv6" __ARM_ARCH_6__
> >>> + v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
> >>> v6k "-march=armv6k" __ARM_ARCH_6K__
> >>> + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> >>> v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
> >>> v6z "-march=armv6z" __ARM_ARCH_6Z__
> >>> + v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
> >>> v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
> >>> v7a "-march=armv7-a" __ARM_ARCH_7A__
> >>> v7r "-march=armv7-r" __ARM_ARCH_7R__
> >>> --
> >>> 2.6.3
> >>>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-09-06 9:10 ` Christophe Lyon
@ 2019-09-06 17:44 ` Christophe Lyon
2019-09-09 8:38 ` Christophe Lyon
0 siblings, 1 reply; 109+ messages in thread
From: Christophe Lyon @ 2019-09-06 17:44 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 27989 bytes --]
On Fri, 6 Sep 2019 at 11:09, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> On Fri, 6 Sep 2019 at 10:28, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
> >
> >
> > On 9/6/19 9:01 AM, Christophe Lyon wrote:
> > > On Fri, 19 Jul 2019 at 11:00, Kyrill Tkachov
> > > <kyrylo.tkachov@foss.arm.com> wrote:
> > >>
> > >> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > >>> Since FDPIC currently supports arm and thumb-2 modes only, these tests
> > >>> fail because they enforce an architecture version that doesn't match
> > >>> these restrictions.
> > >>>
> > >>> This patch introduces new values for the arm_arch effective-target
> > >>> (v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
> > >>> needed, and adds them to the relevant tests. It also adds the
> > >>> corresponding non-thumb effective-target to the tests that were
> > >>> missing it.
> > >>>
> > >>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > >>>
> > >>> * lib/target-supports.exp
> > >>> (check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
> > >>> v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
> > >>> * gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
> > >>> effective-target.
> > >>> * gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
> > >>> * gcc.target/arm/attr_arm-err.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv4-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv4t-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv5t-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv5te-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6k-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6z-arm.c: Likewise.
> > >>> * gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
> > >>> * gcc.target/arm/g2.c: Likewise.
> > >>> * gcc.target/arm/macro_defs1.c: Likewise.
> > >>> * gcc.target/arm/pr59858.c: Likewise.
> > >>> * gcc.target/arm/pr65647-2.c: Likewise.
> > >>> * gcc.target/arm/pr79058.c: Likewise.
> > >>> * gcc.target/arm/pr83712.c: Likewise.
> > >>> * gcc.target/arm/pragma_arch_switch_2.c: Likewise.
> > >>> * gcc.target/arm/scd42-1.c: Likewise.
> > >>> * gcc.target/arm/scd42-2.c: Likewise.
> > >>> * gcc.target/arm/scd42-3.c: Likewise.
> > >>> * gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
> > >>>
> > >> Ok.
> > >>
> > >> This looks like a good improvement on its own.
> > >>
> > > Sigh, after more testing I found problems :(
> > >
> > >> Thanks,
> > >>
> > >> Kyrill
> > >>
> > >>
> > >>
> > >>> Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > >>> b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > >>> index d144b70..4e695cd 100644
> > >>> --- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > >>> +++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > >>> @@ -1,4 +1,4 @@
> > >>> -/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target
> > >>> arm*-*-* } } */
> > >>> /* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } {
> > >>> "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
> > >>> /* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" {
> > >>> target arm*-*-* } } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > >>> b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > >>> index 88528f1..886a012 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6k" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> > >>> /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
> > >>> /* { dg-add-options arm_arch_v6k } */
> > >>>
> > > For instance on arm-linux-gnueabihf (thus defaulting to float-abi=hard),
> > > arm_arch_v6k_thumb fails (because it tries to use thumb-1 + hard-float
> > > which is not supported),
> > > while the test itself would add -mfloat-abi=softfp, thus using a
> > > supported configuration.
> > >
> > > Is there a way to pass an argument to an effective-target directive?
> > > (current, if one adds an argument, it's the target selector)
> > >
> > > Or shall I add other effective-targets, eg arm_arch_v6k_thumb_softfp_ok?
> >
> > Sigh, at this point I'm thinking maybe we should have a
> > arm_arch_v6k_thumb target that basically assumes/forces softfp.
> >
>
> Sure, I can add:
> + v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
> instead of
> + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> as the original patch does.
>
> But isn't there a risk of conflict on toolchains configured for
> hard-float or testcases enforcing it?
> And... I suppose I should to the same for v4t_thumb, v5t_thumb,
> v5te_thumb, v6_thumb and v6z_thumb?
>
> I see that v6m/v8m_base already forces float-abi=soft....
>
> Christophe
>
>
How about the attached?
It forces -mfloat-abi=softfp on thumb arches that support thumb1 only,
and introduces _arm effective targets for those testcases which
actually force -marm.
Thanks
Christophe
>
> > Thanks,
> >
> > Kyrill
> >
> >
> > >
> > > Christophe
> > >
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > >>> b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > >>> index e1ed1c1..2eeb522 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > >>> @@ -2,6 +2,7 @@
> > >>> Verify that unaligned_access is correctly with attribute target. */
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> > >>> /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
> > >>> /* { dg-add-options arm_arch_v6 } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > >>> b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > >>> index 630c06a..d410056 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > >>> @@ -2,6 +2,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-require-effective-target arm_arm_ok } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6-m" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > >>> /* { dg-add-options arm_arch_v6m } */
> > >>>
> > >>> int __attribute__((target("arm")))
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > >>> index 4b48ef8..447a8ec 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv4" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v4_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v4 } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > >>> index 016506f..05db533 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv4t" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v4t_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v4t } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > >>> index 9ef944e..78878f7 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv4t" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v4t } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > >>> index a9403e9..bea25d09 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv5t" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5t_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v5t } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > >>> index f3ad07e..b25d17d 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv5t" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v5t } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > >>> index f98c01a..7b37c7f 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv5te" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v5te } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > >>> index 5d71787..27a64a2 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv5te" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v5te } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > >>> index 88a5089..bfab765 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v6 } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > >>> index 90ef9d2..15a6d75 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v6 } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > >>> index 8de021a..721c9f9 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6k" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6k_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v6k } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > >>> index c2fc270..b3b6ecf 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6k" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v6k } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > >>> index ee075e2..27f71be 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6-m" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v6m } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > >>> index 83b4bc4..259d2b5 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6t2" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v6t2 } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > >>> index 1a1cbc5..e624ec5 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6t2" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v6t2 } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > >>> index e2df0d4..66380bf 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6z" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6z_ok } */
> > >>> /* { dg-options "-marm" } */
> > >>> /* { dg-add-options arm_arch_v6z } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > >>> index e4b94ef..23a4fcd 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6z" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
> > >>> /* { dg-options "-mthumb" } */
> > >>> /* { dg-add-options arm_arch_v6z } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/g2.c
> > >>> b/gcc/testsuite/gcc.target/arm/g2.c
> > >>> index e368017..da68c8b 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/g2.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/g2.c
> > >>> @@ -4,6 +4,7 @@
> > >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > >>> "-march=*" } { "-march=xscale" } } */
> > >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > >>> "-mcpu=*" } { "-mcpu=xscale" } } */
> > >>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > >>> /* { dg-require-effective-target arm32 } */
> > >>>
> > >>> /* Brett Gaines' test case. */
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > >>> b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > >>> index 4cc9ae6..655ba93 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-march=*" } { "-march=armv6-m" } } */
> > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > >>> "-marm" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > >>> /* { dg-options "-march=armv6-m -mthumb" } */
> > >>>
> > >>> #ifdef __ARM_NEON_FP
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c
> > >>> b/gcc/testsuite/gcc.target/arm/pr59858.c
> > >>> index a944b9a..bcfd5d5 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/pr59858.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/pr59858.c
> > >>> @@ -1,6 +1,7 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb
> > >>> -fno-stack-protector -Os -fno-tree-loop-optimize
> > >>> -fno-tree-dominator-opts -fPIC -w" } */
> > >>> /* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft
> > >>> -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> > >>>
> > >>> typedef enum {
> > >>> REG_ENOSYS = -1,
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > >>> b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > >>> index f2985f8..3d9e75f 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > >>> @@ -1,4 +1,5 @@
> > >>> /* { dg-do compile } */
> > >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> > >>> /* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
> > >>>
> > >>> typedef struct {
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c
> > >>> b/gcc/testsuite/gcc.target/arm/pr79058.c
> > >>> index 54a1d8a..7d078ac 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/pr79058.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/pr79058.c
> > >>> @@ -1,5 +1,6 @@
> > >>> /* { dg-do compile } */
> > >>> /* { dg-require-effective-target arm_arm_ok } */
> > >>> +/* { dg-require-effective-target arm_arch_v4_ok } */
> > >>> /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } {
> > >>> "-mcpu=arm7tdmi" } } */
> > >>> /* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c
> > >>> b/gcc/testsuite/gcc.target/arm/pr83712.c
> > >>> index 8ed8cdf..4902ec9 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/pr83712.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/pr83712.c
> > >>> @@ -1,4 +1,5 @@
> > >>> /* { dg-do compile } */
> > >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> > >>> /* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
> > >>> #pragma GCC optimize ("-O2")
> > >>>
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > >>> b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > >>> index b6211f9..c3361e7 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > >>> @@ -2,6 +2,7 @@
> > >>> /* { dg-skip-if "instruction not valid on thumb" { *-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> /* { dg-do assemble } */
> > >>> /* { dg-require-effective-target arm_arm_ok } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > >>> /* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99
> > >>> -marm" } */
> > >>>
> > >>> #pragma GCC target ("arch=armv6")
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c
> > >>> b/gcc/testsuite/gcc.target/arm/scd42-1.c
> > >>> index be60e64..2b8fc0b 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/scd42-1.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
> > >>> @@ -3,6 +3,7 @@
> > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> > >>> "-march=*" } { "-march=xscale" } } */
> > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> > >>> } { "-mcpu=xscale" } } */
> > >>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> > >>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > >>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> > >>>
> > >>> unsigned load1(void) __attribute__ ((naked));
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c
> > >>> b/gcc/testsuite/gcc.target/arm/scd42-2.c
> > >>> index 6d9e5e1..4181a75 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/scd42-2.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
> > >>> @@ -4,6 +4,7 @@
> > >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > >>> "-mcpu=*" } { "-mcpu=xscale" } } */
> > >>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> > >>> "-mthumb" } { "" } } */
> > >>> /* { dg-require-effective-target arm32 } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > >>> /* { dg-options "-mcpu=xscale -O -marm" } */
> > >>>
> > >>> unsigned load2(void) __attribute__ ((naked));
> > >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c
> > >>> b/gcc/testsuite/gcc.target/arm/scd42-3.c
> > >>> index e566cb2..0afd121 100644
> > >>> --- a/gcc/testsuite/gcc.target/arm/scd42-3.c
> > >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
> > >>> @@ -3,6 +3,7 @@
> > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> > >>> "-march=*" } { "-march=xscale" } } */
> > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> > >>> } { "-mcpu=xscale" } } */
> > >>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> > >>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > >>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> > >>>
> > >>> unsigned load4(void) __attribute__ ((naked));
> > >>> diff --git a/gcc/testsuite/lib/target-supports.exp
> > >>> b/gcc/testsuite/lib/target-supports.exp
> > >>> index 60d68f4..3f091c5 100644
> > >>> --- a/gcc/testsuite/lib/target-supports.exp
> > >>> +++ b/gcc/testsuite/lib/target-supports.exp
> > >>> @@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
> > >>> foreach { armfunc armflag armdefs } {
> > >>> v4 "-march=armv4 -marm" __ARM_ARCH_4__
> > >>> v4t "-march=armv4t" __ARM_ARCH_4T__
> > >>> + v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
> > >>> v5t "-march=armv5t" __ARM_ARCH_5T__
> > >>> + v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
> > >>> v5te "-march=armv5te" __ARM_ARCH_5TE__
> > >>> + v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
> > >>> v6 "-march=armv6" __ARM_ARCH_6__
> > >>> + v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
> > >>> v6k "-march=armv6k" __ARM_ARCH_6K__
> > >>> + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> > >>> v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
> > >>> v6z "-march=armv6z" __ARM_ARCH_6Z__
> > >>> + v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
> > >>> v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
> > >>> v7a "-march=armv7-a" __ARM_ARCH_7A__
> > >>> v7r "-march=armv7-r" __ARM_ARCH_7R__
> > >>> --
> > >>> 2.6.3
> > >>>
[-- Attachment #2: patch-20-skip-tests-not-supported-by-fdpic --]
[-- Type: application/octet-stream, Size: 23054 bytes --]
commit a3fe384bbea1a873d3cc9ef3475dac16a9ff5c93
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Fri Jul 13 15:04:31 2018 +0000
[ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
Since FDPIC currently supports arm and thumb-2 modes only, these tests
fail because they enforce an architecture version that doesn't match
these restrictions.
This patch introduces new values for the arm_arch effective-target
(v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
needed, and adds them to the relevant tests. It also adds the
corresponding non-thumb effective-target to the tests that were
missing it.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
* gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
effective-target.
* gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
* gcc.target/arm/attr_arm-err.c: Likewise.
* gcc.target/arm/ftest-armv4-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5t-arm.c: Likewise.
* gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5te-arm.c: Likewise.
* gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6-arm.c: Likewise.
* gcc.target/arm/ftest-armv6-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6k-arm.c: Likewise.
* gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
* gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6z-arm.c: Likewise.
* gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
* gcc.target/arm/g2.c: Likewise.
* gcc.target/arm/macro_defs1.c: Likewise.
* gcc.target/arm/pr59858.c: Likewise.
* gcc.target/arm/pr65647-2.c: Likewise.
* gcc.target/arm/pr79058.c: Likewise.
* gcc.target/arm/pr83712.c: Likewise.
* gcc.target/arm/pragma_arch_switch_2.c: Likewise.
* gcc.target/arm/scd42-1.c: Likewise.
* gcc.target/arm/scd42-2.c: Likewise.
* gcc.target/arm/scd42-3.c: Likewise.
* gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
index d144b70..4e695cd 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target arm*-*-* } } */
/* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
/* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" { target arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
index 88528f1..886a012 100644
--- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
/* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
index e1ed1c1..2eeb522 100644
--- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
@@ -2,6 +2,7 @@
Verify that unaligned_access is correctly with attribute target. */
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
/* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
index 630c06a..d410056 100644
--- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
+++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
@@ -2,6 +2,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arm_ok } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-add-options arm_arch_v6m } */
int __attribute__((target("arm")))
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
index 4b48ef8..447a8ec 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v4 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
index 016506f..28fd2f7 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4t_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v4t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
index 9ef944e..cc67b58 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
-/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
+/* { dg-options "-mthumb -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v4t } */
#define NEED_ARM_ARCH
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
index a9403e9..8191299 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5t_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v5t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
index f3ad07e..bfea5d5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
-/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
+/* { dg-options "-mthumb -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v5t } */
#define NEED_ARM_ARCH
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
index f98c01a..e0c0d5c 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v5te } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
index 5d71787..c5a48ec 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
-/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
+/* { dg-options "-mthumb -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v5te } */
#define NEED_ARM_ARCH
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
index 88a5089..5d447c3 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
index 90ef9d2..5307b6b 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
-/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
+/* { dg-options "-mthumb -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v6 } */
#define NEED_ARM_ARCH
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
index 8de021a..0656e8f 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
index c2fc270..a1c054e 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
-/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
+/* { dg-options "-mthumb -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v6k } */
#define NEED_ARM_ARCH
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
index ee075e2..27f71be 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6m } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
index 83b4bc4..259d2b5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6t2 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
index 1a1cbc5..e624ec5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6t2 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
index e2df0d4..6e3a966 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6z_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6z } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
index e4b94ef..4896621 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
-/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
+/* { dg-options "-mthumb -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v6z } */
#define NEED_ARM_ARCH
diff --git a/gcc/testsuite/gcc.target/arm/g2.c b/gcc/testsuite/gcc.target/arm/g2.c
index e368017..ca5e3cc 100644
--- a/gcc/testsuite/gcc.target/arm/g2.c
+++ b/gcc/testsuite/gcc.target/arm/g2.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-require-effective-target arm32 } */
/* Brett Gaines' test case. */
diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c b/gcc/testsuite/gcc.target/arm/macro_defs1.c
index 4cc9ae6..655ba93 100644
--- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
+++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-options "-march=armv6-m -mthumb" } */
#ifdef __ARM_NEON_FP
diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c b/gcc/testsuite/gcc.target/arm/pr59858.c
index a944b9a..bcfd5d5 100644
--- a/gcc/testsuite/gcc.target/arm/pr59858.c
+++ b/gcc/testsuite/gcc.target/arm/pr59858.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb -fno-stack-protector -Os -fno-tree-loop-optimize -fno-tree-dominator-opts -fPIC -w" } */
/* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
typedef enum {
REG_ENOSYS = -1,
diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c b/gcc/testsuite/gcc.target/arm/pr65647-2.c
index f2985f8..e3978e5 100644
--- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
+++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v6_arm_ok } */
/* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
typedef struct {
diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c b/gcc/testsuite/gcc.target/arm/pr79058.c
index 54a1d8a..7d078ac 100644
--- a/gcc/testsuite/gcc.target/arm/pr79058.c
+++ b/gcc/testsuite/gcc.target/arm/pr79058.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=arm7tdmi" } } */
/* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c b/gcc/testsuite/gcc.target/arm/pr83712.c
index 8ed8cdf..4902ec9 100644
--- a/gcc/testsuite/gcc.target/arm/pr83712.c
+++ b/gcc/testsuite/gcc.target/arm/pr83712.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
/* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
#pragma GCC optimize ("-O2")
diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
index b6211f9..5080d2c 100644
--- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
+++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
@@ -2,6 +2,7 @@
/* { dg-skip-if "instruction not valid on thumb" { *-*-* } { "-mthumb" } { "" } } */
/* { dg-do assemble } */
/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99 -marm" } */
#pragma GCC target ("arch=armv6")
diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c b/gcc/testsuite/gcc.target/arm/scd42-1.c
index be60e64..2b8fc0b 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-1.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
unsigned load1(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c b/gcc/testsuite/gcc.target/arm/scd42-2.c
index 6d9e5e1..3c9768d 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-2.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-options "-mcpu=xscale -O -marm" } */
unsigned load2(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c b/gcc/testsuite/gcc.target/arm/scd42-3.c
index e566cb2..0afd121 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-3.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
unsigned load4(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 60d68f4..fe520e0 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4103,13 +4103,25 @@ proc check_effective_target_arm_fp16_hw { } {
# /* { dg-require-effective-target arm_arch_v5t_multilib } */
foreach { armfunc armflag armdefs } {
v4 "-march=armv4 -marm" __ARM_ARCH_4__
- v4t "-march=armv4t" __ARM_ARCH_4T__
- v5t "-march=armv5t" __ARM_ARCH_5T__
- v5te "-march=armv5te" __ARM_ARCH_5TE__
- v6 "-march=armv6" __ARM_ARCH_6__
- v6k "-march=armv6k" __ARM_ARCH_6K__
+ v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
+ v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
+ v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
+ v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
+ v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
+ v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
+ v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
+ v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
+ v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
+ v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
+ v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
+ v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
+ v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
+ v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
+ v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
v6z "-march=armv6z" __ARM_ARCH_6Z__
+ v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
+ v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
v7a "-march=armv7-a" __ARM_ARCH_7A__
v7r "-march=armv7-r" __ARM_ARCH_7R__
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
2019-09-06 17:44 ` Christophe Lyon
@ 2019-09-09 8:38 ` Christophe Lyon
0 siblings, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-09-09 8:38 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 30037 bytes --]
On Fri, 6 Sep 2019 at 19:43, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> On Fri, 6 Sep 2019 at 11:09, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> >
> > On Fri, 6 Sep 2019 at 10:28, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
> > >
> > >
> > > On 9/6/19 9:01 AM, Christophe Lyon wrote:
> > > > On Fri, 19 Jul 2019 at 11:00, Kyrill Tkachov
> > > > <kyrylo.tkachov@foss.arm.com> wrote:
> > > >>
> > > >> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > > >>> Since FDPIC currently supports arm and thumb-2 modes only, these tests
> > > >>> fail because they enforce an architecture version that doesn't match
> > > >>> these restrictions.
> > > >>>
> > > >>> This patch introduces new values for the arm_arch effective-target
> > > >>> (v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
> > > >>> needed, and adds them to the relevant tests. It also adds the
> > > >>> corresponding non-thumb effective-target to the tests that were
> > > >>> missing it.
> > > >>>
> > > >>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > > >>>
> > > >>> * lib/target-supports.exp
> > > >>> (check_effective_target_arm_arch_FUNC_ok): Add v4t_thumb,
> > > >>> v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb.
> > > >>> * gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
> > > >>> effective-target.
> > > >>> * gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
> > > >>> * gcc.target/arm/attr_arm-err.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv4-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv4t-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv5t-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv5te-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6k-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6z-arm.c: Likewise.
> > > >>> * gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
> > > >>> * gcc.target/arm/g2.c: Likewise.
> > > >>> * gcc.target/arm/macro_defs1.c: Likewise.
> > > >>> * gcc.target/arm/pr59858.c: Likewise.
> > > >>> * gcc.target/arm/pr65647-2.c: Likewise.
> > > >>> * gcc.target/arm/pr79058.c: Likewise.
> > > >>> * gcc.target/arm/pr83712.c: Likewise.
> > > >>> * gcc.target/arm/pragma_arch_switch_2.c: Likewise.
> > > >>> * gcc.target/arm/scd42-1.c: Likewise.
> > > >>> * gcc.target/arm/scd42-2.c: Likewise.
> > > >>> * gcc.target/arm/scd42-3.c: Likewise.
> > > >>> * gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
> > > >>>
> > > >> Ok.
> > > >>
> > > >> This looks like a good improvement on its own.
> > > >>
> > > > Sigh, after more testing I found problems :(
> > > >
> > > >> Thanks,
> > > >>
> > > >> Kyrill
> > > >>
> > > >>
> > > >>
> > > >>> Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > > >>> b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > > >>> index d144b70..4e695cd 100644
> > > >>> --- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > > >>> +++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
> > > >>> @@ -1,4 +1,4 @@
> > > >>> -/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target
> > > >>> arm*-*-* } } */
> > > >>> /* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } {
> > > >>> "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
> > > >>> /* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" {
> > > >>> target arm*-*-* } } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > > >>> b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > > >>> index 88528f1..886a012 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6k" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> > > >>> /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
> > > >>> /* { dg-add-options arm_arch_v6k } */
> > > >>>
> > > > For instance on arm-linux-gnueabihf (thus defaulting to float-abi=hard),
> > > > arm_arch_v6k_thumb fails (because it tries to use thumb-1 + hard-float
> > > > which is not supported),
> > > > while the test itself would add -mfloat-abi=softfp, thus using a
> > > > supported configuration.
> > > >
> > > > Is there a way to pass an argument to an effective-target directive?
> > > > (current, if one adds an argument, it's the target selector)
> > > >
> > > > Or shall I add other effective-targets, eg arm_arch_v6k_thumb_softfp_ok?
> > >
> > > Sigh, at this point I'm thinking maybe we should have a
> > > arm_arch_v6k_thumb target that basically assumes/forces softfp.
> > >
> >
> > Sure, I can add:
> > + v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
> > instead of
> > + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> > as the original patch does.
> >
> > But isn't there a risk of conflict on toolchains configured for
> > hard-float or testcases enforcing it?
> > And... I suppose I should to the same for v4t_thumb, v5t_thumb,
> > v5te_thumb, v6_thumb and v6z_thumb?
> >
> > I see that v6m/v8m_base already forces float-abi=soft....
> >
> > Christophe
> >
> >
> How about the attached?
> It forces -mfloat-abi=softfp on thumb arches that support thumb1 only,
> and introduces _arm effective targets for those testcases which
> actually force -marm.
>
Sorry for another iteration...
This updated update is a cleanup of the previous one:
- removes useless additions of -mfloat-abi in testcases since it's now
implied by the effective-targets
- fix effective target of di-longlong64-sync-withldrexd.c to avoid
skipping it when not needed
- removes the early check for the presence of -marm in the flags when
checking the effective targets arm_arch: checking if -marm alone is
supported does not work when GCC is configured to default to
M-profile, and all the arm_arch effective targets that include -marm
also include -march anyway, so that combination is supported even when
defaulting to M-profile.
Unfortunately, all of these recent changes are not really related to
FDPIC.... do you want me to try & split the patch?
Thanks,
Christophe
> Thanks
>
> Christophe
>
> >
> > > Thanks,
> > >
> > > Kyrill
> > >
> > >
> > > >
> > > > Christophe
> > > >
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > > >>> b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > > >>> index e1ed1c1..2eeb522 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
> > > >>> @@ -2,6 +2,7 @@
> > > >>> Verify that unaligned_access is correctly with attribute target. */
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> > > >>> /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
> > > >>> /* { dg-add-options arm_arch_v6 } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > > >>> b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > > >>> index 630c06a..d410056 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
> > > >>> @@ -2,6 +2,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-require-effective-target arm_arm_ok } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6-m" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > > >>> /* { dg-add-options arm_arch_v6m } */
> > > >>>
> > > >>> int __attribute__((target("arm")))
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > > >>> index 4b48ef8..447a8ec 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv4" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v4_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v4 } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > > >>> index 016506f..05db533 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv4t" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v4t_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v4t } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > > >>> index 9ef944e..78878f7 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv4t" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v4t } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > > >>> index a9403e9..bea25d09 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv5t" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5t_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v5t } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > > >>> index f3ad07e..b25d17d 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv5t" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v5t } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > > >>> index f98c01a..7b37c7f 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv5te" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v5te } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > > >>> index 5d71787..27a64a2 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv5te" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v5te } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > > >>> index 88a5089..bfab765 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v6 } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > > >>> index 90ef9d2..15a6d75 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v6 } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > > >>> index 8de021a..721c9f9 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6k" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6k_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v6k } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > > >>> index c2fc270..b3b6ecf 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6k" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v6k } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > > >>> index ee075e2..27f71be 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6-m" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v6m } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > > >>> index 83b4bc4..259d2b5 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6t2" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v6t2 } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > > >>> index 1a1cbc5..e624ec5 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6t2" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6t2_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v6t2 } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > > >>> index e2df0d4..66380bf 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6z" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6z_ok } */
> > > >>> /* { dg-options "-marm" } */
> > > >>> /* { dg-add-options arm_arch_v6z } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > > >>> b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > > >>> index e4b94ef..23a4fcd 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6z" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
> > > >>> /* { dg-options "-mthumb" } */
> > > >>> /* { dg-add-options arm_arch_v6z } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/g2.c
> > > >>> b/gcc/testsuite/gcc.target/arm/g2.c
> > > >>> index e368017..da68c8b 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/g2.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/g2.c
> > > >>> @@ -4,6 +4,7 @@
> > > >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > > >>> "-march=*" } { "-march=xscale" } } */
> > > >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > > >>> "-mcpu=*" } { "-mcpu=xscale" } } */
> > > >>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > > >>> /* { dg-require-effective-target arm32 } */
> > > >>>
> > > >>> /* Brett Gaines' test case. */
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > > >>> b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > > >>> index 4cc9ae6..655ba93 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-march=*" } { "-march=armv6-m" } } */
> > > >>> /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } {
> > > >>> "-marm" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6m_ok } */
> > > >>> /* { dg-options "-march=armv6-m -mthumb" } */
> > > >>>
> > > >>> #ifdef __ARM_NEON_FP
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c
> > > >>> b/gcc/testsuite/gcc.target/arm/pr59858.c
> > > >>> index a944b9a..bcfd5d5 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/pr59858.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/pr59858.c
> > > >>> @@ -1,6 +1,7 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb
> > > >>> -fno-stack-protector -Os -fno-tree-loop-optimize
> > > >>> -fno-tree-dominator-opts -fPIC -w" } */
> > > >>> /* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft
> > > >>> -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
> > > >>>
> > > >>> typedef enum {
> > > >>> REG_ENOSYS = -1,
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > > >>> b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > > >>> index f2985f8..3d9e75f 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
> > > >>> @@ -1,4 +1,5 @@
> > > >>> /* { dg-do compile } */
> > > >>> +/* { dg-require-effective-target arm_arch_v6_ok } */
> > > >>> /* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
> > > >>>
> > > >>> typedef struct {
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c
> > > >>> b/gcc/testsuite/gcc.target/arm/pr79058.c
> > > >>> index 54a1d8a..7d078ac 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/pr79058.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/pr79058.c
> > > >>> @@ -1,5 +1,6 @@
> > > >>> /* { dg-do compile } */
> > > >>> /* { dg-require-effective-target arm_arm_ok } */
> > > >>> +/* { dg-require-effective-target arm_arch_v4_ok } */
> > > >>> /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } {
> > > >>> "-mcpu=arm7tdmi" } } */
> > > >>> /* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c
> > > >>> b/gcc/testsuite/gcc.target/arm/pr83712.c
> > > >>> index 8ed8cdf..4902ec9 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/pr83712.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/pr83712.c
> > > >>> @@ -1,4 +1,5 @@
> > > >>> /* { dg-do compile } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> > > >>> /* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
> > > >>> #pragma GCC optimize ("-O2")
> > > >>>
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > > >>> b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > > >>> index b6211f9..c3361e7 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
> > > >>> @@ -2,6 +2,7 @@
> > > >>> /* { dg-skip-if "instruction not valid on thumb" { *-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> /* { dg-do assemble } */
> > > >>> /* { dg-require-effective-target arm_arm_ok } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > > >>> /* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99
> > > >>> -marm" } */
> > > >>>
> > > >>> #pragma GCC target ("arch=armv6")
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c
> > > >>> b/gcc/testsuite/gcc.target/arm/scd42-1.c
> > > >>> index be60e64..2b8fc0b 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/scd42-1.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
> > > >>> @@ -3,6 +3,7 @@
> > > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> > > >>> "-march=*" } { "-march=xscale" } } */
> > > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> > > >>> } { "-mcpu=xscale" } } */
> > > >>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> > > >>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > > >>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> > > >>>
> > > >>> unsigned load1(void) __attribute__ ((naked));
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c
> > > >>> b/gcc/testsuite/gcc.target/arm/scd42-2.c
> > > >>> index 6d9e5e1..4181a75 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/scd42-2.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
> > > >>> @@ -4,6 +4,7 @@
> > > >>> /* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
> > > >>> "-mcpu=*" } { "-mcpu=xscale" } } */
> > > >>> /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
> > > >>> "-mthumb" } { "" } } */
> > > >>> /* { dg-require-effective-target arm32 } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > > >>> /* { dg-options "-mcpu=xscale -O -marm" } */
> > > >>>
> > > >>> unsigned load2(void) __attribute__ ((naked));
> > > >>> diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c
> > > >>> b/gcc/testsuite/gcc.target/arm/scd42-3.c
> > > >>> index e566cb2..0afd121 100644
> > > >>> --- a/gcc/testsuite/gcc.target/arm/scd42-3.c
> > > >>> +++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
> > > >>> @@ -3,6 +3,7 @@
> > > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
> > > >>> "-march=*" } { "-march=xscale" } } */
> > > >>> /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
> > > >>> } { "-mcpu=xscale" } } */
> > > >>> /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } {
> > > >>> "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
> > > >>> +/* { dg-require-effective-target arm_arch_v5te_ok } */
> > > >>> /* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
> > > >>>
> > > >>> unsigned load4(void) __attribute__ ((naked));
> > > >>> diff --git a/gcc/testsuite/lib/target-supports.exp
> > > >>> b/gcc/testsuite/lib/target-supports.exp
> > > >>> index 60d68f4..3f091c5 100644
> > > >>> --- a/gcc/testsuite/lib/target-supports.exp
> > > >>> +++ b/gcc/testsuite/lib/target-supports.exp
> > > >>> @@ -4104,12 +4104,18 @@ proc check_effective_target_arm_fp16_hw { } {
> > > >>> foreach { armfunc armflag armdefs } {
> > > >>> v4 "-march=armv4 -marm" __ARM_ARCH_4__
> > > >>> v4t "-march=armv4t" __ARM_ARCH_4T__
> > > >>> + v4t_thumb "-march=armv4t -mthumb" __ARM_ARCH_4T__
> > > >>> v5t "-march=armv5t" __ARM_ARCH_5T__
> > > >>> + v5t_thumb "-march=armv5t -mthumb" __ARM_ARCH_5T__
> > > >>> v5te "-march=armv5te" __ARM_ARCH_5TE__
> > > >>> + v5te_thumb "-march=armv5te -mthumb" __ARM_ARCH_5TE__
> > > >>> v6 "-march=armv6" __ARM_ARCH_6__
> > > >>> + v6_thumb "-march=armv6 -mthumb" __ARM_ARCH_6__
> > > >>> v6k "-march=armv6k" __ARM_ARCH_6K__
> > > >>> + v6k_thumb "-march=armv6k -mthumb" __ARM_ARCH_6K__
> > > >>> v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
> > > >>> v6z "-march=armv6z" __ARM_ARCH_6Z__
> > > >>> + v6z_thumb "-march=armv6z -mthumb" __ARM_ARCH_6Z__
> > > >>> v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
> > > >>> v7a "-march=armv7-a" __ARM_ARCH_7A__
> > > >>> v7r "-march=armv7-r" __ARM_ARCH_7R__
> > > >>> --
> > > >>> 2.6.3
> > > >>>
[-- Attachment #2: patch-20-skip-tests-not-supported-by-fdpic-v2 --]
[-- Type: application/octet-stream, Size: 24889 bytes --]
commit 877f6843db04866ac8aed51dffd8a792f1f0b173
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Fri Jul 13 15:04:31 2018 +0000
[ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC
Since FDPIC currently supports arm and thumb-2 modes only, these tests
fail because they enforce an architecture version that doesn't match
these restrictions.
This patch introduces new values for the arm_arch effective-target
(v4t_thumb, v5t_thumb, v5te_thumb, v6_thumb, v6k_thumb, v6z_thumb) as
needed, and adds them to the relevant tests. In addition, it adds
v4t_arm, v5t_arm, v5te_arm, v6_arm, v6k_arm and v6z_arm to avoid
skipping some tests when GCC is configured to generate Thumb code by
default.
It also adds the corresponding non-thumb effective-target to the tests
that were missing it.
The existing v4t, v5t, v5te, v6 v6k and v6z effective-targets now force
-mfloat-abi=softfp since these thumb-1 targets do not support
hard-float anyway.
Finally, the patch removes the special case to detect the presence of
-marm in the flags, since it makes atomic_loaddi tests unsupported:
since the flags in question also include -march, the combination is
supported, while -marm alone is not if GCC is configured to target an
M-profile CPU.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_arm_arch_FUNC_ok): Add v4t_arm, v4t_thumb,
v5t_arm, v5t_thumb, v5te_arm, v5te_thumb, v6_arm, v6_thumb,
v6k_arm, v6k_thumb, v6z_arm, v6z_thumb.
Add -mfloat-abi=softfp to v4t, v5t, v5te, v6, v6k, v6z.
Remove early exit for -marm.
* gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
effective-target.
* gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
* gcc.target/arm/ftest-armv4-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5t-arm.c: Likewise.
* gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5te-arm.c: Likewise.
* gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6-arm.c: Likewise.
* gcc.target/arm/ftest-armv6-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6k-arm.c: Likewise.
* gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
* gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6z-arm.c: Likewise.
* gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
* gcc.target/arm/g2.c: Likewise.
* gcc.target/arm/macro_defs1.c: Likewise.
* gcc.target/arm/pr59858.c: Likewise.
* gcc.target/arm/pr65647-2.c: Likewise.
* gcc.target/arm/pr79058.c: Likewise.
* gcc.target/arm/pr83712.c: Likewise.
* gcc.target/arm/pragma_arch_switch_2.c: Likewise.
* gcc.target/arm/scd42-1.c: Likewise.
* gcc.target/arm/scd42-2.c: Likewise.
* gcc.target/arm/scd42-3.c: Likewise.
* gcc.c-torture/compile/pr82096.c: Fix arm_arch effective-target.
* gcc.target/arm/attr_arm-err.c: Likewise.
* gcc.target/arm/di-longlong64-sync-withldrexd.c: Likewise.
Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
index d144b70..4e695cd 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr82096.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_arch_v5t_ok { target arm*-*-* } } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok { target arm*-*-* } } */
/* { dg-skip-if "Do not combine float-abi values" { arm*-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
/* { dg-additional-options "-march=armv5t -mthumb -mfloat-abi=soft" { target arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
index 88528f1..886a012 100644
--- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
/* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
index e1ed1c1..2eeb522 100644
--- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
@@ -2,6 +2,7 @@
Verify that unaligned_access is correctly with attribute target. */
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
/* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
index 630c06a..67d572a 100644
--- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
+++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
@@ -1,7 +1,7 @@
/* Check that attribute target arm is rejected for M profile. */
/* { dg-do compile } */
-/* { dg-require-effective-target arm_arm_ok } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-add-options arm_arch_v6m } */
int __attribute__((target("arm")))
diff --git a/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withldrexd.c b/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withldrexd.c
index 517c4a8..befb7ec 100644
--- a/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withldrexd.c
+++ b/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withldrexd.c
@@ -1,7 +1,6 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_arm_ok } */
/* { dg-options "-marm -std=gnu99" } */
-/* { dg-require-effective-target arm_arch_v6k_ok } */
+/* { dg-require-effective-target arm_arch_v6k_arm_ok } */
/* { dg-add-options arm_arch_v6k } */
/* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "fetch_and_nand" { target *-*-* } 0 } */
/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "nand_and_fetch" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
index 4b48ef8..447a8ec 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v4 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
index 016506f..28fd2f7 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4t_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v4t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
index 9ef944e..78878f7 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v4t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
index a9403e9..8191299 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5t_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v5t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
index f3ad07e..b25d17d 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v5t } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
index f98c01a..e0c0d5c 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v5te } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
index 5d71787..27a64a2 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v5te } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
index 88a5089..5d447c3 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
index 90ef9d2..15a6d75 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
index 8de021a..0656e8f 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
index c2fc270..b3b6ecf 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6k_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6k } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
index ee075e2..27f71be 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6m } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
index 83b4bc4..259d2b5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6t2 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
index 1a1cbc5..e624ec5 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6t2 } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
index e2df0d4..6e3a966 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6z_arm_ok } */
/* { dg-options "-marm" } */
/* { dg-add-options arm_arch_v6z } */
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
index e4b94ef..23a4fcd 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6z_thumb_ok } */
/* { dg-options "-mthumb" } */
/* { dg-add-options arm_arch_v6z } */
diff --git a/gcc/testsuite/gcc.target/arm/g2.c b/gcc/testsuite/gcc.target/arm/g2.c
index e368017..ca5e3cc 100644
--- a/gcc/testsuite/gcc.target/arm/g2.c
+++ b/gcc/testsuite/gcc.target/arm/g2.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-require-effective-target arm32 } */
/* Brett Gaines' test case. */
diff --git a/gcc/testsuite/gcc.target/arm/macro_defs1.c b/gcc/testsuite/gcc.target/arm/macro_defs1.c
index 4cc9ae6..655ba93 100644
--- a/gcc/testsuite/gcc.target/arm/macro_defs1.c
+++ b/gcc/testsuite/gcc.target/arm/macro_defs1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
/* { dg-options "-march=armv6-m -mthumb" } */
#ifdef __ARM_NEON_FP
diff --git a/gcc/testsuite/gcc.target/arm/pr59858.c b/gcc/testsuite/gcc.target/arm/pr59858.c
index a944b9a..bcfd5d5 100644
--- a/gcc/testsuite/gcc.target/arm/pr59858.c
+++ b/gcc/testsuite/gcc.target/arm/pr59858.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=armv5te -fno-builtin -mfloat-abi=soft -mthumb -fno-stack-protector -Os -fno-tree-loop-optimize -fno-tree-dominator-opts -fPIC -w" } */
/* { dg-skip-if "Incompatible command line options: -mfloat-abi=soft -mfloat-abi=hard" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-require-effective-target arm_arch_v5te_thumb_ok } */
typedef enum {
REG_ENOSYS = -1,
diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c b/gcc/testsuite/gcc.target/arm/pr65647-2.c
index f2985f8..e3978e5 100644
--- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
+++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v6_arm_ok } */
/* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
typedef struct {
diff --git a/gcc/testsuite/gcc.target/arm/pr79058.c b/gcc/testsuite/gcc.target/arm/pr79058.c
index 54a1d8a..7d078ac 100644
--- a/gcc/testsuite/gcc.target/arm/pr79058.c
+++ b/gcc/testsuite/gcc.target/arm/pr79058.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=arm7tdmi" } } */
/* { dg-options "-Os -mbig-endian -marm -mcpu=arm7tdmi" } */
diff --git a/gcc/testsuite/gcc.target/arm/pr83712.c b/gcc/testsuite/gcc.target/arm/pr83712.c
index 8ed8cdf..4902ec9 100644
--- a/gcc/testsuite/gcc.target/arm/pr83712.c
+++ b/gcc/testsuite/gcc.target/arm/pr83712.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
/* { dg-options "-mfloat-abi=softfp -mthumb -march=armv5t -O2" } */
#pragma GCC optimize ("-O2")
diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
index b6211f9..5080d2c 100644
--- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
+++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
@@ -2,6 +2,7 @@
/* { dg-skip-if "instruction not valid on thumb" { *-*-* } { "-mthumb" } { "" } } */
/* { dg-do assemble } */
/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-additional-options "-Wall -O2 -march=armv5te -std=gnu99 -marm" } */
#pragma GCC target ("arch=armv6")
diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c b/gcc/testsuite/gcc.target/arm/scd42-1.c
index be60e64..2b8fc0b 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-1.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
unsigned load1(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/gcc.target/arm/scd42-2.c b/gcc/testsuite/gcc.target/arm/scd42-2.c
index 6d9e5e1..3c9768d 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-2.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-2.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_arch_v5te_arm_ok } */
/* { dg-options "-mcpu=xscale -O -marm" } */
unsigned load2(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c b/gcc/testsuite/gcc.target/arm/scd42-3.c
index e566cb2..0afd121 100644
--- a/gcc/testsuite/gcc.target/arm/scd42-3.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
unsigned load4(void) __attribute__ ((naked));
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 60d68f4..4566d8c 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4103,13 +4103,25 @@ proc check_effective_target_arm_fp16_hw { } {
# /* { dg-require-effective-target arm_arch_v5t_multilib } */
foreach { armfunc armflag armdefs } {
v4 "-march=armv4 -marm" __ARM_ARCH_4__
- v4t "-march=armv4t" __ARM_ARCH_4T__
- v5t "-march=armv5t" __ARM_ARCH_5T__
- v5te "-march=armv5te" __ARM_ARCH_5TE__
- v6 "-march=armv6" __ARM_ARCH_6__
- v6k "-march=armv6k" __ARM_ARCH_6K__
+ v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
+ v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
+ v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
+ v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
+ v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
+ v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
+ v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
+ v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
+ v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
+ v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
+ v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
+ v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
+ v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
+ v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
+ v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
- v6z "-march=armv6z" __ARM_ARCH_6Z__
+ v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
+ v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
+ v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
v7a "-march=armv7-a" __ARM_ARCH_7A__
v7r "-march=armv7-r" __ARM_ARCH_7R__
@@ -4126,10 +4138,6 @@ foreach { armfunc armflag armdefs } {
v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
proc check_effective_target_arm_arch_FUNC_ok { } {
- if { [ string match "*-marm*" "FLAG" ] &&
- ![check_effective_target_arm_arm_ok] } {
- return 0
- }
return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
#if !(DEFS)
#error !(DEFS)
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support.
2019-09-04 20:03 ` Christophe Lyon
@ 2019-09-09 8:54 ` Christophe Lyon
0 siblings, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-09-09 8:54 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 9438 bytes --]
On Wed, 4 Sep 2019 at 22:03, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>
> On Wed, 4 Sep 2019 at 16:16, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
> >
> > Hi Christophe,
> >
> > On 5/15/19 1:39 PM, Christophe Lyon wrote:
> > > Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
> > > TLS_IE32_FDPIC.
> > >
> > > We do not support the GNU2 TLS dialect.
> > >
> > > 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> > > Mickaël Guêné <mickael.guene@st.com>
> > >
> > > gcc/
> > > * config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
> > > TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
> > > (arm_call_tls_get_addr): Add FDPIC support.
> > > (legitimize_tls_address): Likewise.
> > > (arm_emit_tls_decoration): Likewise.
> > >
> > > Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a
> > >
> > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> > > index 99d13bf..5fc7a20 100644
> > > --- a/gcc/config/arm/arm.c
> > > +++ b/gcc/config/arm/arm.c
> > > @@ -2379,9 +2379,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
> > >
> > > enum tls_reloc {
> > > TLS_GD32,
> > > + TLS_GD32_FDPIC,
> > > TLS_LDM32,
> > > + TLS_LDM32_FDPIC,
> > > TLS_LDO32,
> > > TLS_IE32,
> > > + TLS_IE32_FDPIC,
> > > TLS_LE32,
> > > TLS_DESCSEQ /* GNU scheme */
> > > };
> > > @@ -8760,20 +8763,34 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx
> > > *valuep, int reloc)
> > > gcc_assert (reloc != TLS_DESCSEQ);
> > > start_sequence ();
> > >
> > > - labelno = GEN_INT (pic_labelno++);
> > > - label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > > UNSPEC_PIC_LABEL);
> > > - label = gen_rtx_CONST (VOIDmode, label);
> > > + if (TARGET_FDPIC)
> > > + {
> > > + sum = gen_rtx_UNSPEC (Pmode,
> > > + gen_rtvec (2, x, GEN_INT (reloc)),
> > > + UNSPEC_TLS);
> > > + }
> > > + else
> > > + {
> > > + labelno = GEN_INT (pic_labelno++);
> > > + label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > > UNSPEC_PIC_LABEL);
> > > + label = gen_rtx_CONST (VOIDmode, label);
> > >
> > > - sum = gen_rtx_UNSPEC (Pmode,
> > > - gen_rtvec (4, x, GEN_INT (reloc), label,
> > > - GEN_INT (TARGET_ARM ? 8 : 4)),
> > > - UNSPEC_TLS);
> > > + sum = gen_rtx_UNSPEC (Pmode,
> > > + gen_rtvec (4, x, GEN_INT (reloc), label,
> > > + GEN_INT (TARGET_ARM ? 8 : 4)),
> > > + UNSPEC_TLS);
> > > + }
> > > reg = load_tls_operand (sum, reg);
> > >
> > > - if (TARGET_ARM)
> > > - emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
> > > + if (TARGET_FDPIC)
> > > + {
> > > + emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode,
> > > FDPIC_REGNUM)));
> > > + }
> >
> > No {} around single statement.
> >
> > > else
> > > - emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > > + if (TARGET_ARM)
> > > + emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
> >
> >
> > Merge that "if" with the "else" in an "else if"
> >
> > > + else
> > > + emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > >
> > > *valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX,
> > > LCT_PURE, /* LCT_CONST? */
> > > @@ -8808,6 +8825,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
> > > return reg;
> > > }
> > >
> > > +
> > > rtx
> > > legitimize_tls_address (rtx x, rtx reg)
> > > {
> > > @@ -8820,6 +8838,9 @@ legitimize_tls_address (rtx x, rtx reg)
> > > case TLS_MODEL_GLOBAL_DYNAMIC:
> > > if (TARGET_GNU2_TLS)
> > > {
> > > + if (TARGET_FDPIC)
> > > + gcc_unreachable();
> > > +
> >
> > Use gcc_assert (TARGET_FDPIC)
> >
> >
> > > reg = arm_tls_descseq_addr (x, reg);
> > >
> > > tp = arm_load_tp (NULL_RTX);
> > > @@ -8829,7 +8850,10 @@ legitimize_tls_address (rtx x, rtx reg)
> > > else
> > > {
> > > /* Original scheme */
> > > - insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
> > > + if (TARGET_FDPIC)
> > > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
> > > + else
> > > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
> > > dest = gen_reg_rtx (Pmode);
> > > emit_libcall_block (insns, dest, ret, x);
> > > }
> > > @@ -8838,6 +8862,9 @@ legitimize_tls_address (rtx x, rtx reg)
> > > case TLS_MODEL_LOCAL_DYNAMIC:
> > > if (TARGET_GNU2_TLS)
> > > {
> > > + if (TARGET_FDPIC)
> > > + gcc_unreachable();
> > > +
> >
> > Likewise.
> >
> > Ok with those changes.
>
> Thanks, here is the updated version, with the initialization of labelno in
> call_tls_get_addr moved from patch 4/21.
>
There was an obvious mistake in the previous update: the attached
version inverts the assert condition to:
gcc_assert (!TARGET_FDPIC);
>
> >
> > Thanks,
> >
> > Kyrill
> >
> >
> > > reg = arm_tls_descseq_addr (x, reg);
> > >
> > > tp = arm_load_tp (NULL_RTX);
> > > @@ -8846,7 +8873,10 @@ legitimize_tls_address (rtx x, rtx reg)
> > > }
> > > else
> > > {
> > > - insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
> > > + if (TARGET_FDPIC)
> > > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
> > > + else
> > > + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
> > >
> > > /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
> > > share the LDM result with other LD model accesses. */
> > > @@ -8865,23 +8895,35 @@ legitimize_tls_address (rtx x, rtx reg)
> > > return dest;
> > >
> > > case TLS_MODEL_INITIAL_EXEC:
> > > - labelno = GEN_INT (pic_labelno++);
> > > - label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > > UNSPEC_PIC_LABEL);
> > > - label = gen_rtx_CONST (VOIDmode, label);
> > > - sum = gen_rtx_UNSPEC (Pmode,
> > > - gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
> > > - GEN_INT (TARGET_ARM ? 8 : 4)),
> > > - UNSPEC_TLS);
> > > - reg = load_tls_operand (sum, reg);
> > > -
> > > - if (TARGET_ARM)
> > > - emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
> > > - else if (TARGET_THUMB2)
> > > - emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
> > > + if (TARGET_FDPIC)
> > > + {
> > > + sum = gen_rtx_UNSPEC (Pmode,
> > > + gen_rtvec (2, x, GEN_INT
> > > (TLS_IE32_FDPIC)),
> > > + UNSPEC_TLS);
> > > + reg = load_tls_operand (sum, reg);
> > > + emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode,
> > > FDPIC_REGNUM)));
> > > + emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
> > > + }
> > > else
> > > {
> > > - emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > > - emit_move_insn (reg, gen_const_mem (SImode, reg));
> > > + labelno = GEN_INT (pic_labelno++);
> > > + label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno),
> > > UNSPEC_PIC_LABEL);
> > > + label = gen_rtx_CONST (VOIDmode, label);
> > > + sum = gen_rtx_UNSPEC (Pmode,
> > > + gen_rtvec (4, x, GEN_INT (TLS_IE32),
> > > label,
> > > + GEN_INT (TARGET_ARM ? 8 : 4)),
> > > + UNSPEC_TLS);
> > > + reg = load_tls_operand (sum, reg);
> > > +
> > > + if (TARGET_ARM)
> > > + emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
> > > + else if (TARGET_THUMB2)
> > > + emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg,
> > > labelno));
> > > + else
> > > + {
> > > + emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
> > > + emit_move_insn (reg, gen_const_mem (SImode, reg));
> > > + }
> > > }
> > >
> > > tp = arm_load_tp (NULL_RTX);
> > > @@ -28218,15 +28260,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x)
> > > case TLS_GD32:
> > > fputs ("(tlsgd)", fp);
> > > break;
> > > + case TLS_GD32_FDPIC:
> > > + fputs ("(tlsgd_fdpic)", fp);
> > > + break;
> > > case TLS_LDM32:
> > > fputs ("(tlsldm)", fp);
> > > break;
> > > + case TLS_LDM32_FDPIC:
> > > + fputs ("(tlsldm_fdpic)", fp);
> > > + break;
> > > case TLS_LDO32:
> > > fputs ("(tlsldo)", fp);
> > > break;
> > > case TLS_IE32:
> > > fputs ("(gottpoff)", fp);
> > > break;
> > > + case TLS_IE32_FDPIC:
> > > + fputs ("(gottpoff_fdpic)", fp);
> > > + break;
> > > case TLS_LE32:
> > > fputs ("(tpoff)", fp);
> > > break;
> > > --
> > > 2.6.3
> > >
[-- Attachment #2: 10-ARM-FDPIC-Implement-TLS-support.patch --]
[-- Type: text/x-patch, Size: 6408 bytes --]
commit 481d4161a6cdf88091cd2fef7ee7fe6b8a836d18
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date: Thu Feb 8 14:42:05 2018 +0100
[ARM] FDPIC: Implement TLS support.
Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.
We do not support the GNU2 TLS dialect.
2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
gcc/
* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
(arm_call_tls_get_addr): Add FDPIC support.
(legitimize_tls_address): Likewise.
(arm_emit_tls_decoration): Likewise.
Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8930ff2..724edea 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2379,9 +2379,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
enum tls_reloc {
TLS_GD32,
+ TLS_GD32_FDPIC,
TLS_LDM32,
+ TLS_LDM32_FDPIC,
TLS_LDO32,
TLS_IE32,
+ TLS_IE32_FDPIC,
TLS_LE32,
TLS_DESCSEQ /* GNU scheme */
};
@@ -8742,22 +8745,33 @@ load_tls_operand (rtx x, rtx reg)
static rtx_insn *
arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
{
- rtx label, labelno, sum;
+ rtx label, labelno = NULL_RTX, sum;
gcc_assert (reloc != TLS_DESCSEQ);
start_sequence ();
- labelno = GEN_INT (pic_labelno++);
- label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- label = gen_rtx_CONST (VOIDmode, label);
+ if (TARGET_FDPIC)
+ {
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (reloc)),
+ UNSPEC_TLS);
+ }
+ else
+ {
+ labelno = GEN_INT (pic_labelno++);
+ label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ label = gen_rtx_CONST (VOIDmode, label);
- sum = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (4, x, GEN_INT (reloc), label,
- GEN_INT (TARGET_ARM ? 8 : 4)),
- UNSPEC_TLS);
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (4, x, GEN_INT (reloc), label,
+ GEN_INT (TARGET_ARM ? 8 : 4)),
+ UNSPEC_TLS);
+ }
reg = load_tls_operand (sum, reg);
- if (TARGET_ARM)
+ if (TARGET_FDPIC)
+ emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+ else if (TARGET_ARM)
emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
else
emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
@@ -8795,6 +8809,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
return reg;
}
+
rtx
legitimize_tls_address (rtx x, rtx reg)
{
@@ -8807,6 +8822,8 @@ legitimize_tls_address (rtx x, rtx reg)
case TLS_MODEL_GLOBAL_DYNAMIC:
if (TARGET_GNU2_TLS)
{
+ gcc_assert (!TARGET_FDPIC);
+
reg = arm_tls_descseq_addr (x, reg);
tp = arm_load_tp (NULL_RTX);
@@ -8816,7 +8833,10 @@ legitimize_tls_address (rtx x, rtx reg)
else
{
/* Original scheme */
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
+ if (TARGET_FDPIC)
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
+ else
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
dest = gen_reg_rtx (Pmode);
emit_libcall_block (insns, dest, ret, x);
}
@@ -8825,6 +8845,8 @@ legitimize_tls_address (rtx x, rtx reg)
case TLS_MODEL_LOCAL_DYNAMIC:
if (TARGET_GNU2_TLS)
{
+ gcc_assert (!TARGET_FDPIC);
+
reg = arm_tls_descseq_addr (x, reg);
tp = arm_load_tp (NULL_RTX);
@@ -8833,7 +8855,10 @@ legitimize_tls_address (rtx x, rtx reg)
}
else
{
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
+ if (TARGET_FDPIC)
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
+ else
+ insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
share the LDM result with other LD model accesses. */
@@ -8852,23 +8877,35 @@ legitimize_tls_address (rtx x, rtx reg)
return dest;
case TLS_MODEL_INITIAL_EXEC:
- labelno = GEN_INT (pic_labelno++);
- label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
- label = gen_rtx_CONST (VOIDmode, label);
- sum = gen_rtx_UNSPEC (Pmode,
- gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
- GEN_INT (TARGET_ARM ? 8 : 4)),
- UNSPEC_TLS);
- reg = load_tls_operand (sum, reg);
-
- if (TARGET_ARM)
- emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
- else if (TARGET_THUMB2)
- emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
+ if (TARGET_FDPIC)
+ {
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (TLS_IE32_FDPIC)),
+ UNSPEC_TLS);
+ reg = load_tls_operand (sum, reg);
+ emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+ emit_move_insn (reg, gen_rtx_MEM (Pmode, reg));
+ }
else
{
- emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
- emit_move_insn (reg, gen_const_mem (SImode, reg));
+ labelno = GEN_INT (pic_labelno++);
+ label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+ label = gen_rtx_CONST (VOIDmode, label);
+ sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
+ GEN_INT (TARGET_ARM ? 8 : 4)),
+ UNSPEC_TLS);
+ reg = load_tls_operand (sum, reg);
+
+ if (TARGET_ARM)
+ emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
+ else if (TARGET_THUMB2)
+ emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
+ else
+ {
+ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+ emit_move_insn (reg, gen_const_mem (SImode, reg));
+ }
}
tp = arm_load_tp (NULL_RTX);
@@ -28205,15 +28242,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x)
case TLS_GD32:
fputs ("(tlsgd)", fp);
break;
+ case TLS_GD32_FDPIC:
+ fputs ("(tlsgd_fdpic)", fp);
+ break;
case TLS_LDM32:
fputs ("(tlsldm)", fp);
break;
+ case TLS_LDM32_FDPIC:
+ fputs ("(tlsldm_fdpic)", fp);
+ break;
case TLS_LDO32:
fputs ("(tlsldo)", fp);
break;
case TLS_IE32:
fputs ("(gottpoff)", fp);
break;
+ case TLS_IE32_FDPIC:
+ fputs ("(gottpoff_fdpic)", fp);
+ break;
case TLS_LE32:
fputs ("(tpoff)", fp);
break;
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
2019-09-05 9:03 ` Kyrill Tkachov
@ 2019-09-09 8:58 ` Christophe Lyon
0 siblings, 0 replies; 109+ messages in thread
From: Christophe Lyon @ 2019-09-09 8:58 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: Christophe Lyon, gcc-patches
On Thu, 5 Sep 2019 at 11:03, Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
>
> Hi Christophe,
>
> On 9/5/19 9:30 AM, Christophe Lyon wrote:
> > On Thu, 29 Aug 2019 at 17:32, Kyrill Tkachov
> > <kyrylo.tkachov@foss.arm.com> wrote:
> >> Hi Christophe,
> >>
> >> On 5/15/19 1:39 PM, Christophe Lyon wrote:
> >>> Without this, when we are unwinding across a signal frame we can jump
> >>> to an even address which leads to an exception.
> >>>
> >>> This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
> >>> PC from the signal frame since the PC saved by the kernel has the LSB
> >>> bit set to zero.
> >>>
> >>> 2019-XX-XX Christophe Lyon <christophe.lyon@st.com>
> >>> Mickaël Guêné <mickael.guene@st.com>
> >>>
> >>> libgcc/
> >>> * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
> >>> architecture.
> >>>
> >>> Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea
> >>>
> >>> diff --git a/libgcc/config/arm/unwind-arm.c
> >>> b/libgcc/config/arm/unwind-arm.c
> >>> index 9ba73e7..ba47150 100644
> >>> --- a/libgcc/config/arm/unwind-arm.c
> >>> +++ b/libgcc/config/arm/unwind-arm.c
> >>> @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set
> >>> (_Unwind_Context *context,
> >>> return _UVRSR_FAILED;
> >>>
> >>> vrs->core.r[regno] = *(_uw *) valuep;
> >>> +#if defined(__ARM_ARCH_7M__)
> >>> + /* Force LSB bit since we always run thumb code. */
> >>> + if (regno == 15)
> >>> + vrs->core.r[regno] |= 1;
> >>> +#endif
> >> Hmm, this looks quite specific. There are other architectures that are
> >> thumb-only too (6-M, 7E-M etc).
> >>
> >> Would checking for __thumb__ be better?
> >>
> > Right.
> > The attached updated patch also uses R_PC instead of 15.
>
>
> Looks ok to me but we'll need to make sure this doesn't break non-FDPIC
> targets now.
>
> A bootstrap and test of an arm-none-linux-gnueabihf targeting thumb
> should do it.
>
Bootstrap of the whole series OK, modulo the problems with the tests
discussed in patch 20.
(some tests became unsupported on arm-linux-gnueabihf with thumb target)
Christophe
> Thanks,
>
> Kyrill
>
>
> >
> > Christophe
> >
> >> Thanks,
> >>
> >> Kyrill
> >>
> >>
> >>> return _UVRSR_OK;
> >>>
> >>> case _UVRSC_VFP:
> >>> --
> >>> 2.6.3
> >>>
^ permalink raw reply [flat|nested] 109+ messages in thread
end of thread, other threads:[~2019-09-09 8:58 UTC | newest]
Thread overview: 109+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-15 12:40 [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
2019-05-15 12:40 ` [ARM/FDPIC v5 01/21] [ARM] FDPIC: Add -mfdpic option support Christophe Lyon
2019-07-16 10:18 ` Richard Sandiford
2019-08-29 15:08 ` Christophe Lyon
2019-08-30 10:06 ` Richard Sandiford
2019-05-15 12:41 ` [ARM/FDPIC v5 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture Christophe Lyon
2019-07-16 12:33 ` Richard Sandiford
2019-08-20 17:13 ` Christophe Lyon
2019-08-29 15:39 ` Christophe Lyon
2019-09-02 16:12 ` Richard Sandiford
2019-09-02 20:04 ` Christophe Lyon
2019-09-03 8:40 ` Richard Sandiford
2019-09-04 19:59 ` Christophe Lyon
2019-09-05 8:03 ` Richard Sandiford
2019-05-15 12:41 ` [ARM/FDPIC v5 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided Christophe Lyon
2019-05-15 13:55 ` Szabolcs Nagy
2019-05-15 14:37 ` Rich Felker
2019-05-15 15:12 ` Christophe Lyon
2019-05-15 15:37 ` Rich Felker
2019-05-15 15:59 ` Szabolcs Nagy
2019-05-15 16:07 ` Rich Felker
2019-05-21 15:29 ` Christophe Lyon
2019-05-21 15:48 ` Rich Felker
2019-05-22 8:39 ` Szabolcs Nagy
2019-05-22 8:45 ` Christophe Lyon
2019-05-23 12:45 ` Christophe Lyon
2019-07-16 10:38 ` Richard Sandiford
2019-07-16 20:00 ` Rich Felker
2019-08-01 10:13 ` Christophe Lyon
2019-08-06 14:28 ` Richard Sandiford
2019-08-29 15:14 ` Christophe Lyon
2019-08-30 9:40 ` Richard Sandiford
2019-05-15 12:41 ` [ARM/FDPIC v5 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts Christophe Lyon
2019-07-12 7:44 ` Richard Sandiford
2019-07-12 13:25 ` Christophe Lyon
2019-07-12 13:28 ` Richard Sandiford
2019-08-29 15:14 ` Christophe Lyon
2019-08-30 9:30 ` Richard Sandiford
2019-08-30 14:48 ` Christophe Lyon
2019-08-30 15:15 ` Richard Sandiford
2019-09-02 7:51 ` Christophe Lyon
2019-09-02 8:31 ` Richard Sandiford
2019-08-30 14:40 ` Jonathan Wakely
2019-05-15 12:41 ` [ARM/FDPIC v5 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation Christophe Lyon
2019-07-12 6:49 ` Richard Sandiford
2019-07-12 14:25 ` Christophe Lyon
2019-08-29 15:39 ` Christophe Lyon
2019-08-30 8:41 ` Richard Sandiford
2019-05-15 12:42 ` [ARM/FDPIC v5 06/21] [ARM] FDPIC: Add support for c++ exceptions Christophe Lyon
2019-08-30 9:31 ` Kyrill Tkachov
2019-08-30 14:44 ` Jonathan Wakely
2019-05-15 12:42 ` [ARM/FDPIC v5 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only Christophe Lyon
2019-07-16 10:42 ` Kyrill Tkachov
2019-05-15 12:43 ` [ARM/FDPIC v5 08/21] [ARM] FDPIC: Enforce local/global binding for function descriptors Christophe Lyon
2019-07-16 10:51 ` Kyrill Tkachov
2019-05-15 12:43 ` [ARM/FDPIC v5 10/21] [ARM] FDPIC: Implement TLS support Christophe Lyon
2019-09-04 14:16 ` Kyrill Tkachov
2019-09-04 20:03 ` Christophe Lyon
2019-09-09 8:54 ` Christophe Lyon
2019-05-15 12:43 ` [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function Christophe Lyon
2019-07-16 11:53 ` Kyrill Tkachov
2019-07-16 13:31 ` Kyrill Tkachov
2019-07-31 14:48 ` Christophe Lyon
2019-08-29 15:40 ` Christophe Lyon
2019-08-30 8:54 ` Kyrill Tkachov
2019-05-15 12:44 ` [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Christophe Lyon
2019-08-29 15:40 ` Christophe Lyon
2019-08-29 15:44 ` Kyrill Tkachov
2019-05-15 12:44 ` [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame Christophe Lyon
2019-09-04 14:19 ` Kyrill Tkachov
2019-05-15 12:44 ` [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Christophe Lyon
2019-08-29 15:37 ` Kyrill Tkachov
2019-09-05 8:30 ` Christophe Lyon
2019-09-05 8:32 ` Christophe Lyon
2019-09-05 20:56 ` Ian Lance Taylor
2019-09-05 9:03 ` Kyrill Tkachov
2019-09-09 8:58 ` Christophe Lyon
2019-05-15 12:45 ` [ARM/FDPIC v5 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests Christophe Lyon
2019-07-19 8:52 ` Kyrill Tkachov
2019-05-15 12:45 ` [ARM/FDPIC v5 16/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode Christophe Lyon
2019-07-19 8:56 ` Kyrill Tkachov
2019-05-15 12:45 ` [ARM/FDPIC v5 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns Christophe Lyon
2019-07-19 8:54 ` Kyrill Tkachov
2019-05-15 12:46 ` [ARM/FDPIC v5 17/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux* Christophe Lyon
2019-07-19 8:57 ` Kyrill Tkachov
2019-07-22 19:37 ` Mike Stump
2019-05-15 12:46 ` [ARM/FDPIC v5 18/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets Christophe Lyon
2019-07-19 8:59 ` Kyrill Tkachov
2019-07-22 19:50 ` Mike Stump
2019-05-15 12:46 ` [ARM/FDPIC v5 19/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc Christophe Lyon
2019-07-19 9:00 ` Kyrill Tkachov
2019-05-15 12:47 ` [ARM/FDPIC v5 20/21] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC Christophe Lyon
2019-07-19 9:03 ` Kyrill Tkachov
2019-09-06 8:01 ` Christophe Lyon
2019-09-06 8:28 ` Kyrill Tkachov
2019-09-06 9:10 ` Christophe Lyon
2019-09-06 17:44 ` Christophe Lyon
2019-09-09 8:38 ` Christophe Lyon
2019-05-15 12:47 ` [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns Christophe Lyon
2019-07-19 9:40 ` Kyrill Tkachov
2019-05-23 12:46 ` [ARM/FDPIC v5 00/21] FDPIC ABI for ARM Christophe Lyon
2019-06-04 12:57 ` Christophe Lyon
2019-06-06 12:36 ` Christophe Lyon
2019-06-17 11:42 ` Christophe Lyon
2019-07-01 12:16 ` Christophe Lyon
2019-07-08 14:28 ` Christophe Lyon
2019-07-16 9:13 ` Christophe Lyon
2019-08-29 14:54 ` Christophe Lyon
2019-08-29 16:29 ` Christophe Lyon
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