From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by sourceware.org (Postfix) with ESMTPS id 44D4C38515DC for ; Mon, 10 May 2021 12:44:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 44D4C38515DC Received: by mail-pg1-x531.google.com with SMTP id m190so13252927pga.2 for ; Mon, 10 May 2021 05:44:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/aj4QAvAx5SbQa19rtNIUA/iHIDk3Xf2rK3/TM5G4IY=; b=TSX0O+ddv/4Jr/JOWYtNacpf4LzYpimcsADofCgvNtbNa/BFe05qqyYW/Ax7+fE362 2FUteoXMmGGS5pGIFzAcOls4jYBg8uWfw42aznRh72bhkpckygziMkB8FRz/OQrROy+C yPL+a24ta87uaW8KynRGFbd4AhhlXpVt0Z2yDAq1YsAWQOapFdSGbwPPhPX9LfryWQH1 wAogJ2Fe+VR4M8vRD81AtDkSIYXy7N+a3E8zIzoJpkA8KOIveqUOmW+FdA7zgviqZ+qV +zDvo4qHgTFtPYAFwCToQ/P1Fc4Ghcbl9lXHxLLMg843eVowmj6FO/Rrg/+0TN2fhuYR r10g== X-Gm-Message-State: AOAM531SC5hPFJU6ORu8QvwOouvdwB3JL4ySHTvidzDFOXfnpxC1WE3H eKOSUfIDyX97DDXKgsKxyM29D/Ih2UXZEkEqgfn2Nw== X-Google-Smtp-Source: ABdhPJyyDPALuciafre3OHlIzZcePhIWeV9o5Kh08kn5MjOaTciCgRTAtio9wZ0XILO/e0pym8al7bCJRoMBrVWYNco= X-Received: by 2002:a63:210b:: with SMTP id h11mr24324920pgh.196.1620650644191; Mon, 10 May 2021 05:44:04 -0700 (PDT) MIME-Version: 1.0 References: <1619791589-511-1-git-send-email-christophe.lyon@linaro.org> In-Reply-To: From: Christophe Lyon Date: Mon, 10 May 2021 14:43:53 +0200 Message-ID: Subject: Re: [PATCH] testsuite/arm: Add mve-vmul-scalar-1.c test To: Kyrylo Tkachov Cc: "gcc-patches@gcc.gnu.org" , Victor Do Nascimento Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 May 2021 12:44:07 -0000 On Mon, 10 May 2021 at 13:50, Kyrylo Tkachov wrote: > > > > > -----Original Message----- > > From: Gcc-patches On Behalf Of > > Christophe Lyon via Gcc-patches > > Sent: 30 April 2021 15:06 > > To: gcc-patches@gcc.gnu.org > > Subject: [PATCH] testsuite/arm: Add mve-vmul-scalar-1.c test > > > > Support for vmul has been present for a while, but it was lacking a > > test for the scalar variant. > > > > This patch adds one, precisely noting that we do not yet use the T2 > > variants of vmul, which take a scalar as final argument. > > Ok. Thanks > Thanks, I think the vmul-by-scalar code generation is something Victor is working on. Ack, good to know, that's on my list too :-) I asked a question about vadd-with-scalar last week on IRC, wondering how/if the vectorizer could actually take advantage of vadd qX, qY, rZ, since ISTM that it only checks if a vector add with the same 3 (vector) types is available. I guess the same applies to vmul-by-scalar? > Kyrill > > > > > 2021-04-22 Christophe Lyon > > > > gcc/testsuite/ > > * gcc.target/arm/simd/mve-vmul-scalar-1: New. > > --- > > .../gcc.target/arm/simd/mve-vmul-scalar-1.c | 60 > > ++++++++++++++++++++++ > > 1 file changed, 60 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vmul-scalar- > > 1.c > > > > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vmul-scalar-1.c > > b/gcc/testsuite/gcc.target/arm/simd/mve-vmul-scalar-1.c > > new file mode 100644 > > index 0000000..22be452 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vmul-scalar-1.c > > @@ -0,0 +1,60 @@ > > +/* { dg-do compile } */ > > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > > +/* { dg-add-options arm_v8_1m_mve_fp } */ > > +/* { dg-additional-options "-O3" } */ > > + > > +#include > > + > > +#define FUNC_IMM(SIGN, TYPE, BITS, NB, OP, NAME) \ > > + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * > > __restrict__ dest, \ > > + TYPE##BITS##_t *a) { \ > > + int i; \ > > + for (i=0; i > + dest[i] = a[i] OP 5; \ > > + } \ > > +} > > + > > +/* 128-bit vectors. */ > > +FUNC_IMM(s, int, 32, 4, *, vmulimm) > > +FUNC_IMM(u, uint, 32, 4, *, vmulimm) > > +FUNC_IMM(s, int, 16, 8, *, vmulimm) > > +FUNC_IMM(u, uint, 16, 8, *, vmulimm) > > +FUNC_IMM(s, int, 8, 16, *, vmulimm) > > +FUNC_IMM(u, uint, 8, 16, *, vmulimm) > > + > > +/* For the moment we do not select the T2 vmul variant operating on a > > scalar > > + final argument. */ > > +/* { dg-final { scan-assembler-times {vmul\.i32\tq[0-9]+, q[0-9]+, r[0-9]+} 2 > > { xfail *-*-* } } } */ > > +/* { dg-final { scan-assembler-times {vmul\.i16\tq[0-9]+, q[0-9]+, r[0-9]+} 2 > > { xfail *-*-* } } } */ > > +/* { dg-final { scan-assembler-times {vmul\.i8\tq[0-9]+, q[0-9]+, r[0-9]+} 2 > > { xfail *-*-* } } } */ > > + > > +void test_vmul_f32 (float * dest, float * a, float * b) { > > + int i; > > + for (i=0; i<4; i++) { > > + dest[i] = a[i] * b[1]; > > + } > > +} > > +void test_vmulimm_f32 (float * dest, float * a) { > > + int i; > > + for (i=0; i<4; i++) { > > + dest[i] = a[i] * 5.0; > > + } > > +} > > +/* { dg-final { scan-assembler-times {vmul\.f32\tq[0-9]+, q[0-9]+, r[0-9]+} 2 > > { xfail *-*-* } } } */ > > + > > +void test_vmul_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { > > + int i; > > + for (i=0; i<8; i++) { > > + dest[i] = a[i] * b[i]; > > + } > > +} > > + > > +/* Note that dest[i] = a[i] * 5.0f16 is not vectorized. */ > > +void test_vmulimm_f16 (__fp16 * dest, __fp16 * a) { > > + int i; > > + __fp16 b = 5.0f16; > > + for (i=0; i<8; i++) { > > + dest[i] = a[i] * b; > > + } > > +} > > +/* { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, r[0-9]+} 2 > > { xfail *-*-* } } } */ > > -- > > 2.7.4 >