From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 72480 invoked by alias); 25 Aug 2015 13:25:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 71254 invoked by uid 89); 25 Aug 2015 13:25:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-qg0-f51.google.com Received: from mail-qg0-f51.google.com (HELO mail-qg0-f51.google.com) (209.85.192.51) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 25 Aug 2015 13:25:37 +0000 Received: by qgj62 with SMTP id 62so105926558qgj.2 for ; Tue, 25 Aug 2015 06:25:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=EWjd8n+QNDpYTwvN5XdELQVREirQLONxUBHKn9diHh8=; b=QOINYgVhytMHk6gEUsEgKmEJpZYeXB3v6LuSYgridE0yCIkdUJPdUwBF0W1b8xhVNn QH5/6jltS/Hzt/3Xyl93FqhfDV778AVt/u+fjyz2Bo3AQB+BGjgt8UOGefeoicICeLf+ 043buSi0cT27TAZ2mpSQEI8OCxw216fkaO6KSU4lD/sWmpXabWUg3nF49EwlR92jz1Qj iV0TXYEoiKDhl+pRM04szW+V8XurrVviMFOeJ5Td75lb+m7i3vsAVuLvMk6V66T1mzTd CQ5DnsKr+JLUsVNzkhkTxXRXis1tLL1gO9O2PtoNtjIeYCLvsU2RIDcCXsxukscIrd0l hasA== X-Gm-Message-State: ALoCoQnKYEGVa8p2AlZndxj/u27fGC6RwIIMBNk93IddwptXOqni3nCYF29xDN344vsfB2eSoF7O MIME-Version: 1.0 X-Received: by 10.140.237.204 with SMTP id i195mr70081097qhc.93.1440509135474; Tue, 25 Aug 2015 06:25:35 -0700 (PDT) Received: by 10.140.96.226 with HTTP; Tue, 25 Aug 2015 06:25:35 -0700 (PDT) In-Reply-To: <55B766FA.6000608@arm.com> References: <55B765DF.4040706@arm.com> <55B766FA.6000608@arm.com> Date: Tue, 25 Aug 2015 13:27:00 -0000 Message-ID: Subject: Re: [PATCH 13/15][ARM/AArch64 Testsuite] Add float16 tests to advsimd-intrinsics testsuite From: Christophe Lyon To: Alan Lawrence Cc: "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2015-08/txt/msg01496.txt.bz2 On 28 July 2015 at 13:26, Alan Lawrence wrote: > This is a respin of > https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00488.html, fixing up the > testsuite for float16 vectors. Relative to the previous version, most of the > additions to the tests are now within #if..#endif such that they are only > compiled if we have a scalar __fp16 type (the exception is hfloat16_t: since > this is actually an integer type, we can define and use it without any > compiler fp16 support). Also we try to use add_options_for_arm_neon_fp16 > for all tests (on ARM targets), falling back to add_options_for_arm_neon if > the previous fails. > > Cross-tested on many multilibs, including -march=armv6, > -march=armv7-a{,-mfpu=neon-fp16}, -march=armv7-a/-mfpu=neon, > -march=armv7-a/-mfp16-format=none{,/-mfpu=neon-fp16,/-mfpu=neon}, > -march=armv7-a/-mfp16-format=alternative . > Hi Alan, It looks OK. Did you also run the tests on AArch64? > Note that on bigendian, this requires path at > https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00696.html , which I will > commit at the same time. > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp: > Set additional_flags for neon-fp16 if supported, else fallback to > neon. > > * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h > (hfloat16_t): New. > (result, expected, clean_results, DECL_VARIABLE_64BITS_VARIANTS, > DECL_VARIABLE_128BITS_VARIANTS): Add float16x4_t and float16x8_t > cases > if supported. > (CHECK_RESULTS): Redefine using CHECK_RESULTS_NAMED. > (CHECK_RESULTS_NAMED): Move body to CHECK_RESULTS_NAMED_NO_FP16; > redefine in terms of CHECK_RESULTS_NAMED_NO_FP16 with float16 > variants > when those are supported. > (CHECK_RESULTS_NAMED_NO_FP16, CHECK_RESULTS_NO_FP16): New. > (vdup_n_f16): New. > > * gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h (buffer, > buffer_pad, buffer_dup, buffer_dup_pad): Add float16x4 and > float16x8_t > cases if supported. > > * gcc.target/aarch64/advsimd-intrinsics/vbsl.c (exec_vbsl): > Use CHECK_RESULTS_NO_FP16 in place of CHECK_RESULTS. > * gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c > (exec_vdup_vmov): > Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c > (exec_vdup_lane): > Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vext.c (exec_vext): > Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vcombine.c (expected): > Add float16x8_t case. > (main, exec_vcombine): test float16x4_t -> float16x8_t, if > supported. > * gcc.target/aarch64/advsimd-intrinsics/vcreate.c (expected, > main, exec_vcreate): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vget_high (expected, > exec_vget_high): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vget_low.c (expected, > exec_vget_low): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vld1.c (expected, > exec_vld1): > Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vld1_dup.c (expected, > exec_vld1_dup): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vld1_lane.c (expected, > exec_vld1_lane): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vldX.c (expected, > exec_vldX): > Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c (expected, > exec_vldX_dup): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c (expected, > exec_vldX_lane): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vset_lane.c (expected, > exec_vset_lane): Likewise. > * gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c (expected, > exec_vst1_lane): Likewise.