From: Christophe Lyon <christophe.lyon@linaro.org>
To: Tamar Christina <Tamar.Christina@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
nd <nd@arm.com>,
Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
"nickc@redhat.com" <nickc@redhat.com>,
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
Subject: Re: [committed][PATCH][GCC][testsuite][Arm] fix testism, add required option after require.
Date: Mon, 14 Jan 2019 13:46:00 -0000 [thread overview]
Message-ID: <CAKdteObhesBBO1nf-UpxoOa8CC9n1PL1HB1bODzVL_Zz7n-2=A@mail.gmail.com> (raw)
In-Reply-To: <20190111142246.GA5706@arm.com>
Hi Tamar,
On Fri, 11 Jan 2019 at 15:22, Tamar Christina <Tamar.Christina@arm.com> wrote:
>
> Hi All,
>
> The test declared the fp16 requirement, but didn't add the options causing it to
> fail when the target doesn't have it on by default.
>
> Bootstrapped Regtested on arm-none-Linux-gnueabihf and no issues.
>
> committed under the gcc obvious rules.
>
> Thanks,
> Tamar
>
> gcc/testsuite/ChangeLog:
>
> 2019-01-11 Tamar Christina <tamar.christina@arm.com>
>
> * gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: Require neon
> and add options.
>
Thanks for this patch.
However, the scan-assembler-times part of the test still fail on armeb:
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[0\\], #0
3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[0\\],
#180 3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[0\\],
#270 3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[0\\], #90
3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[1\\], #0
1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[1\\],
#180 1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[1\\],
#270 1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\td[0-9]+, d[0-9]+, d[0-9]+\\[1\\], #90
1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[0\\], #0
3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[0\\],
#180 3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[0\\],
#270 3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[0\\], #90
3
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[1\\], #0
1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[1\\],
#180 1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[1\\],
#270 1
gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c -O0
scan-assembler-times vcmla.f16\\tq[0-9]+, q[0-9]+, d[0-9]+\\[1\\], #90
1
But you are probably already aware of that.
Christophe
> --
next prev parent reply other threads:[~2019-01-14 13:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-11 14:22 Tamar Christina
2019-01-14 13:46 ` Christophe Lyon [this message]
2019-01-15 7:06 ` Tamar Christina
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