From: Christophe Lyon <christophe.lyon@linaro.org>
To: Tejas Belagod <tejas.belagod@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [[ARM/AArch64][testsuite] 28/36] Add vmnv tests.
Date: Tue, 20 Jan 2015 15:36:00 -0000 [thread overview]
Message-ID: <CAKdteObybkf5fJRtkFg+jS_yfe+BV=11c81xUS5MvXOgTHnGNg@mail.gmail.com> (raw)
In-Reply-To: <54B95812.3010703@arm.com>
[-- Attachment #1: Type: text/plain, Size: 499 bytes --]
On 16 January 2015 at 19:27, Tejas Belagod <tejas.belagod@arm.com> wrote:
>> +VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
>> + 0x3333, 0x3333, 0x3333, 0x3333 };
>> +VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
>> + 0x33333333, 0x33333333 };
>> +
>
>
> No float or poly16 for vmvn_*.
>
Updated as attached, removed 64x1 and 64x2 too.
> Otherwise, LGTM.
>
> Tejas.
>
>
[-- Attachment #2: 0028-Add-vmnv-tests.patch --]
[-- Type: text/x-patch, Size: 5799 bytes --]
From f4902098b0379fd445ceda7d2202b93f56c6129f Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Wed, 10 Dec 2014 23:07:25 +0100
Subject: [[ARM/AArch64][testsuite] 28/36] Add vmnv tests.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmvn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmvn.c
new file mode 100644
index 0000000..268a707
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmvn.c
@@ -0,0 +1,137 @@
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results. */
+VECT_VAR_DECL(expected,int,8,8) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8 };
+VECT_VAR_DECL(expected,int,16,4) [] = { 0xf, 0xe, 0xd, 0xc };
+VECT_VAR_DECL(expected,int,32,2) [] = { 0xf, 0xe };
+VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8 };
+VECT_VAR_DECL(expected,uint,16,4) [] = { 0xf, 0xe, 0xd, 0xc };
+VECT_VAR_DECL(expected,uint,32,2) [] = { 0xf, 0xe };
+VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8 };
+VECT_VAR_DECL(expected,int,8,16) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8,
+ 0x7, 0x6, 0x5, 0x4,
+ 0x3, 0x2, 0x1, 0x0 };
+VECT_VAR_DECL(expected,int,16,8) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8 };
+VECT_VAR_DECL(expected,int,32,4) [] = { 0xf, 0xe, 0xd, 0xc };
+VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8,
+ 0x7, 0x6, 0x5, 0x4,
+ 0x3, 0x2, 0x1, 0x0 };
+VECT_VAR_DECL(expected,uint,16,8) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8 };
+VECT_VAR_DECL(expected,uint,32,4) [] = { 0xf, 0xe, 0xd, 0xc };
+VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf, 0xe, 0xd, 0xc,
+ 0xb, 0xa, 0x9, 0x8,
+ 0x7, 0x6, 0x5, 0x4,
+ 0x3, 0x2, 0x1, 0x0 };
+
+#define INSN_NAME vmvn
+#define TEST_MSG "VMVN/VMVNQ"
+
+#define FNNAME1(NAME) void exec_ ## NAME (void)
+#define FNNAME(NAME) FNNAME1(NAME)
+
+FNNAME (INSN_NAME)
+{
+ /* Basic test: y=OP(x), then store the result. */
+#define TEST_UNARY_OP1(INSN, Q, T1, T2, W, N) \
+ VECT_VAR(vector_res, T1, W, N) = \
+ INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
+ vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
+
+#define TEST_UNARY_OP(INSN, Q, T1, T2, W, N) \
+ TEST_UNARY_OP1(INSN, Q, T1, T2, W, N) \
+
+ /* No need for 64 bits variants. */
+ DECL_VARIABLE(vector, int, 8, 8);
+ DECL_VARIABLE(vector, int, 16, 4);
+ DECL_VARIABLE(vector, int, 32, 2);
+ DECL_VARIABLE(vector, uint, 8, 8);
+ DECL_VARIABLE(vector, uint, 16, 4);
+ DECL_VARIABLE(vector, uint, 32, 2);
+ DECL_VARIABLE(vector, poly, 8, 8);
+ DECL_VARIABLE(vector, int, 8, 16);
+ DECL_VARIABLE(vector, int, 16, 8);
+ DECL_VARIABLE(vector, int, 32, 4);
+ DECL_VARIABLE(vector, uint, 8, 16);
+ DECL_VARIABLE(vector, uint, 16, 8);
+ DECL_VARIABLE(vector, uint, 32, 4);
+ DECL_VARIABLE(vector, poly, 8, 16);
+
+ DECL_VARIABLE(vector_res, int, 8, 8);
+ DECL_VARIABLE(vector_res, int, 16, 4);
+ DECL_VARIABLE(vector_res, int, 32, 2);
+ DECL_VARIABLE(vector_res, uint, 8, 8);
+ DECL_VARIABLE(vector_res, uint, 16, 4);
+ DECL_VARIABLE(vector_res, uint, 32, 2);
+ DECL_VARIABLE(vector_res, poly, 8, 8);
+ DECL_VARIABLE(vector_res, int, 8, 16);
+ DECL_VARIABLE(vector_res, int, 16, 8);
+ DECL_VARIABLE(vector_res, int, 32, 4);
+ DECL_VARIABLE(vector_res, uint, 8, 16);
+ DECL_VARIABLE(vector_res, uint, 16, 8);
+ DECL_VARIABLE(vector_res, uint, 32, 4);
+ DECL_VARIABLE(vector_res, poly, 8, 16);
+
+ clean_results ();
+
+ /* Initialize input "vector" from "buffer". */
+ VLOAD(vector, buffer, , int, s, 8, 8);
+ VLOAD(vector, buffer, , int, s, 16, 4);
+ VLOAD(vector, buffer, , int, s, 32, 2);
+ VLOAD(vector, buffer, , uint, u, 8, 8);
+ VLOAD(vector, buffer, , uint, u, 16, 4);
+ VLOAD(vector, buffer, , uint, u, 32, 2);
+ VLOAD(vector, buffer, , poly, p, 8, 8);
+ VLOAD(vector, buffer, q, int, s, 8, 16);
+ VLOAD(vector, buffer, q, int, s, 16, 8);
+ VLOAD(vector, buffer, q, int, s, 32, 4);
+ VLOAD(vector, buffer, q, uint, u, 8, 16);
+ VLOAD(vector, buffer, q, uint, u, 16, 8);
+ VLOAD(vector, buffer, q, uint, u, 32, 4);
+ VLOAD(vector, buffer, q, poly, p, 8, 16);
+
+ /* Apply a unary operator named INSN_NAME. */
+ TEST_UNARY_OP(INSN_NAME, , int, s, 8, 8);
+ TEST_UNARY_OP(INSN_NAME, , int, s, 16, 4);
+ TEST_UNARY_OP(INSN_NAME, , int, s, 32, 2);
+ TEST_UNARY_OP(INSN_NAME, , uint, u, 8, 8);
+ TEST_UNARY_OP(INSN_NAME, , uint, u, 16, 4);
+ TEST_UNARY_OP(INSN_NAME, , uint, u, 32, 2);
+ TEST_UNARY_OP(INSN_NAME, , poly, p, 8, 8);
+ TEST_UNARY_OP(INSN_NAME, q, int, s, 8, 16);
+ TEST_UNARY_OP(INSN_NAME, q, int, s, 16, 8);
+ TEST_UNARY_OP(INSN_NAME, q, int, s, 32, 4);
+ TEST_UNARY_OP(INSN_NAME, q, uint, u, 8, 16);
+ TEST_UNARY_OP(INSN_NAME, q, uint, u, 16, 8);
+ TEST_UNARY_OP(INSN_NAME, q, uint, u, 32, 4);
+ TEST_UNARY_OP(INSN_NAME, q, poly, p, 8, 16);
+
+ CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
+ CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
+ CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
+ CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
+ CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
+ CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
+ CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
+ CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
+ CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
+ CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
+ CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
+ CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
+ CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
+ CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
+}
+
+int main (void)
+{
+ exec_vmvn ();
+ return 0;
+}
--
2.1.0
next prev parent reply other threads:[~2015-01-20 15:33 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-13 15:19 [[ARM/AArch64][testsuite] 00/36] More Neon intrinsics tests Christophe Lyon
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 14/36] Add vqdmlal and vqdmlsl tests Christophe Lyon
2015-01-16 16:45 ` Tejas Belagod
2015-01-19 14:11 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 03/36] Add vmax, vmin, vhadd, vhsub and vrhadd tests Christophe Lyon
2015-01-16 14:08 ` Tejas Belagod
2015-01-16 16:23 ` Christophe Lyon
2015-01-16 17:20 ` Marcus Shawcroft
2015-01-16 17:59 ` Christophe Lyon
2015-01-19 13:34 ` Marcus Shawcroft
2015-01-19 15:49 ` Christophe Lyon
2015-01-19 17:33 ` Marcus Shawcroft
2015-01-21 16:35 ` Christophe Lyon
2015-01-22 12:37 ` Tejas Belagod
2015-01-22 14:42 ` Christophe Lyon
2015-01-22 15:58 ` Tejas Belagod
2015-01-22 23:10 ` Christophe Lyon
2015-01-23 11:02 ` Tejas Belagod
2015-01-23 12:08 ` Christophe Lyon
2015-01-23 15:21 ` Christophe Lyon
2015-01-25 22:51 ` Christophe Lyon
2015-01-26 13:23 ` Tejas Belagod
2015-01-26 13:57 ` Christophe Lyon
2015-02-02 10:39 ` Christophe Lyon
2015-02-02 15:38 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 01/36] Add explicit dependency on Neon Cumulative Saturation flag (QC) Christophe Lyon
2015-01-16 13:43 ` Tejas Belagod
2015-01-16 17:15 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 22/36] Add vmovn tests Christophe Lyon
2015-01-16 18:21 ` Tejas Belagod
2015-01-19 14:44 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 09/36] Add vsubhn, vraddhn and vrsubhn tests. Split vaddhn.c into vXXXhn.inc and vaddhn.c to share code with other new tests Christophe Lyon
2015-01-16 16:21 ` Tejas Belagod
2015-01-16 16:35 ` Christophe Lyon
2015-01-20 15:30 ` Christophe Lyon
2015-01-26 14:03 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 04/36] Add vld1_lane tests Christophe Lyon
2015-01-16 14:31 ` Tejas Belagod
2015-01-16 16:31 ` Christophe Lyon
2015-01-16 17:22 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 20/36] Add vsubw tests, putting most of the code in common with vaddw through vXXWw.inc Christophe Lyon
2015-01-16 18:16 ` Tejas Belagod
2015-01-19 14:41 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 28/36] Add vmnv tests Christophe Lyon
2015-01-16 18:39 ` Tejas Belagod
2015-01-20 15:36 ` Christophe Lyon [this message]
2015-01-26 14:30 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 12/36] Add vmlal_n and vmlsl_n tests Christophe Lyon
2015-01-16 16:29 ` Tejas Belagod
2015-01-19 13:54 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 07/36] Add vmla_lane and vmls_lane tests Christophe Lyon
2015-01-16 15:57 ` Tejas Belagod
2015-01-19 13:43 ` Marcus Shawcroft
2015-01-21 0:02 ` Christophe Lyon
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 31/36] Add vqdmulh tests Christophe Lyon
2015-01-19 16:46 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 06/36] Add vmla and vmls tests Christophe Lyon
2015-01-16 15:52 ` Tejas Belagod
2015-01-16 16:32 ` Christophe Lyon
2015-01-19 13:42 ` Marcus Shawcroft
2015-01-20 22:23 ` Christophe Lyon
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 02/36] Be more verbose, and actually confirm that a test was checked Christophe Lyon
2015-01-16 13:46 ` Tejas Belagod
2015-01-16 17:17 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 25/36] Add vmull tests Christophe Lyon
2015-01-16 18:26 ` Tejas Belagod
2015-01-19 15:34 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 32/36] Add vqdmulh_lane tests Christophe Lyon
2015-01-19 16:47 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 23/36] Add vmul_lane tests Christophe Lyon
2015-01-16 18:23 ` Tejas Belagod
2015-01-19 15:17 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 30/36] Add vpaddl tests Christophe Lyon
2015-01-16 18:48 ` Tejas Belagod
2015-01-16 19:05 ` Christophe Lyon
2015-01-16 20:34 ` Christophe Lyon
2015-01-20 15:50 ` Christophe Lyon
2015-01-26 14:47 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 08/36] Add vtrn tests. Refactor vzup and vzip tests Christophe Lyon
2015-01-16 16:06 ` Tejas Belagod
2015-01-16 18:12 ` Christophe Lyon
2015-01-19 13:52 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 27/36] Add vmull_n tests Christophe Lyon
2015-01-16 18:32 ` Tejas Belagod
2015-01-19 15:35 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 29/36] Add vpadal tests Christophe Lyon
2015-01-16 18:41 ` Tejas Belagod
2015-01-20 15:39 ` Christophe Lyon
2015-01-26 14:34 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 16/36] Add vqdmlal_n and vqdmlsl_n tests Christophe Lyon
2015-01-16 17:26 ` Tejas Belagod
2015-01-19 14:14 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 15/36] Add vqdmlal_lane and vqdmlsl_lane tests Christophe Lyon
2015-01-16 16:52 ` Tejas Belagod
2015-01-19 14:13 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 24/36] Add vmul_n tests Christophe Lyon
2015-01-16 18:24 ` Tejas Belagod
2015-01-19 15:23 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 33/36] Add vqdmulh_n tests Christophe Lyon
2015-01-19 16:48 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 11/36] Add vmlal_lane and vmlsl_lane tests Christophe Lyon
2015-01-16 16:23 ` Tejas Belagod
2015-01-19 13:53 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 26/36] Add vmull_lane tests Christophe Lyon
2015-01-16 18:28 ` Tejas Belagod
2015-01-19 15:35 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 13/36] Add vmla_n and vmls_n tests Christophe Lyon
2015-01-16 16:30 ` Tejas Belagod
2015-01-20 15:33 ` Christophe Lyon
2015-01-26 14:08 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 05/36] Add vldX_dup test Christophe Lyon
2015-01-16 15:35 ` Tejas Belagod
2015-01-16 18:17 ` Christophe Lyon
2015-01-19 13:39 ` Marcus Shawcroft
2015-01-22 16:32 ` Tejas Belagod
2015-01-22 22:23 ` Christophe Lyon
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 21/36] Add vmovl tests Christophe Lyon
2015-01-16 18:18 ` Tejas Belagod
2015-01-20 15:35 ` Christophe Lyon
2015-01-26 14:19 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 34/36] Add vqdmull tests Christophe Lyon
2015-01-19 16:52 ` Marcus Shawcroft
2015-01-13 15:19 ` [[ARM/AArch64][testsuite] 18/36] Add vsli_n and vsri_n tests Christophe Lyon
2015-01-16 18:11 ` Tejas Belagod
2015-01-19 14:15 ` Marcus Shawcroft
2015-01-13 15:20 ` [[ARM/AArch64][testsuite] 17/36] Add vpadd, vpmax and vpmin tests Christophe Lyon
2015-01-16 17:54 ` Tejas Belagod
2015-01-16 18:02 ` Christophe Lyon
2015-01-20 15:34 ` Christophe Lyon
2015-01-26 14:19 ` Marcus Shawcroft
2015-01-13 15:20 ` [[ARM/AArch64][testsuite] 10/36] Add vmlal and vmlsl tests Christophe Lyon
2015-01-16 16:22 ` Tejas Belagod
2015-01-19 13:51 ` Marcus Shawcroft
2015-01-13 15:20 ` [[ARM/AArch64][testsuite] 19/36] Add vsubl tests, put most of the code in common with vaddl in vXXXl.inc Christophe Lyon
2015-01-16 18:12 ` Tejas Belagod
2015-01-19 14:37 ` Marcus Shawcroft
2015-01-13 15:21 ` [[ARM/AArch64][testsuite] 35/36] Add vqdmull_lane tests Christophe Lyon
2015-01-19 16:54 ` Marcus Shawcroft
2015-01-13 15:22 ` [[ARM/AArch64][testsuite] 36/36] Add vqdmull_n tests Christophe Lyon
2015-01-16 18:49 ` Tejas Belagod
2015-01-16 19:20 ` Christophe Lyon
2015-01-19 17:16 ` Marcus Shawcroft
2015-01-19 17:18 ` [[ARM/AArch64][testsuite] 00/36] More Neon intrinsics tests Marcus Shawcroft
2015-01-20 15:26 ` Christophe Lyon
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