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From: Christophe Lyon <christophe.lyon.oss@gmail.com>
To: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
Cc: Christophe LYON <christophe.lyon@foss.st.com>,
	GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] testsuite: Make sure double-precision is supported in g++.dg/eh/arm-vfp-unwind.C
Date: Wed, 15 Sep 2021 18:13:04 +0200	[thread overview]
Message-ID: <CAKhMtSL5Rw5wB+sFsNLBj=-T4fp7cz7z8rFoJZ=yh_+8OwzGsg@mail.gmail.com> (raw)
In-Reply-To: <6652c071-d59d-cd94-4bf7-d3b5b885b85a@foss.arm.com>

On Wed, Sep 15, 2021 at 2:49 PM Richard Earnshaw via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:

>
>
> On 15/09/2021 13:26, Christophe LYON via Gcc-patches wrote:
> >
> > On 15/09/2021 13:02, Richard Earnshaw wrote:
> >>
> >>
> >> On 26/08/2021 16:53, Christophe Lyon via Gcc-patches wrote:
> >>> g++.dg/eh/arm-vfp-unwind.C uses an asm statement relying on
> >>> double-precision FPU support, but does not make sure it is actually
> >>> supported by the target.
> >>> Check (__ARM_FP & 8) to ensure this.
> >>>
> >>> 2021-08-26  Christophe Lyon  <christophe.lyon@foss.st.com>
> >>>
> >>>     gcc/testsuite/
> >>>     * g++.dg/eh/arm-vfp-unwind.C: Check __ARM_FP.
> >>> ---
> >>>   gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C | 2 +-
> >>>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C
> >>> b/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C
> >>> index 62263c0c3b0..90d20081d78 100644
> >>> --- a/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C
> >>> +++ b/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C
> >>> @@ -3,7 +3,7 @@
> >>>     /* Test to catch off-by-one errors in arm/pr-support.c.  */
> >>>   -#if defined (__VFP_FP__) && !defined (__SOFTFP__)
> >>> +#if defined (__VFP_FP__) && !defined (__SOFTFP__) && (__ARM_FP & 8)
> >>>     #include <iostream>
> >>>   #include <stdlib.h>
> >>>
> >>
> >> Wouldn't it be better to have an alternate to the asm for the case
> >> where we only have single-precision float?  Something like (untested):
> >>
> >> static void donkey ()
> >> {
> >> #if __ARM_FP & 8
> >>   asm volatile ("fcpyd d9, %P0" : : "w" (1.2345) : "d9");
> >> #else
> >>   asm volatile ("fcpys s18, %P0" : : "w" (1.2345f) : "s18");
> >> #endif
> >>   throw 1;
> >> }
> >
> >
> > I tried similar things but they failed on some testing configurations.
> >
> > Let me try your version, I'll let you know if there is any fallout.
>
> Of course, the asm syntax should be converted to the new 'unified
> syntax' form ie vmov.f{32,64}.
>
>
The problem is that %P expects a double-precision register.
It seems there's nothing to print a single-precision register, or rather %p
(small p)
rejects s18 too.



> R.
>
> >
> > Christophe
> >
> >
> >>
> >> R.
>

  reply	other threads:[~2021-09-15 16:13 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 15:53 Christophe Lyon
2021-09-06  7:23 ` Christophe LYON
2021-09-13  7:52   ` Christophe LYON
2021-09-15 11:02 ` Richard Earnshaw
2021-09-15 12:26   ` Christophe LYON
2021-09-15 12:49     ` Richard Earnshaw
2021-09-15 16:13       ` Christophe Lyon [this message]
2021-09-15 16:43         ` Richard Earnshaw
2021-09-16  9:12           ` Christophe LYON
2021-09-16  9:19             ` Richard Earnshaw
2021-09-16  9:35               ` Christophe Lyon

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