From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by sourceware.org (Postfix) with ESMTPS id 8894D385771D for ; Fri, 28 Apr 2023 08:37:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8894D385771D Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-lj1-x22e.google.com with SMTP id 38308e7fff4ca-2a8b766322bso93197061fa.1 for ; Fri, 28 Apr 2023 01:37:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1682671070; x=1685263070; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=TDpLYnmbomK8Z1KnwZsjmD0+gGMBQtzIyyhk6s9sDhA=; b=jla7FTp6n107nUB7UdAlYZBknCLYruCCdcoOzD4VfpOyiFjOl44tVSD+pznbs1in67 VQujeYKlx2ySudwp8Dbb6HE9y3u+UrAZPbEWw9erp5rxeiP+/SvVtNc+tOFj/zt9EvOw PZ4Z/AKE0qHmjPgE+x5obhjeTtngGDMMWDnowJAOuwuAVhMUzgo28EHXdwsDdWek0G7+ zd+PgHv69CZMumMkvSlNTeBrxwgbB/gAgCw3ASKMPVMzxw4XF0hi9t4YiAMPVgSa59fB OQ+xnlBOHbzOFCjDtfHp6hBbwgUVcjuYGI+tUbIdPeEJnbATfx4lQnGqiZH6Tx+ZuoIc zBBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682671070; x=1685263070; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TDpLYnmbomK8Z1KnwZsjmD0+gGMBQtzIyyhk6s9sDhA=; b=PPFOxefmfUZbjKNVh625tySb3jRsywdVAyJx59eCXraibEtcj+/INYMwi/FurYa8ZG t9bjCBrUU/ic+eNG+NkxQH9SZDTce8hE/HzYqwa57bA48e8iZWXfnlnzcYpOGoFDnTZ6 ZUAMqlfkC5k9Mlkfgg9qZuyADxWOqGytDcqYz3z3YzrQrAUUJuTpzcigDe9Fzl8fYvh0 ZKWqiA/xWlSg+KwvtlobnD9/raEHRSDHqis2Hf5zGyNhpxEQMFB9SYV+oaqtlroY8YQs zqRJcQwJvid1DDksr2VOhwoVwXHgZXylKrCWKihGQb7HtRBQsMMzPpEGVJ7RsqxMGOBo 6euQ== X-Gm-Message-State: AC+VfDxHUTu+YY80Cop7XSrpP4jrgazGPWQC3lJGVGYUz9Z1biZ8jSG+ vp8yOFxi+v/0bdcafq4Icmd73RYbbjYtdisDmc6nd/WJsO5gFwWLMvw= X-Google-Smtp-Source: ACHHUZ4TW2P2qsTkAXPJqfy00zPEgVMygIYqccZCcjX4Vtm98smLXSjefdq87ZnivDUTtwuvJQs6shuW88DBs9qZHnY= X-Received: by 2002:a2e:b047:0:b0:2a8:eee0:59f3 with SMTP id d7-20020a2eb047000000b002a8eee059f3mr1376283ljl.41.1682671069975; Fri, 28 Apr 2023 01:37:49 -0700 (PDT) MIME-Version: 1.0 References: <20230428061210.2988035-1-christoph.muellner@vrull.eu> <20230428061210.2988035-10-christoph.muellner@vrull.eu> In-Reply-To: <20230428061210.2988035-10-christoph.muellner@vrull.eu> From: Kito Cheng Date: Fri, 28 Apr 2023 16:37:38 +0800 Message-ID: Subject: Re: [PATCH 09/11] riscv: thead: Factor out XThead*-specific peepholes To: Christoph Muellner Cc: gcc-patches@gcc.gnu.org, Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Cooper Qu , Lifang Xia , Yunhai Shang , Zhiwei Liu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: LGTM, I like this refactor. On Fri, Apr 28, 2023 at 2:12=E2=80=AFPM Christoph Muellner wrote: > > From: Christoph M=C3=BCllner > > This patch moves the XThead*-specific peephole passes > into thead-peephole.md with the intend to keep vendor-specific > code separated from RISC-V standard code. > > This patch does not contain any functional changes. > > gcc/ChangeLog: > > * config/riscv/peephole.md: Remove XThead* peephole passes. > * config/riscv/thead.md: Include thead-peephole.md. > * config/riscv/thead-peephole.md: New file. > > Signed-off-by: Christoph M=C3=BCllner > --- > gcc/config/riscv/peephole.md | 56 ---------------------- > gcc/config/riscv/thead-peephole.md | 74 ++++++++++++++++++++++++++++++ > gcc/config/riscv/thead.md | 2 + > 3 files changed, 76 insertions(+), 56 deletions(-) > create mode 100644 gcc/config/riscv/thead-peephole.md > > diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md > index 67e7046d7e6..0ef0c04410b 100644 > --- a/gcc/config/riscv/peephole.md > +++ b/gcc/config/riscv/peephole.md > @@ -38,59 +38,3 @@ (define_peephole2 > { > operands[5] =3D GEN_INT (INTVAL (operands[2]) - INTVAL (operands[5])); > }) > - > -;; XTheadMemPair: merge two SI or DI loads > -(define_peephole2 > - [(set (match_operand:GPR 0 "register_operand" "") > - (match_operand:GPR 1 "memory_operand" "")) > - (set (match_operand:GPR 2 "register_operand" "") > - (match_operand:GPR 3 "memory_operand" ""))] > - "TARGET_XTHEADMEMPAIR > - && th_mempair_operands_p (operands, true, mode)" > - [(parallel [(set (match_dup 0) (match_dup 1)) > - (set (match_dup 2) (match_dup 3))])] > -{ > - th_mempair_order_operands (operands, true, mode); > -}) > - > -;; XTheadMemPair: merge two SI or DI stores > -(define_peephole2 > - [(set (match_operand:GPR 0 "memory_operand" "") > - (match_operand:GPR 1 "register_operand" "")) > - (set (match_operand:GPR 2 "memory_operand" "") > - (match_operand:GPR 3 "register_operand" ""))] > - "TARGET_XTHEADMEMPAIR > - && th_mempair_operands_p (operands, false, mode)" > - [(parallel [(set (match_dup 0) (match_dup 1)) > - (set (match_dup 2) (match_dup 3))])] > -{ > - th_mempair_order_operands (operands, false, mode); > -}) > - > -;; XTheadMemPair: merge two SI loads with sign-extension > -(define_peephole2 > - [(set (match_operand:DI 0 "register_operand" "") > - (sign_extend:DI (match_operand:SI 1 "memory_operand" ""))) > - (set (match_operand:DI 2 "register_operand" "") > - (sign_extend:DI (match_operand:SI 3 "memory_operand" "")))] > - "TARGET_XTHEADMEMPAIR && TARGET_64BIT > - && th_mempair_operands_p (operands, true, SImode)" > - [(parallel [(set (match_dup 0) (sign_extend:DI (match_dup 1))) > - (set (match_dup 2) (sign_extend:DI (match_dup 3)))])] > -{ > - th_mempair_order_operands (operands, true, SImode); > -}) > - > -;; XTheadMemPair: merge two SI loads with zero-extension > -(define_peephole2 > - [(set (match_operand:DI 0 "register_operand" "") > - (zero_extend:DI (match_operand:SI 1 "memory_operand" ""))) > - (set (match_operand:DI 2 "register_operand" "") > - (zero_extend:DI (match_operand:SI 3 "memory_operand" "")))] > - "TARGET_XTHEADMEMPAIR && TARGET_64BIT > - && th_mempair_operands_p (operands, true, SImode)" > - [(parallel [(set (match_dup 0) (zero_extend:DI (match_dup 1))) > - (set (match_dup 2) (zero_extend:DI (match_dup 3)))])] > -{ > - th_mempair_order_operands (operands, true, SImode); > -}) > diff --git a/gcc/config/riscv/thead-peephole.md b/gcc/config/riscv/thead-= peephole.md > new file mode 100644 > index 00000000000..5b829b5b968 > --- /dev/null > +++ b/gcc/config/riscv/thead-peephole.md > @@ -0,0 +1,74 @@ > +;; Machine description for T-Head vendor extensions > +;; Copyright (C) 2023 Free Software Foundation, Inc. > + > +;; This file is part of GCC. > + > +;; GCC is free software; you can redistribute it and/or modify > +;; it under the terms of the GNU General Public License as published by > +;; the Free Software Foundation; either version 3, or (at your option) > +;; any later version. > + > +;; GCC is distributed in the hope that it will be useful, > +;; but WITHOUT ANY WARRANTY; without even the implied warranty of > +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +;; GNU General Public License for more details. > + > +;; You should have received a copy of the GNU General Public License > +;; along with GCC; see the file COPYING3. If not see > +;; . > + > +;; XTheadMemPair: merge two SI or DI loads > +(define_peephole2 > + [(set (match_operand:GPR 0 "register_operand" "") > + (match_operand:GPR 1 "memory_operand" "")) > + (set (match_operand:GPR 2 "register_operand" "") > + (match_operand:GPR 3 "memory_operand" ""))] > + "TARGET_XTHEADMEMPAIR > + && th_mempair_operands_p (operands, true, mode)" > + [(parallel [(set (match_dup 0) (match_dup 1)) > + (set (match_dup 2) (match_dup 3))])] > +{ > + th_mempair_order_operands (operands, true, mode); > +}) > + > +;; XTheadMemPair: merge two SI or DI stores > +(define_peephole2 > + [(set (match_operand:GPR 0 "memory_operand" "") > + (match_operand:GPR 1 "register_operand" "")) > + (set (match_operand:GPR 2 "memory_operand" "") > + (match_operand:GPR 3 "register_operand" ""))] > + "TARGET_XTHEADMEMPAIR > + && th_mempair_operands_p (operands, false, mode)" > + [(parallel [(set (match_dup 0) (match_dup 1)) > + (set (match_dup 2) (match_dup 3))])] > +{ > + th_mempair_order_operands (operands, false, mode); > +}) > + > +;; XTheadMemPair: merge two SI loads with sign-extension > +(define_peephole2 > + [(set (match_operand:DI 0 "register_operand" "") > + (sign_extend:DI (match_operand:SI 1 "memory_operand" ""))) > + (set (match_operand:DI 2 "register_operand" "") > + (sign_extend:DI (match_operand:SI 3 "memory_operand" "")))] > + "TARGET_XTHEADMEMPAIR && TARGET_64BIT > + && th_mempair_operands_p (operands, true, SImode)" > + [(parallel [(set (match_dup 0) (sign_extend:DI (match_dup 1))) > + (set (match_dup 2) (sign_extend:DI (match_dup 3)))])] > +{ > + th_mempair_order_operands (operands, true, SImode); > +}) > + > +;; XTheadMemPair: merge two SI loads with zero-extension > +(define_peephole2 > + [(set (match_operand:DI 0 "register_operand" "") > + (zero_extend:DI (match_operand:SI 1 "memory_operand" ""))) > + (set (match_operand:DI 2 "register_operand" "") > + (zero_extend:DI (match_operand:SI 3 "memory_operand" "")))] > + "TARGET_XTHEADMEMPAIR && TARGET_64BIT > + && th_mempair_operands_p (operands, true, SImode)" > + [(parallel [(set (match_dup 0) (zero_extend:DI (match_dup 1))) > + (set (match_dup 2) (zero_extend:DI (match_dup 3)))])] > +{ > + th_mempair_order_operands (operands, true, SImode); > +}) > diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md > index aa933960a98..1ac4dd9b462 100644 > --- a/gcc/config/riscv/thead.md > +++ b/gcc/config/riscv/thead.md > @@ -374,3 +374,5 @@ (define_insn "*th_mempair_load_zero_extendsidi2" > [(set_attr "move_type" "load") > (set_attr "mode" "DI") > (set_attr "length" "8")]) > + > +(include "thead-peephole.md") > -- > 2.40.1 >