From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by sourceware.org (Postfix) with ESMTPS id 778983858D39 for ; Mon, 27 Mar 2023 11:56:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 778983858D39 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-lf1-x12c.google.com with SMTP id h25so11073270lfv.6 for ; Mon, 27 Mar 2023 04:56:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1679918159; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=GHbgd8YKqe4kpcdkoF0rkpUosNy1cFS1M6Se/1h5tkI=; b=aA0rbbZrvVPeTHDb+hjqL5Dx3TS9gf6Wd49fS60F7i+Aq6CFFO1v/6ulK3roCWB+W5 DI6YeeQjsng7yPeeK4dskAYyoM24l/cjHrEHFZ4quaY3pzFDyCrLyWgtO7ZxZXv6Lt63 dwPyo0eLyA0+dsdMg972tXLwAAIGXXDlSpSPzF0BrI7PP2Epo1JqN7o1GMwISAz2ux2f ZL7FyvSMUBTo54tpa35kbp7ieR0TO0v1g6/MKUVDyIu/RWQ+3O7Fafh5JUAGtywVbbwW 6HVnKO0IoHjrB6SLSsgq5A5sQDEekjUptZNXKyqEyCucEye9xKHKnB3AqttyiTi1ZDWP s9jw== X-Google-DKIM-Signature: v=1; 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boundary="0000000000001c4ac905f7e06d9c" X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,HTML_MESSAGE,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --0000000000001c4ac905f7e06d9c Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable OK for trunk, thanks :) On Mon, Mar 27, 2023 at 7:04=E2=80=AFPM Christoph Muellner < christoph.muellner@vrull.eu> wrote: > From: Christoph M=C3=BCllner > > This patch adds missing mode specifiers for XTheadMemPair INSNs. > > gcc/ChangeLog: > PR target/109296 > * config/riscv/thead.md: Add missing mode specifiers. > > Signed-off-by: Christoph M=C3=BCllner > --- > gcc/config/riscv/thead.md | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md > index 63c4af6f77d..0623607d3dc 100644 > --- a/gcc/config/riscv/thead.md > +++ b/gcc/config/riscv/thead.md > @@ -321,10 +321,10 @@ (define_insn "*th_mempair_store_2" > > ;; MEMPAIR load DI extended signed SI > (define_insn "*th_mempair_load_extendsidi2" > - [(set (match_operand 0 "register_operand" "=3Dr") > - (sign_extend:DI (match_operand 1 "memory_operand" "m"))) > - (set (match_operand 2 "register_operand" "=3Dr") > - (sign_extend:DI (match_operand 3 "memory_operand" "m")))] > + [(set (match_operand:DI 0 "register_operand" "=3Dr") > + (sign_extend:DI (match_operand:SI 1 "memory_operand" "m"))) > + (set (match_operand:DI 2 "register_operand" "=3Dr") > + (sign_extend:DI (match_operand:SI 3 "memory_operand" "m")))] > "TARGET_XTHEADMEMPAIR && TARGET_64BIT && reload_completed > && th_mempair_operands_p (operands, true, SImode)" > { return th_mempair_output_move (operands, true, SImode, SIGN_EXTEND);= } > @@ -334,10 +334,10 @@ (define_insn "*th_mempair_load_extendsidi2" > > ;; MEMPAIR load DI extended unsigned SI > (define_insn "*th_mempair_load_zero_extendsidi2" > - [(set (match_operand 0 "register_operand" "=3Dr") > - (zero_extend:DI (match_operand 1 "memory_operand" "m"))) > - (set (match_operand 2 "register_operand" "=3Dr") > - (zero_extend:DI (match_operand 3 "memory_operand" "m")))] > + [(set (match_operand:DI 0 "register_operand" "=3Dr") > + (zero_extend:DI (match_operand:SI 1 "memory_operand" "m"))) > + (set (match_operand:DI 2 "register_operand" "=3Dr") > + (zero_extend:DI (match_operand:SI 3 "memory_operand" "m")))] > "TARGET_XTHEADMEMPAIR && TARGET_64BIT && reload_completed > && th_mempair_operands_p (operands, true, SImode)" > { return th_mempair_output_move (operands, true, SImode, ZERO_EXTEND);= } > -- > 2.39.2 > > --0000000000001c4ac905f7e06d9c--