From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by sourceware.org (Postfix) with ESMTPS id 7D91C38708DF for ; Tue, 13 Oct 2020 09:03:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 7D91C38708DF Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kito.cheng@sifive.com Received: by mail-lj1-x243.google.com with SMTP id f21so19598724ljh.7 for ; Tue, 13 Oct 2020 02:03:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=X0tDeNlzC4lTVyK3EMDsOgcCTeFEJWkFqyFyH+yaA20=; b=ZPnphUUJy+7QW84fyxEEa3w33kTzPg+Mnj22Yb2X6k15yWXuK8F6GiX3Op4OtJoHoV CzWOcXKrEPYXpZv3rAmdueNKE6XNiRsznHTrWRZ9V+iP6Tekyc790EJTN0q0jzxrhZ5E lDk5Rx8TK2mdkIjj9OnSKsCrLwZS6XRq3e7fhbTOQGrEJeJR+WHNNwnYiOU9TXLz4kVo eqQJOKcFDZj4WgMMPlvr9PWB+7ObHr+O3fsZx7vCMq+cq3Knou8+25t/wBDoPUwjk8pH +m3Rp/1H72E8BAQpc8y+JM3MezuTXrhEkOQxGYJSB0p9qtRwZczBgxRhbVhgObzVXHzO VZjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=X0tDeNlzC4lTVyK3EMDsOgcCTeFEJWkFqyFyH+yaA20=; b=YZV485AqqM0mzyRpJlkv4e3c2SqS3Me1BkzYTQUXdc8xNy/anxBIIHhEaVAtgkguhg bDh1TZ48N52PJpQKp3W/WZhTFcZtB+WYTEcuCvzlR6ctGKoHiOexGYAoPWPkaEmXjSno 4ZdWgM+jcE9179UW4ocQm+DyjO570G0bfe9fcTqKb7dtVmrWVYToAUnB6Bg+4AZ/C0eM ceKKq9J9jOE+0wAzmr79tRD1MzfqDCXj7qxmj7TM4az7Z37gL2wWuPfIGL4/gJL5QaEw iqjDkfoc+bF/8bYUO3MQbfAyyEV+gbYnyi0AKg1WUHYnEHREB2qpgR6syqmvc9H2+qyc L4gA== X-Gm-Message-State: AOAM532zFPpVA1FyAGUii6ZIzRXVPEpTp0yoIETwdMAOjffzTXLkMWPk KFLB2M7gFtbWsNB0MPmpMz/YqYMj0OF0hRditXVHUQ== X-Google-Smtp-Source: ABdhPJxsJaOlZmWA6XHFtkr4t8fl1vBZJwmdUlFpKRiqf7hw9R/xqSVXeNeMaBPscnZbxGY30+ZHKXUyvH+JNkHtvy4= X-Received: by 2002:a2e:7d06:: with SMTP id y6mr12007826ljc.431.1602579810276; Tue, 13 Oct 2020 02:03:30 -0700 (PDT) MIME-Version: 1.0 References: <20200925030651.67653-1-kito.cheng@sifive.com> In-Reply-To: From: Kito Cheng Date: Tue, 13 Oct 2020 17:03:19 +0800 Message-ID: Subject: Re: [PATCH v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values. To: ebotcazou@adacore.com Cc: GCC Patches , Kito Cheng , Jim Wilson , Richard Biener X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, HTML_MESSAGE, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Oct 2020 09:03:33 -0000 ping^2 Hi Eric: Do you mind having a review for that? thanks :) On Mon, Oct 5, 2020 at 5:24 PM Kito Cheng wrote: > ping. > > > On Fri, Sep 25, 2020 at 2:33 PM Richard Biener wrote: > >> On Fri, 25 Sep 2020, Kito Cheng wrote: >> >> > In g:70cdb21e579191fe9f0f1d45e328908e59c0179e, DECL/global variable has >> handled >> > misaligned stores, but it didn't handle PARALLEL values, and I refer the >> > other part of this function, I found the PARALLEL need handled by >> > emit_group_* functions, so I add a check, and using emit_group_store if >> > storing a PARALLEL value, also checked this change didn't break the >> > testcase(gcc.target/arm/unaligned-argument-3.c) added by the orginal >> changes. >> > >> > For riscv64 target, struct S {int a; double b;} will pack into a >> parallel >> > value to return and it has TImode when misaligned access is supported, >> > however TImode required 16-byte align, but it only 8-byte align, so it >> go to >> > the misaligned stores handling, then it will try to generate move >> > instruction from a PARALLEL value. >> > >> > Tested on following target without introduced new reguression: >> > - riscv32/riscv64 elf >> > - x86_64-linux >> > - arm-eabi >> >> OK if Eric says so. >> >> Thanks, >> Richard. >> >> > v2 changes: >> > - Use maybe_emit_group_store instead of emit_group_store. >> > - Remove push_temp_slots/pop_temp_slots, emit_group_store only require >> > stack temp slot when dst is CONCAT or PARALLEL, however >> > maybe_emit_group_store will always use REG for dst if needed. >> > >> > gcc/ChangeLog: >> > >> > PR target/96759 >> > * expr.c (expand_assignment): Handle misaligned stores with >> PARALLEL >> > value. >> > >> > gcc/testsuite/ChangeLog: >> > >> > PR target/96759 >> > * g++.target/riscv/pr96759.C: New. >> > * gcc.target/riscv/pr96759.c: New. >> > --- >> > gcc/expr.c | 2 ++ >> > gcc/testsuite/g++.target/riscv/pr96759.C | 8 ++++++++ >> > gcc/testsuite/gcc.target/riscv/pr96759.c | 13 +++++++++++++ >> > 3 files changed, 23 insertions(+) >> > create mode 100644 gcc/testsuite/g++.target/riscv/pr96759.C >> > create mode 100644 gcc/testsuite/gcc.target/riscv/pr96759.c >> > >> > diff --git a/gcc/expr.c b/gcc/expr.c >> > index 1a15f24b3979..6eb13a12c8c5 100644 >> > --- a/gcc/expr.c >> > +++ b/gcc/expr.c >> > @@ -5168,6 +5168,8 @@ expand_assignment (tree to, tree from, bool >> nontemporal) >> > rtx reg, mem; >> > >> > reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL); >> > + /* Handle PARALLEL. */ >> > + reg = maybe_emit_group_store (reg, TREE_TYPE (from)); >> > reg = force_not_mem (reg); >> > mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); >> > if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to)) >> > diff --git a/gcc/testsuite/g++.target/riscv/pr96759.C >> b/gcc/testsuite/g++.target/riscv/pr96759.C >> > new file mode 100644 >> > index 000000000000..673999a4baf7 >> > --- /dev/null >> > +++ b/gcc/testsuite/g++.target/riscv/pr96759.C >> > @@ -0,0 +1,8 @@ >> > +/* { dg-options "-mno-strict-align -std=gnu++17" } */ >> > +/* { dg-do compile } */ >> > +struct S { >> > + int a; >> > + double b; >> > +}; >> > +S GetNumbers(); >> > +auto [globalC, globalD] = GetNumbers(); >> > diff --git a/gcc/testsuite/gcc.target/riscv/pr96759.c >> b/gcc/testsuite/gcc.target/riscv/pr96759.c >> > new file mode 100644 >> > index 000000000000..621c39196fca >> > --- /dev/null >> > +++ b/gcc/testsuite/gcc.target/riscv/pr96759.c >> > @@ -0,0 +1,13 @@ >> > +/* { dg-options "-mno-strict-align" } */ >> > +/* { dg-do compile } */ >> > + >> > +struct S { >> > + int a; >> > + double b; >> > +}; >> > +struct S GetNumbers(); >> > +struct S g; >> > + >> > +void foo(){ >> > + g = GetNumbers(); >> > +} >> > >> >> -- >> Richard Biener >> SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg, >> Germany; GF: Felix Imend >> >