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From: Kito Cheng <kito.cheng@sifive.com>
To: "Wang, Yanzhang" <yanzhang.wang@intel.com>
Cc: Jeff Law <jeffreyalaw@gmail.com>,
	 "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>,
	 "Li, Pan2" <pan2.li@intel.com>
Subject: Re: [PATCH v3] RISC-V: Fix regression of -fzero-call-used-regs=all
Date: Mon, 10 Apr 2023 11:11:09 +0800	[thread overview]
Message-ID: <CALLt3TiW=LGG0TN7ZBxKxDEmSQJ61FPbW+ojFhO4Tq_2GYKRUw@mail.gmail.com> (raw)
In-Reply-To: <IA1PR11MB646617F4579936CE2E6D19F9F2959@IA1PR11MB6466.namprd11.prod.outlook.com>

> > Do you need to save/restore the vector configuration before and after
> > clearing the vector registers?    If so, that seems to be missing.  If
> > not, it seems like a comment explaining why would be useful.
>
> I'll add some comments in the code and want to explain here first.
> We need not save/restore the vector configurations. Because, by design,
> the RVV requires vsetvl when using vector instructions. When users want to
> use the RVV insns next, they should have to issue vsetvl first.

I think one keypoint here is -fzero-call-used-regs=* emit zeroing
instruction before return,
that means there won't be any vector operations between return and
zeroing instructions,
so we don't need to restore the vcsr after zeroing.

  reply	other threads:[~2023-04-10  3:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-06 13:34 [PATCH] " yanzhang.wang
2023-04-06 13:47 ` juzhe.zhong
2023-04-06 14:59   ` Kito Cheng
2023-04-07  6:59 ` [PATCH v2] " yanzhang.wang
2023-04-07  7:07   ` Kito Cheng
2023-04-07 12:32 ` [PATCH v3] " yanzhang.wang
2023-04-08 18:39   ` Jeff Law
2023-04-10  2:21     ` Wang, Yanzhang
2023-04-10  3:11       ` Kito Cheng [this message]
2023-04-10 20:57         ` Jeff Law
2023-04-10  3:00 ` [PATCH v4] " yanzhang.wang
2023-04-11 11:37 ` [PATCH v5] " yanzhang.wang
2023-04-11 12:00   ` Wang, Yanzhang
2023-04-11 14:11     ` Kito Cheng

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