From: Kito Cheng <kito.cheng@sifive.com>
To: pan2.li@intel.com
Cc: gcc-patches@gcc.gnu.org, juzhe.zhong@rivai.ai, yanzhang.wang@intel.com
Subject: Re: [PATCH v1] RISC-V: Bugfix for RVV floating-point rm suffix sequence
Date: Mon, 31 Jul 2023 10:57:35 +0800 [thread overview]
Message-ID: <CALLt3TieQSfjBp_R=FHyRro9g+J5bStd=SG1XDmJFn-BmvtNUQ@mail.gmail.com> (raw)
In-Reply-To: <20230731025646.1021646-1-pan2.li@intel.com>
lgtm
On Mon, Jul 31, 2023 at 10:56 AM <pan2.li@intel.com> wrote:
>
> From: Pan Li <pan2.li@intel.com>
>
> According to below RVV intrinsic doc, the RVV floating-point intrinsic name
> with rounding mode should be:
>
> _rm_m
>
> instead of:
>
> _m_rm
>
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226
>
> This patch fix this naming sequence issue and adjust the test cases.
>
> Signed-off-by: Pan Li <pan2.li@intel.com>
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
> Move rm suffix before mask.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/float-point-frm-insert-1.c: Adjust
> test cases.
> * gcc.target/riscv/rvv/base/float-point-frm.c: Ditto.
> ---
> gcc/config/riscv/riscv-vector-builtins-shapes.cc | 10 +++++-----
> .../riscv/rvv/base/float-point-frm-insert-1.c | 14 +++++++-------
> .../gcc.target/riscv/rvv/base/float-point-frm.c | 16 ++++++++--------
> 3 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
> index 22b5fe256df..6af57c22bfb 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
> +++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
> @@ -261,6 +261,11 @@ struct alu_frm_def : public build_base
> b.append_name (type_suffixes[instance.type.index].vector);
> }
>
> + /* According to rvv-intrinsic-doc, it does not add "_rm" suffix
> + for vop_rm C++ overloaded API. */
> + if (!overloaded_p)
> + b.append_name ("_rm");
> +
> /* According to rvv-intrinsic-doc, it does not add "_m" suffix
> for vop_m C++ overloaded API. */
> if (overloaded_p && instance.pred == PRED_TYPE_m)
> @@ -268,11 +273,6 @@ struct alu_frm_def : public build_base
>
> b.append_name (predication_suffixes[instance.pred]);
>
> - /* According to rvv-intrinsic-doc, it does not add "_rm" suffix
> - for vop_rm C++ overloaded API. */
> - if (!overloaded_p)
> - b.append_name ("_rm");
> -
> return b.finish_name ();
> }
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-insert-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-insert-1.c
> index 608b3883dd0..d6c5e1bddd6 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-insert-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-insert-1.c
> @@ -11,20 +11,20 @@ test_riscv_vfadd_vv_f32m1_rm (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) {
> }
>
> vfloat32m1_t
> -test_vfadd_vv_f32m1_m_rm(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2,
> +test_vfadd_vv_f32m1_rm_m (vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2,
> size_t vl) {
> - return __riscv_vfadd_vv_f32m1_m_rm(mask, op1, op2, 1, vl);
> + return __riscv_vfadd_vv_f32m1_rm_m (mask, op1, op2, 1, vl);
> }
>
> vfloat32m1_t
> -test_vfadd_vf_f32m1_rm(vfloat32m1_t op1, float32_t op2, size_t vl) {
> - return __riscv_vfadd_vf_f32m1_rm(op1, op2, 2, vl);
> +test_vfadd_vf_f32m1_rm (vfloat32m1_t op1, float32_t op2, size_t vl) {
> + return __riscv_vfadd_vf_f32m1_rm (op1, op2, 2, vl);
> }
>
> vfloat32m1_t
> -test_vfadd_vf_f32m1_m_rm(vbool32_t mask, vfloat32m1_t op1, float32_t op2,
> - size_t vl) {
> - return __riscv_vfadd_vf_f32m1_m_rm(mask, op1, op2, 3, vl);
> +test_vfadd_vf_f32m1_rm_m (vbool32_t mask, vfloat32m1_t op1, float32_t op2,
> + size_t vl) {
> + return __riscv_vfadd_vf_f32m1_rm_m (mask, op1, op2, 3, vl);
> }
>
> /* { dg-final { scan-assembler-times {vfadd\.v[vf]\s+v[0-9]+,\s*v[0-9]+,\s*[fav]+[0-9]+} 4 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm.c
> index 95271b2c822..1f142605cc3 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm.c
> @@ -11,20 +11,20 @@ test_riscv_vfadd_vv_f32m1_rm (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) {
> }
>
> vfloat32m1_t
> -test_vfadd_vv_f32m1_m_rm(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2,
> - size_t vl) {
> - return __riscv_vfadd_vv_f32m1_m_rm(mask, op1, op2, 0, vl);
> +test_vfadd_vv_f32m1_rm_m (vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2,
> + size_t vl) {
> + return __riscv_vfadd_vv_f32m1_rm_m (mask, op1, op2, 0, vl);
> }
>
> vfloat32m1_t
> -test_vfadd_vf_f32m1_rm(vfloat32m1_t op1, float32_t op2, size_t vl) {
> - return __riscv_vfadd_vf_f32m1_rm(op1, op2, 0, vl);
> +test_vfadd_vf_f32m1_rm (vfloat32m1_t op1, float32_t op2, size_t vl) {
> + return __riscv_vfadd_vf_f32m1_rm (op1, op2, 0, vl);
> }
>
> vfloat32m1_t
> -test_vfadd_vf_f32m1_m_rm(vbool32_t mask, vfloat32m1_t op1, float32_t op2,
> - size_t vl) {
> - return __riscv_vfadd_vf_f32m1_m_rm(mask, op1, op2, 0, vl);
> +test_vfadd_vf_f32m1_rm_m (vbool32_t mask, vfloat32m1_t op1, float32_t op2,
> + size_t vl) {
> + return __riscv_vfadd_vf_f32m1_rm_m (mask, op1, op2, 0, vl);
> }
>
> /* { dg-final { scan-assembler-times {vfadd\.v[vf]\s+v[0-9]+,\s*v[0-9]+,\s*[fav]+[0-9]+} 4 } } */
> --
> 2.34.1
>
next prev parent reply other threads:[~2023-07-31 2:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-31 2:56 pan2.li
2023-07-31 2:57 ` Kito Cheng [this message]
2023-07-31 3:01 ` Li, Pan2
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CALLt3TieQSfjBp_R=FHyRro9g+J5bStd=SG1XDmJFn-BmvtNUQ@mail.gmail.com' \
--to=kito.cheng@sifive.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=juzhe.zhong@rivai.ai \
--cc=pan2.li@intel.com \
--cc=yanzhang.wang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).