From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by sourceware.org (Postfix) with ESMTPS id C8AE33858D39 for ; Tue, 8 Nov 2022 02:06:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C8AE33858D39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-lj1-x22e.google.com with SMTP id t10so19087698ljj.0 for ; Mon, 07 Nov 2022 18:06:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=YP1MF0WmyyY7cDdZQjOxCPQPlmOkb6PUF561doMMHfA=; b=1YZDdt5/gLZwdZursR0p9gjG5SvU3NB8LOhvCnqpD2xa0axcSf2fxy69EnmnFsQhxQ wSPxgVJSoCNcvlO+69szlNepwYr0DjsrugRuGaZ7RZ76wfLbwUcInMPEcB835Lv0Lc0G gRQ0iW2ERj/xCB7oV//VuVN/vHZE/26mI5sFXgsLdIevGO3ELRAkOlTTeAgmU41C1kmi 2JZ6GQ5DFFPv0KDEnvbbHnuJQA1oSV1rtVQegH5FSqrzpOB09QTrd9+CD/J2ct0GzDFp KbEUgy2pIMyQRGZGDTWNrokCQmFsWmsdeS/tVG/hOkg58LTbJXVE5wKGfE7yDgO+Yvj4 XJgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YP1MF0WmyyY7cDdZQjOxCPQPlmOkb6PUF561doMMHfA=; b=eBvZlSSknYP/WgAxjQr7r4vLV76X1PFaaQ+L0/2ZjSDhjDk7XDl0SwKuVRwh/ooT+L kVFtjFpabwhc0CgJd7iMGU+WyD8PaAd5Y5sGJ3xQFNW/rbJhzS6tHh4isz+4asfBn30Z idmV2m+6aMez0mtaqVyfU/tIQ/eEqGNseWzpsM9LldWB27NfLtdYioFSBz9vAkyGsjqS mxQ120gk4v+n+lFGjYo1aP6mhjq05awiI5y6K7SkZDKjXTDMg/0Ne6xgoN352RzBbAoJ 0kWKPRIgXDqkp8nfi+7q8gICCCLL5cnXLwQXm0b7XT+b9Ll7U7q6m8m0wW25k8lDTXi2 VWlw== X-Gm-Message-State: ACrzQf2ipdt9+1qTLIBDP/VyIwH9+QE5gBRqy4LrYtGtvBWz2vWxSqEN oFOOj/yBwx1TpSaNH8n4nCZnFz//Nw4NeeMBz0niVg== X-Google-Smtp-Source: AMsMyM4fvWDj1n3oWGi5lXXbE+g8/esV/JpAFQdYHnRlGuj1W8Uug6H0OL0V+5VEwvD9lkAT5KHiMyIXuWKaaoHhzGY= X-Received: by 2002:a2e:864e:0:b0:277:21c8:aac5 with SMTP id i14-20020a2e864e000000b0027721c8aac5mr6116650ljj.491.1667873188956; Mon, 07 Nov 2022 18:06:28 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Kevin Lee Date: Mon, 7 Nov 2022 18:06:17 -0800 Message-ID: Subject: Re: [PATCH] RISC-V missing __builtin_lceil and __builtin_lfloor To: Palmer Dabbelt Cc: Kito Cheng , gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > Kevin: Looks like this got corrupted, possibly from copy/paste into > gmail. I resurrect it, but there's a floating-point test failure in > gfortran. Looks like it predates this, but I'm trying to bisect it to > at least have a root cause before just ignoring it. I've got this > floating around on a branch and hopefully that'll remind me to commit > it after I sort that out. Currently, the testsuite doesn't show additional failures. It seems like the corrupted patch caused the issue. I will post the clean patch as v2. Thank you for the review! On Sun, Oct 2, 2022 at 1:47 PM Kevin Lee wrote: > > Thank you for the update Palmer. I'll certainly look into the corrupted p= atch issue and the floating-point test failure in gfortran. > > On Sun, Oct 2, 2022 at 1:42 PM Palmer Dabbelt wrote: >> >> On Sat, 17 Sep 2022 14:16:13 PDT (-0700), Kito Cheng wrote: >> > LGTM, thanks, I guess I just missed this before >> >> No worries, I'd just stubmled on it looking through old stuff. >> >> Kevin: Looks like this got corrupted, possibly from copy/paste into >> gmail. I resurrect it, but there's a floating-point test failure in >> gfortran. Looks like it predates this, but I'm trying to bisect it to >> at least have a root cause before just ignoring it. I've got this >> floating around on a branch and hopefully that'll remind me to commit >> it after I sort that out. >> >> > >> > Palmer Dabbelt =E6=96=BC 2022=E5=B9=B49=E6=9C=881= 7=E6=97=A5 =E9=80=B1=E5=85=AD 23:07 =E5=AF=AB=E9=81=93=EF=BC=9A >> > >> >> On Mon, 15 Aug 2022 17:44:35 PDT (-0700), kevinl@rivosinc.com wrote: >> >> > Hello, >> >> > Currently, __builtin_lceil and __builtin_lfloor doesn't generate an >> >> > existing instruction fcvt, but rather calls ceil and floor from the >> >> > library. This patch adds the missing iterator and attributes for lc= eil >> >> and >> >> > lfloor to produce the optimized code. >> >> > The test cases check the correct generation of the fcvt instructio= n for >> >> > float/double to int/long/long long. Passed the test in riscv-linux. >> >> > Could this patch be committed? >> >> >> >> Reviewed-by: Palmer Dabbelt >> >> Acked-by: Palmer Dabbelt >> >> >> >> Not sure if Kito had any comments for this one, but it looks good to = me. >> >> >> >> > gcc/ChangeLog: >> >> > Michael Collison >> >> > * config/riscv/riscv.md (RINT): Add iterator for lceil and >> >> lround. >> >> > (rint_pattern): Add ceil and floor. >> >> > (rint_rm): Add rup and rdn. >> >> > >> >> > gcc/testsuite/ChangeLog: >> >> > Kevin Lee >> >> > * gcc.target/riscv/lfloor-lceil.c: New test. >> >> > --- >> >> > gcc/config/riscv/riscv.md | 13 ++- >> >> > gcc/testsuite/gcc.target/riscv/lfloor-lceil.c | 79 +++++++++++++++= ++++ >> >> > 2 files changed, 88 insertions(+), 4 deletions(-) >> >> > create mode 100644 gcc/testsuite/gcc.target/riscv/lfloor-lceil.c >> >> > >> >> > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md >> >> > index c6399b1389e..070004fa7fe 100644 >> >> > --- a/gcc/config/riscv/riscv.md >> >> > +++ b/gcc/config/riscv/riscv.md >> >> > @@ -43,6 +43,9 @@ (define_c_enum "unspec" [ >> >> > UNSPEC_LRINT >> >> > UNSPEC_LROUND >> >> > >> >> > + UNSPEC_LCEIL >> >> > + UNSPEC_LFLOOR >> >> > + >> >> > ;; Stack tie >> >> > UNSPEC_TIE >> >> > ]) >> >> > @@ -345,10 +348,12 @@ (define_mode_attr UNITMODE [(SF "SF") (DF "DF= ")]) >> >> > ;; the controlling mode. >> >> > (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")]) >> >> > >> >> > -;; Iterator and attributes for floating-point rounding instruction= s. >> >> > -(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND]) >> >> > -(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUN= D >> >> > "round")]) >> >> > -(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm= ")]) >> >> > +;; Iterator and attributes for floating-point rounding instruction= s.f >> >> > +(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND UNSPEC_LCEIL >> >> > UNSPEC_LFLOOR]) >> >> > +(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUN= D >> >> > "round") >> >> > + (UNSPEC_LCEIL "ceil") (UNSPEC_LFLOOR >> >> > "floor")]) >> >> > +(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm= ") >> >> > + (UNSPEC_LCEIL "rup") (UNSPEC_LFLOOR "rdn")= ]) >> >> > >> >> > ;; Iterator and attributes for quiet comparisons. >> >> > (define_int_iterator QUIET_COMPARISON [UNSPEC_FLT_QUIET >> >> UNSPEC_FLE_QUIET]) >> >> > diff --git a/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c >> >> > b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c >> >> > new file mode 100644 >> >> > index 00000000000..4d81c12cefa >> >> > --- /dev/null >> >> > +++ b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c >> >> > @@ -0,0 +1,79 @@ >> >> > +/* { dg-do compile } */ >> >> > +/* { dg-options "-march=3Drv64gc -mabi=3Dlp64d" } */ >> >> > +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ >> >> > + >> >> > +int >> >> > +ceil1(float i) >> >> > +{ >> >> > + return __builtin_lceil(i); >> >> > +} >> >> > + >> >> > +long >> >> > +ceil2(float i) >> >> > +{ >> >> > + return __builtin_lceil(i); >> >> > +} >> >> > + >> >> > +long long >> >> > +ceil3(float i) >> >> > +{ >> >> > + return __builtin_lceil(i); >> >> > +} >> >> > + >> >> > +int >> >> > +ceil4(double i) >> >> > +{ >> >> > + return __builtin_lceil(i); >> >> > +} >> >> > + >> >> > +long >> >> > +ceil5(double i) >> >> > +{ >> >> > + return __builtin_lceil(i); >> >> > +} >> >> > + >> >> > +long long >> >> > +ceil6(double i) >> >> > +{ >> >> > + return __builtin_lceil(i); >> >> > +} >> >> > + >> >> > +int >> >> > +floor1(float i) >> >> > +{ >> >> > + return __builtin_lfloor(i); >> >> > +} >> >> > + >> >> > +long >> >> > +floor2(float i) >> >> > +{ >> >> > + return __builtin_lfloor(i); >> >> > +} >> >> > + >> >> > +long long >> >> > +floor3(float i) >> >> > +{ >> >> > + return __builtin_lfloor(i); >> >> > +} >> >> > + >> >> > +int >> >> > +floor4(double i) >> >> > +{ >> >> > + return __builtin_lfloor(i); >> >> > +} >> >> > + >> >> > +long >> >> > +floor5(double i) >> >> > +{ >> >> > + return __builtin_lfloor(i); >> >> > +} >> >> > + >> >> > +long long >> >> > +floor6(double i) >> >> > +{ >> >> > + return __builtin_lfloor(i); >> >> > +} >> >> > + >> >> > +/* { dg-final { scan-assembler-times "fcvt.l.s" 6 } } */ >> >> > +/* { dg-final { scan-assembler-times "fcvt.l.d" 6 } } */ >> >> > +/* { dg-final { scan-assembler-not "call" } } */ >> >>