From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 99733 invoked by alias); 17 Jan 2017 11:05:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 99295 invoked by uid 89); 17 Jan 2017 11:05:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=no version=3.3.2 spammy=H*MI:sk:CAMXFM3, WBR, wbr X-HELO: mail-vk0-f52.google.com Received: from mail-vk0-f52.google.com (HELO mail-vk0-f52.google.com) (209.85.213.52) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 17 Jan 2017 11:05:04 +0000 Received: by mail-vk0-f52.google.com with SMTP id x75so90005385vke.2 for ; Tue, 17 Jan 2017 03:05:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=50kYeHjcs2eCMV6jl8Gq/4G4Sf7HPXcMm09xdAOhEeY=; b=jcBMps9lrZG+4kkyOr3iqbzGLsM/7b0aF6X9x8pTxSomU6V6cJGDhkoVl/Fino+6hf 69rydx5CZmQe52PwA+KUtMW+0K+CcOH1KY/eylkera7/YQ7OkzTEAMG0lIzcpR1OXfQT ke+T5mLo6mk7uE+4y0y7uRHsKf2QSTDdobXlK6y3/h7OK4vJZCoUZblmITDYzW50Kh0P 6WIuryb5xfkpsAXMtNAGDvXxMPyyysYeoTM7qyF07Me/7iIh5V3/TVSUUhrm5GN5MYWX M3lHoazyfQAXLJNRPSrQcQywC274eXuWACuWv2B9Pt4tELRZAWt4h3EGVV+4sY2htfTN K99w== X-Gm-Message-State: AIkVDXKZrCGYk+8pzusN0gf9e8dUhgDjUD82Gubf/DZjvwKnTf/oLTuqP0c5EETSSldog7rA6tX2zi85muPDRw== X-Received: by 10.31.65.74 with SMTP id o71mr15176573vka.3.1484651102577; Tue, 17 Jan 2017 03:05:02 -0800 (PST) MIME-Version: 1.0 Received: by 10.103.70.206 with HTTP; Tue, 17 Jan 2017 03:04:32 -0800 (PST) In-Reply-To: <20170116225500.GT1867@tucnak> References: <20170116225500.GT1867@tucnak> From: Andrew Senkevich Date: Tue, 17 Jan 2017 11:05:00 -0000 Message-ID: Subject: Re: [PATCH] Add AVX512 k-mask intrinsics To: Jakub Jelinek Cc: Uros Bizjak , GCC Patches , Kirill Yukhin Content-Type: text/plain; charset=UTF-8 X-SW-Source: 2017-01/txt/msg01184.txt.bz2 2017-01-17 1:55 GMT+03:00 Jakub Jelinek : > On Tue, Jan 17, 2017 at 01:30:11AM +0300, Andrew Senkevich wrote: >> here is one more part of intrinsics for k-mask registers shifts: > > The software developer manuals describe KSHIFT{L,R}* like: > KSHIFTLW > COUNT <- imm8[7:0] > DEST[MAX_KL-1:0] <- 0 > IF COUNT <=15 > THEN DEST[15:0] <- SRC1[15:0] << COUNT; > FI; > > What is the behavior when src1 == dest, like: > kshiftld $3, %k3, %k3 > ? Is it just a bug in the SDM and will it actually do the expected thing > (set %k3 to %k3 << 3 and clear just the upper bits), or do we need > an early-clobber on the destination to make sure GCC never emits these > insns with the same register as both input and output? Indeed, it should be different registers, how to do it? -- WBR, Andrew