From: Hongtao Liu <crazylht@gmail.com>
To: Haochen Jiang <haochen.jiang@intel.com>
Cc: gcc-patches@gcc.gnu.org, ubizjak@gmail.com, hongtao.liu@intel.com
Subject: Re: [PATCH 2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled
Date: Wed, 16 Aug 2023 10:30:17 +0800 [thread overview]
Message-ID: <CAMZc-bw-YqAnpP=AHkmiR1hQ20NqWpm54Wq2-PFUJw+JnmNWsw@mail.gmail.com> (raw)
In-Reply-To: <20230808071312.1569559-3-haochen.jiang@intel.com>
On Tue, Aug 8, 2023 at 3:15 PM Haochen Jiang via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> gcc/ChangeLog:
>
> * config/i386/driver-i386.cc (host_detect_local_cpu):
> Do not append -mno-avx10.1 for -march=native.
> * config/i386/i386-options.cc
> (ix86_check_avx10): New function to check isa_flags and
> isa_flags_explicit to emit warning when AVX10 is enabled
> by "-m" option.
> (ix86_check_avx512): New function to check isa_flags and
> isa_flags_explicit to emit warning when AVX512 is enabled
> by "-m" option.
> (ix86_handle_option): Do not change the flags when warning
> is emitted.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/avx10_1-11.c: New test.
> * gcc.target/i386/avx10_1-12.c: Ditto.
> * gcc.target/i386/avx10_1-13.c: Ditto.
> * gcc.target/i386/avx10_1-14.c: Ditto.
Ok(please wait for extra 24 hours to commit, if there's no objection)
> ---
> gcc/common/config/i386/i386-common.cc | 68 +++++++++++++++++-----
> gcc/config/i386/driver-i386.cc | 2 +-
> gcc/testsuite/gcc.target/i386/avx10_1-11.c | 5 ++
> gcc/testsuite/gcc.target/i386/avx10_1-12.c | 13 +++++
> gcc/testsuite/gcc.target/i386/avx10_1-13.c | 5 ++
> gcc/testsuite/gcc.target/i386/avx10_1-14.c | 13 +++++
> 6 files changed, 91 insertions(+), 15 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-11.c
> create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-12.c
> create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-13.c
> create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-14.c
>
> diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
> index 6c3bebb1846..ec94251dd4c 100644
> --- a/gcc/common/config/i386/i386-common.cc
> +++ b/gcc/common/config/i386/i386-common.cc
> @@ -388,6 +388,46 @@ set_malign_value (const char **flag, unsigned value)
> *flag = r;
> }
>
> +/* Emit a warning when using -mno-avx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,
> + vnni,ifma,bitalg,vpopcntdq} with -mavx10.1 and above. */
> +static bool
> +ix86_check_avx10 (struct gcc_options *opts)
> +{
> + if (opts->x_ix86_isa_flags2 & opts->x_ix86_isa_flags2_explicit
> + & OPTION_MASK_ISA2_AVX10_1)
> + {
> + warning (0, "%<-mno-avx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,vnni,ifma,"
> + "bitalg,vpopcntdq}%> are ignored with %<-mavx10.1%> and above");
> + return false;
> + }
> +
> + return true;
> +}
> +
> +/* Emit a warning when using -mno-avx10.1 with -mavx512{f,vl,bw,dq,cd,bf16,
> + fp16,vbmi,vbmi2,vnni,ifma,bitalg,vpopcntdq}. */
> +static bool
> +ix86_check_avx512 (struct gcc_options *opts)
> +{
> + if ((opts->x_ix86_isa_flags & opts->x_ix86_isa_flags_explicit
> + & (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD
> + | OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512BW
> + | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512IFMA
> + | OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VBMI2
> + | OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VPOPCNTDQ
> + | OPTION_MASK_ISA_AVX512BITALG))
> + || (opts->x_ix86_isa_flags2 & opts->x_ix86_isa_flags2_explicit
> + & (OPTION_MASK_ISA2_AVX512FP16 | OPTION_MASK_ISA2_AVX512BF16)))
> + {
> + warning (0, "%<-mno-avx10.1%> is ignored when using with "
> + "%<-mavx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,vnni,"
> + "ifma,bitalg,vpopcntdq}%>");
> + return false;
> + }
> +
> + return true;
> +}
> +
> /* Implement TARGET_HANDLE_OPTION. */
>
> bool
> @@ -609,7 +649,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512F_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_UNSET;
> @@ -624,7 +664,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512CD_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_UNSET;
> @@ -898,7 +938,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI2_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI2_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VBMI2_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI2_UNSET;
> @@ -913,7 +953,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512FP16_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512FP16_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX512FP16_UNSET;
> opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX512FP16_UNSET;
> @@ -926,7 +966,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VNNI_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VNNI_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VNNI_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VNNI_UNSET;
> @@ -940,7 +980,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags_explicit
> |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET;
> opts->x_ix86_isa_flags_explicit
> @@ -954,7 +994,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BITALG_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BITALG_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512BITALG_UNSET;
> opts->x_ix86_isa_flags_explicit
> @@ -970,7 +1010,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX512BF16_UNSET;
> opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX512BF16_UNSET;
> @@ -1037,7 +1077,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512DQ_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_UNSET;
> @@ -1050,7 +1090,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512BW_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_UNSET;
> @@ -1065,7 +1105,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VL_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_UNSET;
> @@ -1078,7 +1118,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512IFMA_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_UNSET;
> @@ -1091,7 +1131,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_SET;
> }
> - else
> + else if (ix86_check_avx10 (opts))
> {
> opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VBMI_UNSET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_UNSET;
> @@ -1367,7 +1407,7 @@ ix86_handle_option (struct gcc_options *opts,
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
> opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
> }
> - else
> + else if (ix86_check_avx512 (opts))
> {
> opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_1_UNSET;
> opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_1_UNSET;
> diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
> index 08d0aed6183..227ace6ff83 100644
> --- a/gcc/config/i386/driver-i386.cc
> +++ b/gcc/config/i386/driver-i386.cc
> @@ -854,7 +854,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
> options = concat (options, " ",
> isa_names_table[i].option, NULL);
> }
> - else
> + else if (isa_names_table[i].feature != FEATURE_AVX10_1)
> options = concat (options, neg_option,
> isa_names_table[i].option + 2, NULL);
> }
> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-11.c b/gcc/testsuite/gcc.target/i386/avx10_1-11.c
> new file mode 100644
> index 00000000000..10c8d781dd9
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/avx10_1-11.c
> @@ -0,0 +1,5 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2 -march=x86-64 -mavx10.1 -mno-avx512f" } */
> +/* { dg-warning "'-mno-avx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,vnni,ifma,bitalg,vpopcntdq}' are ignored with '-mavx10.1' and above" "" { target *-*-* } 0 } */
> +
> +#include "avx10_1-1.c"
> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-12.c b/gcc/testsuite/gcc.target/i386/avx10_1-12.c
> new file mode 100644
> index 00000000000..b79c92ad002
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/avx10_1-12.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2" } */
> +
> +#include <immintrin.h>
> +
> +__attribute__ ((target ("avx10.1,no-avx512f"))) void
> +f1 ()
> +{ /* { dg-warning "'-mno-avx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,vnni,ifma,bitalg,vpopcntdq}' are ignored with '-mavx10.1' and above" } */
> + register __m256d a __asm ("ymm17");
> + register __m256d b __asm ("ymm16");
> + a = _mm256_add_pd (a, b);
> + asm volatile ("" : "+v" (a));
> +}
> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-13.c b/gcc/testsuite/gcc.target/i386/avx10_1-13.c
> new file mode 100644
> index 00000000000..156d59f1d35
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/avx10_1-13.c
> @@ -0,0 +1,5 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2 -march=x86-64 -mavx512f -mno-avx10.1" } */
> +/* { dg-warning "'-mno-avx10.1' is ignored when using with '-mavx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,vnni,ifma,bitalg,vpopcntdq}'" "" { target *-*-* } 0 } */
> +
> +#include "avx10_1-2.c"
> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-14.c b/gcc/testsuite/gcc.target/i386/avx10_1-14.c
> new file mode 100644
> index 00000000000..23d2ba8bc64
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/avx10_1-14.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=x86-64" } */
> +/* { dg-final { scan-assembler "%zmm" } } */
> +
> +typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__));
> +
> +__attribute__ ((target ("avx512f,no-avx10.1"))) __m512d
> +foo ()
> +{ /* { dg-warning "'-mno-avx10.1' is ignored when using with '-mavx512{f,vl,bw,dq,cd,bf16,fp16,vbmi,vbmi2,vnni,ifma,bitalg,vpopcntdq}'" } */
> + __m512d a, b;
> + a = a + b;
> + return a;
> +}
> --
> 2.31.1
>
--
BR,
Hongtao
next prev parent reply other threads:[~2023-08-16 2:30 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-08 7:13 Intel AVX10.1 Compiler Design and Support Haochen Jiang
2023-08-08 7:13 ` [PATCH 1/3] Initial support for AVX10.1 Haochen Jiang
2023-08-16 2:29 ` Hongtao Liu
2023-08-08 7:13 ` [PATCH 2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled Haochen Jiang
2023-08-16 2:30 ` Hongtao Liu [this message]
2023-08-08 7:13 ` [PATCH 3/3] Emit a warning when AVX10 options conflict in vector width Haochen Jiang
2023-08-16 2:30 ` Hongtao Liu
2023-08-08 7:19 ` [PATCH 1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins Haochen Jiang
2023-08-08 7:20 ` [PATCH 2/6] " Haochen Jiang
2023-08-08 7:20 ` [PATCH 3/6] " Haochen Jiang
2023-08-08 7:20 ` [PATCH 4/6] " Haochen Jiang
2023-08-08 7:20 ` [PATCH 5/6] " Haochen Jiang
2023-08-08 7:20 ` [PATCH 6/6] " Haochen Jiang
2023-08-16 2:36 ` Hongtao Liu
2023-08-08 7:42 ` Intel AVX10.1 Compiler Design and Support Jakub Jelinek
2023-08-08 8:14 ` Jiang, Haochen
2023-08-08 12:44 ` Richard Biener
2023-08-09 2:06 ` Hongtao Liu
2023-08-09 2:08 ` Hongtao Liu
2023-08-09 6:30 ` Jiang, Haochen
2023-08-08 19:55 ` Joseph Myers
2023-08-09 1:21 ` Hongtao Liu
2023-08-09 2:14 ` Hongtao Liu
2023-08-09 2:18 ` Hongtao Liu
2023-08-09 3:59 ` Wang, Phoebe
2023-08-09 20:43 ` Joseph Myers
2023-08-09 20:49 ` Jakub Jelinek
2023-08-10 12:36 ` Phoebe Wang
2023-08-10 12:45 ` Richard Biener
2023-08-10 13:12 ` Phoebe Wang
2023-08-10 13:30 ` Jan Beulich
2023-08-10 13:52 ` Richard Biener
2023-08-10 14:15 ` Jiang, Haochen
2023-08-10 15:08 ` Zhang, Annita
2023-08-10 15:18 ` Jakub Jelinek
2023-08-10 22:16 ` Joseph Myers
2023-08-09 4:01 ` Phoebe Wang
2023-08-09 5:37 ` Richard Biener
2023-08-09 6:24 ` Jiang, Haochen
2023-08-09 8:14 ` Florian Weimer
2023-08-09 8:24 ` Hongtao Liu
2023-08-09 7:17 ` Jan Beulich
2023-08-09 7:38 ` Hongtao Liu
2023-08-09 8:04 ` Jan Beulich
2023-08-09 9:15 ` Florian Weimer
2023-08-09 10:15 ` Hongtao Liu
2023-08-09 10:17 ` Zhang, Annita
2023-08-09 13:54 ` Michael Matz
2023-08-09 14:34 ` Zhang, Annita
2023-08-10 15:08 ` Jiang, Haochen
2023-08-10 16:00 ` Jakub Jelinek
2023-08-19 22:44 ` ZiNgA BuRgA
2023-08-20 5:44 ` Richard Biener
2023-08-21 1:19 ` Hongtao Liu
2023-08-21 7:36 ` Richard Biener
2023-08-21 8:09 ` Jakub Jelinek
2023-08-21 8:28 ` Hongtao Liu
2023-08-21 8:37 ` Jakub Jelinek
2023-08-21 8:46 ` Hongtao Liu
2023-08-21 9:34 ` Richard Biener
2023-08-21 9:36 ` Richard Biener
2023-08-21 9:50 ` Hongtao Liu
2023-08-21 9:26 ` ZiNgA BuRgA
2023-08-22 3:20 ` Jiang, Haochen
2023-08-22 7:36 ` Richard Biener
2023-08-22 8:34 ` Jakub Jelinek
2023-08-22 8:35 ` Richard Biener
2023-08-22 8:52 ` Jiang, Haochen
2023-08-22 9:23 ` Richard Biener
2023-08-22 13:02 ` Hongtao Liu
2023-08-22 13:16 ` Jakub Jelinek
2023-08-22 13:23 ` Richard Biener
2023-08-22 13:35 ` Hongtao Liu
2023-08-22 13:54 ` Jakub Jelinek
2023-08-22 14:35 ` Hongtao Liu
2023-08-22 15:01 ` Jakub Jelinek
2023-08-23 1:57 ` Jiang, Haochen
2023-08-23 2:19 ` Hongtao Liu
2023-08-23 6:47 ` Jiang, Haochen
2023-08-23 8:16 ` Jakub Jelinek
2023-08-23 8:27 ` Hongtao Liu
2023-08-23 7:32 ` Richard Biener
2023-08-23 8:03 ` Jiang, Haochen
2023-08-23 8:31 ` Jakub Jelinek
2023-08-23 8:47 ` Hongtao Liu
2023-08-23 8:24 ` Hongtao Liu
2023-08-22 14:39 ` Hongtao Liu
2023-08-21 7:49 ` ZiNgA BuRgA
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