On Mon, May 16, 2022 at 5:21 PM Uros Bizjak via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> On Sat, May 7, 2022 at 7:05 AM liuhongt <hongtao.liu@intel.com> wrote:
> >
> > This is adjusted patch only for OImode.
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> >         PR target/104610
> >         * config/i386/i386-expand.cc (ix86_expand_branch): Use ptest
> >         for QImode when code is EQ or NE.
> >         * config/i386/sse.md (cbranch<mode>4): Extend to OImode.
> >
> > gcc/testsuite/ChangeLog:
> >
> >         * gcc.target/i386/pr104610.c: New test.
> > ---
> >  gcc/config/i386/i386-expand.cc           | 10 +++++++++-
> >  gcc/config/i386/sse.md                   |  8 ++++++--
> >  gcc/testsuite/gcc.target/i386/pr104610.c | 15 +++++++++++++++
> >  3 files changed, 30 insertions(+), 3 deletions(-)
> >  create mode 100644 gcc/testsuite/gcc.target/i386/pr104610.c
> >
> > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
> > index bc806ffa283..c2f8776102c 100644
> > --- a/gcc/config/i386/i386-expand.cc
> > +++ b/gcc/config/i386/i386-expand.cc
> > @@ -2267,11 +2267,19 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label)
> >
> >    /* Handle special case - vector comparsion with boolean result, transform
> >       it using ptest instruction.  */
> > -  if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
> > +  if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
> > +      || (mode == OImode && (code == EQ || code == NE)))
>
> No need for the code check here. You have an assert in the code below.
>
Changed.
I mistakenly saw the QImode as OImode, I thought OImode other compare
code can also handle.
> >      {
> >        rtx flag = gen_rtx_REG (CCZmode, FLAGS_REG);
> >        machine_mode p_mode = GET_MODE_SIZE (mode) == 32 ? V4DImode : V2DImode;
> >
> > +      if (mode == OImode)
> > +       {
> > +         op0 = lowpart_subreg (p_mode, force_reg (mode, op0), mode);
> > +         op1 = lowpart_subreg (p_mode, force_reg (mode, op1), mode);
> > +         mode = p_mode;
> > +       }
> > +
> >        gcc_assert (code == EQ || code == NE);
>
> Please put the above hunk after the assert.
Changed.
>
> >        /* Generate XOR since we can't check that one operand is zero vector.  */
> >        tmp = gen_reg_rtx (mode);
> > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> > index 7b791def542..9514b8e0234 100644
> > --- a/gcc/config/i386/sse.md
> > +++ b/gcc/config/i386/sse.md
> > @@ -26034,10 +26034,14 @@ (define_expand "maskstore<mode><avx512fmaskmodelower>"
> >           (match_operand:<avx512fmaskmode> 2 "register_operand")))]
> >    "TARGET_AVX512BW")
> >
> > +(define_mode_iterator VI48_OI_AVX
> > +  [(V8SI "TARGET_AVX") (V4DI "TARGET_AVX") (OI "TARGET_AVX")
> > +   V4SI V2DI])
> > +
> >  (define_expand "cbranch<mode>4"
> >    [(set (reg:CC FLAGS_REG)
> > -       (compare:CC (match_operand:VI48_AVX 1 "register_operand")
> > -                   (match_operand:VI48_AVX 2 "nonimmediate_operand")))
> > +       (compare:CC (match_operand:VI48_OI_AVX 1 "register_operand")
> > +                   (match_operand:VI48_OI_AVX 2 "nonimmediate_operand")))
> >     (set (pc) (if_then_else
> >                (match_operator 0 "bt_comparison_operator"
> >                 [(reg:CC FLAGS_REG) (const_int 0)])
>
> Please rather put the new cbranchoi4 expander in i386.md.
Good idea, changed.
>
> > diff --git a/gcc/testsuite/gcc.target/i386/pr104610.c b/gcc/testsuite/gcc.target/i386/pr104610.c
> > new file mode 100644
> > index 00000000000..00866238bd7
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr104610.c
> > @@ -0,0 +1,15 @@
> > +/* { dg-do compile } */
> > +/* { dg-options "-O2 -mmove-max=256 -mstore-max=256" } */
> > +/* { dg-final { scan-assembler-times {(?n)vptest.*ymm} 1 } } */
> > +/* { dg-final { scan-assembler-times {sete} 1 } } */
> > +/* { dg-final { scan-assembler-not {(?n)je.*L[0-9]} } } */
> > +/* { dg-final { scan-assembler-not {(?n)jne.*L[0-9]} } } */
> > +
> > +
> > +#include<stdbool.h>
> > +__attribute__((target("avx")))
> > +bool f256(char *a)
>
> Use _Bool istead and simply pass -mavx to dg-options.
>
Changed.
> Uros.
>
> > +{
> > +  char t[] = "0123456789012345678901234567890";
> > +  return __builtin_memcmp(a, &t[0], sizeof(t)) == 0;
> > +}
> > --
> > 2.18.1
> >


Here's the updated patch.

-- 
BR,
Hongtao