From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe2b.google.com (mail-vs1-xe2b.google.com [IPv6:2607:f8b0:4864:20::e2b]) by sourceware.org (Postfix) with ESMTPS id CA93E38618CC for ; Mon, 19 Oct 2020 09:37:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org CA93E38618CC Received: by mail-vs1-xe2b.google.com with SMTP id d19so5280536vso.10 for ; Mon, 19 Oct 2020 02:37:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=n7fCTmNCtmjQRwWdAXlkohEu/hsYRecuHJZ3iHRp61w=; b=q4RquUt81rigifemKiHy/wEhrqA7cTH9HOpoD9fksLXOY8kQuBT4iXZSQnZlWL+So5 8fl5omkyNna51xdi5EwTSVNTJYkl9QVuG14NlsHc/Tk0l4ApvdxADJNjZzDuZUa+qQ5z ElAtqKRWL/SQbfB05MRsxQUoM6radU2e3O5HWTFsPBevHOcjnEAHRj3lAMRu7uJxoJt/ 3wEZTZ8nXXIzIU9DPjiPUi5IssWAubLPk6aHayFJjivTc6ctPfQHxpGeyY/On7m3ASbn jPKMx2kGjxtUNcqjlyfS+BPVJ7hKYScHBPnQbexiBNavJWQRSdSXRzvShiScj/DT9wkG zVlQ== X-Gm-Message-State: AOAM530Ha+dywONEz23x3K4bAfAEVQi8PlfVLwOZhnSAlgRMT2r6od1w oS24SIEsDaunZ2DHhTTghclAW/Jung8eMAixlpY= X-Google-Smtp-Source: ABdhPJz6GRX+90bgrRkQJGSAMeRtNvVw0BDjVtPj9WxzeTSL8g18ZC29B0VuHb5uiVn5CGBOaB8T5WQ66V4AKQoR0ug= X-Received: by 2002:a05:6102:82f:: with SMTP id k15mr7366440vsb.7.1603100255353; Mon, 19 Oct 2020 02:37:35 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Hongtao Liu Date: Mon, 19 Oct 2020 17:39:09 +0800 Message-ID: Subject: Re: [PATCH] [PR target/97194] [AVX2] Support variable index vec_set. To: Richard Biener Cc: GCC Patches , "H. J. Lu" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Oct 2020 09:37:37 -0000 On Mon, Oct 19, 2020 at 5:07 PM Richard Biener wrote: > > On Mon, Oct 19, 2020 at 10:21 AM Hongtao Liu wrote: > > > > Hi: > > It's implemented as below: > > V setg (V v, int idx, T val) > > > > { > > V idxv = (V){idx, idx, idx, idx, idx, idx, idx, idx}; > > V valv = (V){val, val, val, val, val, val, val, val}; > > V mask = ((V){0, 1, 2, 3, 4, 5, 6, 7} == idxv); > > v = (v & ~mask) | (valv & mask); > > return v; > > } > > > > Bootstrap is fine, regression test for i386/x86-64 backend is ok. > > Ok for trunk? > > Hmm, I guess you're trying to keep the code for !AVX512BW simple > but isn't just splitting the compare into > > clow = {0, 1, 2, 3 ... } == idxv > chigh = {16, 17, 18, ... } == idxv; > cmp = {clow, chigh} > We also don't have 512-bits byte/word blend instructions without TARGET_AVX512W, so how to use 512-bits cmp? cut from i386-expand.c: in ix86_expand_sse_movcc 3682 case E_V64QImode: 3683 gen = gen_avx512bw_blendmv64qi; ---> TARGET_AVX512BW needed 3684 break; 3685 case E_V32HImode: 3686 gen = gen_avx512bw_blendmv32hi; --> TARGET_AVX512BW needed 3687 break; 3688 case E_V16SImode: 3689 gen = gen_avx512f_blendmv16si; 3690 break; 3691 case E_V8DImode: 3692 gen = gen_avx512f_blendmv8di; 3693 break; 3694 case E_V8DFmode: > faster, smaller and eventually even easier during expansion? > > + gcc_assert (ix86_expand_vector_init_duplicate (false, mode, valv, val)); > + gcc_assert (ix86_expand_vector_init_duplicate (false, cmp_mode, > idxv, idx_tmp)); > > side-effects in gcc_assert is considered bad style, use > > ok = ix86_expand_vector_init_duplicate (false, mode, valv, val); > gcc_assert (ok); > > + vec[5] = constv; > + ix86_expand_int_vcond (vec); > > this also returns a bool you probably should assert true. > Yes, will change. > Otherwise thanks for tackling this. > > Richard. > > > gcc/ChangeLog: > > > > PR target/97194 > > * config/i386/i386-expand.c (ix86_expand_vector_set_var): New function. > > * config/i386/i386-protos.h (ix86_expand_vector_set_var): New Decl. > > * config/i386/predicates.md (vec_setm_operand): New predicate, > > true for const_int_operand or register_operand under TARGET_AVX2. > > * config/i386/sse.md (vec_set): Support both constant > > and variable index vec_set. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/i386/avx2-vec-set-1.c: New test. > > * gcc.target/i386/avx2-vec-set-2.c: New test. > > * gcc.target/i386/avx512bw-vec-set-1.c: New test. > > * gcc.target/i386/avx512bw-vec-set-2.c: New test. > > * gcc.target/i386/avx512f-vec-set-2.c: New test. > > * gcc.target/i386/avx512vl-vec-set-2.c: New test. > > > > -- > > BR, > > Hongtao -- BR, Hongtao