From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb2c.google.com (mail-yb1-xb2c.google.com [IPv6:2607:f8b0:4864:20::b2c]) by sourceware.org (Postfix) with ESMTPS id E25943814FC2 for ; Mon, 30 May 2022 08:35:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E25943814FC2 Received: by mail-yb1-xb2c.google.com with SMTP id r82so7958769ybc.13 for ; Mon, 30 May 2022 01:35:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=F1+ZnBHkftTkO8NXjZ3iPFAklapMnW42hqQcpNkiBXM=; b=BWj6sy0BbvKxOGnCtkmZIqJ8lKcc3Cz4gxJGwYpqA8qO1NZ4qJL9crTvdwUiT5dODk 8dxZVV9rSeSbvMsQuVNk9fCnPuKlNUF16k54MnanFkgSVfKHs4hdUNXdrP9yRctOQJoA glgmYPcxPHMlfk+PSGrt6fqzzRijMCFY8i/0ZUCpgqOcJAHeLcJ/mWdd0E/tnV6jgF7b fkfxnJsVyDS0Tj3Tp2Zhw4r2yvsApUdCopyUPhgCXp8b5dSKFGCTfCG44xWvgqbymY5n KJMRLcEdnt5616NVQ7W59IBI2rCO6t2YrJpytZZmmqn7maDcaWuzbMrKgiYhh8iJOjcs hJlQ== X-Gm-Message-State: AOAM530Vt6TLXBtd0M0+MrjDGM+WbryJvlKp5QAujB7Ehf7YgVM9QIwi d/E1rwdeUYApbNxwcpBiDtq8sbDAe30w+TAW8Vc= X-Google-Smtp-Source: ABdhPJz1Dr9YhJ3xA81rIhfseMItaWyqO88th76WEhb2vtFd8TnIimOJ9e94gYhNr3bkuzbA4eZVjTgj9L+BVzy6X1g= X-Received: by 2002:a25:680e:0:b0:65c:bc72:94f4 with SMTP id d14-20020a25680e000000b0065cbc7294f4mr5897080ybc.251.1653899702972; Mon, 30 May 2022 01:35:02 -0700 (PDT) MIME-Version: 1.0 References: <20220525033920.77449-1-hongtao.liu@intel.com> <61cfc852-ed8e-1653-e94e-df5de7b3fc6f@ispras.ru> <84222b52-96f0-556e-6c14-6d3f5bd55ab@ispras.ru> In-Reply-To: <84222b52-96f0-556e-6c14-6d3f5bd55ab@ispras.ru> From: Hongtao Liu Date: Mon, 30 May 2022 16:34:52 +0800 Message-ID: Subject: Re: [PATCH] Add a bit dislike for separate mem alternative when op is REG_P. To: Alexander Monakov Cc: "Liu, Hongtao" , "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 May 2022 08:35:05 -0000 On Mon, May 30, 2022 at 3:44 PM Alexander Monakov wrote: > > On Mon, 30 May 2022, Hongtao Liu wrote: > > > On Mon, May 30, 2022 at 2:22 PM Alexander Monakov via Gcc-patches > > wrote: > > > > > > > > The spill is mainly decided by 3 insns related to r92 > > > > > > > > 283(insn 3 61 4 2 (set (reg/v:SF 92 [ x ]) > > > > 284 (reg:SF 102)) "test3.c":7:1 142 {*movsf_internal} > > > > 285 (expr_list:REG_DEAD (reg:SF 102) > > > > > > > > 288(insn 9 4 12 2 (set (reg:SI 89 [ _11 ]) > > > > 289 (subreg:SI (reg/v:SF 92 [ x ]) 0)) "test3.c":3:36 81 {*movsi_internal} > > > > 290 (nil)) > > > > > > > > And > > > > 382(insn 28 27 29 5 (set (reg:DF 98) > > > > 383 (float_extend:DF (reg/v:SF 92 [ x ]))) "test3.c":11:13 163 {*extendsfdf2} > > > > 384 (expr_list:REG_DEAD (reg/v:SF 92 [ x ]) > > > > 385 (nil))) > > > > 386(insn 29 28 30 5 (s > > > > > > > > The frequency the for INSN 3 and INSN 9 is not affected, but frequency of INSN > > > > 28 drop from 805 -> 89 after swapping "unlikely" and "likely". Because of > > > > that, GPR cost decreases a lot, finally make the RA choose GPR instead of MEM. > > > > > > > > GENERAL_REGS:2356,2356 > > > > SSE_REGS:6000,6000 > > > > MEM:4089,4089 > > > > > > But why are SSE_REGS costed so high? r92 is used in SFmode, it doesn't make > > > sense that selecting a GPR for it looks cheaper than xmm0. > > For INSN3 and INSN 28, SSE_REGS costs zero. > > But for INSN 9, it's a SImode move, we have disparaged non-gpr > > alternatives in movsi_internal pattern which finally makes SSE_REGS > > costs 6 * 1000(1000 is frequency, 6 is move cost between SSE_REGS and > > GPR, sse_to_integer/integer_to_sse). > > But wait, selecting a GPR for r92 makes insn 3 (movsf_internal) an > sse-to-integer move, so it should be equally high cost? Not to mention > that the use in insn 28 (extendsfdf2) should have higher cost also. > > Why does GPR cost 2356 instead of 6000 for insn 3 plus extra for insn 28? First GPR cost in insn 3 is not necessarily equal to integer_to_sse, it's the minimal cost of all alternatives, and one alternative is ?r, the cost is 2. I think the difference in movsf_internal and movsi_internal for *v and ?r make RA finally choose GPR. > > Alexander -- BR, Hongtao