From: Hongtao Liu <crazylht@gmail.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: liuhongt <hongtao.liu@intel.com>,
GCC Patches <gcc-patches@gcc.gnu.org>,
Joseph Myers <joseph@codesourcery.com>
Subject: Re: [PATCH 2/6] [i386] Enable _Float16 type for TARGET_SSE2 and above.
Date: Tue, 7 Sep 2021 09:52:57 +0800 [thread overview]
Message-ID: <CAMZc-bwH0hQEFqh1dnHYA1dnGrrYyrbtXhpeXXLjjVnhrNW4dg@mail.gmail.com> (raw)
In-Reply-To: <20210906121310.GV920497@tucnak>
On Mon, Sep 6, 2021 at 8:13 PM Jakub Jelinek <jakub@redhat.com> wrote:
>
> On Mon, Sep 06, 2021 at 10:05:00AM +0800, Hongtao Liu wrote:
>
> > @@ -1076,9 +1076,11 @@ systems where @code{__float128} is supported.
> > The @code{_Float32}
> > type is supported on all systems supporting IEEE binary32; the
> > @code{_Float64} and @code{_Float32x} types are supported on all systems
> > supporting IEEE binary64. The @code{_Float16} type is supported on AArch64
> > -systems by default, and on ARM systems when the IEEE format for 16-bit
> > -floating-point types is selected with @option{-mfp16-format=ieee}.
> > -GCC does not currently support @code{_Float128x} on any systems.
> > +systems by default, and also on x86 systems with @code{target("sse2")}
> > +for both C and C++.
> > +On ARM systems when the IEEE format for 16-bit floating-point types is
> > +selected with @option{-mfp16-format=ieee}.
>
> This isn't a sentence. I think it should be:
>
> The @code{_Float16} type is supported on AArch64 systems by default,
> on ARM systems when the IEEE format for 16-bit floating-point types is
> selected with @option{-mfp16-format=ieee} and, for both C and C++, on x86
> systems with SSE2 enabled.
>
> > On the i386, x86_64, IA-64, and HP-UX targets, you can declare complex
> > types using the corresponding internal complex type, @code{XCmode} for
> > @@ -1108,6 +1110,10 @@ On ARM and AArch64 targets, GCC supports
> > half-precision (16-bit) floating
> > point via the @code{__fp16} type defined in the ARM C Language Extensions.
> > On ARM systems, you must enable this type explicitly with the
> > @option{-mfp16-format} command-line option in order to use it.
> > +On x86 targets with @code{target("sse2")} and above, GCC supports
> > +half-precision (16-bit) floating point via the @code{_Float16} type.
> > +For C++, x86 provides a builtin type named @code{_Float16} which contains
> > +same data format as C.
>
> Again, I'd write with SSE2 enabled, there are many ways to enable SSE2,
> -msse2, -mavx, -mavx512f, ... on the command line, or various target
> attributes.
Adjust the wording for x86 _Float16 type.
gcc/ChangeLog:
* doc/extend.texi: (@node Floating Types): Adjust the wording.
(@node Half-Precision): Ditto.
1 file changed, 15 insertions(+), 13 deletions(-)
gcc/doc/extend.texi | 28 +++++++++++++++-------------
modified gcc/doc/extend.texi
@@ -1076,9 +1076,10 @@ systems where @code{__float128} is supported.
The @code{_Float32}
type is supported on all systems supporting IEEE binary32; the
@code{_Float64} and @code{_Float32x} types are supported on all systems
supporting IEEE binary64. The @code{_Float16} type is supported on AArch64
-systems by default, and on ARM systems when the IEEE format for 16-bit
-floating-point types is selected with @option{-mfp16-format=ieee}.
-GCC does not currently support @code{_Float128x} on any systems.
+systems by default when the IEEE format for 16-bit floating-point types is
+selected with @option{-mfp16-format=ieee} and, for both C and C++, on x86
+systems with SSE2 enabled. GCC does not currently support
+@code{_Float128x} on any systems.
On the i386, x86_64, IA-64, and HP-UX targets, you can declare complex
types using the corresponding internal complex type, @code{XCmode} for
@@ -1108,6 +1109,12 @@ On ARM and AArch64 targets, GCC supports
half-precision (16-bit) floating
point via the @code{__fp16} type defined in the ARM C Language Extensions.
On ARM systems, you must enable this type explicitly with the
@option{-mfp16-format} command-line option in order to use it.
+On x86 targets with SSE2 enabled, GCC supports half-precision (16-bit)
+floating point via the @code{_Float16} type, there are many ways to enable
+SSE2, @option{-msse2, -mavx, -mavx512f, ...} on the command line, or various
+target attributes.
+For C++, x86 provides a builtin type named @code{_Float16} which contains
+same data format as C.
ARM targets support two incompatible representations for half-precision
floating-point values. You must choose one of the representations and
@@ -1151,16 +1158,11 @@ calls.
It is recommended that portable code use the @code{_Float16} type defined
by ISO/IEC TS 18661-3:2015. @xref{Floating Types}.
-On x86 targets with @code{target("sse2")} and above, GCC supports
half-precision
-(16-bit) floating point via the @code{_Float16} type which is defined by
-18661-3:2015. For C++, x86 provide a builtin type named @code{_Float16}
-which contains same data format as C.
-
-Without @option{-mavx512fp16}, @code{_Float16} type is storage only, all
-operations will be emulated by software emulation and the @code{float}
-instructions. The default behavior for @code{FLT_EVAL_METHOD} is to keep
-the intermediate result of the operation as 32-bit precision. This may lead
-to inconsistent behavior between software emulation and AVX512-FP16
+On x86 targets, without @option{-mavx512fp16}, @code{_Float16} type is
+storage only, all operations will be emulated by software emulation and the
+@code{float} instructions. The default behavior for @code{FLT_EVAL_METHOD} is
+to keep the intermediate result of the operation as 32-bit precision. This may
+lead to inconsistent behavior between software emulation and AVX512-FP16
instructions.
@node Decimal Float
>
> Jakub
>
--
BR,
Hongtao
next prev parent reply other threads:[~2021-09-07 1:47 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210701054808.39000-1-hongtao.liu@intel.com>
2021-07-01 5:55 ` [PATCH 0/2] Initial support for AVX512FP16 Hongtao Liu
2021-07-01 20:46 ` Joseph Myers
2021-07-06 8:53 ` Hongtao Liu
[not found] ` <20210701054808.39000-3-hongtao.liu@intel.com>
2021-07-01 5:55 ` [PATCH 2/2] AVX512FP16: Add HFmode support in libgcc Hongtao Liu
[not found] ` <20210701054808.39000-2-hongtao.liu@intel.com>
2021-07-01 5:55 ` [PATCH 1/2] AVX512FP16: Initial support for _Float16 type and AVX512FP16 feature Hongtao Liu
2021-07-01 11:10 ` [PATCH 0/2] Initial support for AVX512FP16 Uros Bizjak
2021-07-01 12:39 ` H.J. Lu
2021-07-01 12:58 ` Richard Biener
2021-07-01 13:03 ` Jakub Jelinek
2021-07-06 8:51 ` Hongtao Liu
2021-07-06 10:14 ` Richard Biener
2021-07-06 12:11 ` H.J. Lu
2021-07-06 18:20 ` Joseph Myers
2021-07-06 18:18 ` Joseph Myers
2021-07-06 18:11 ` Joseph Myers
2021-07-07 1:24 ` Hongtao Liu
2021-07-14 7:50 ` Hongtao Liu
2021-07-14 15:32 ` [llvm-dev] " Craig Topper
2021-07-15 2:07 ` Wang, Pengfei
2021-07-15 6:34 ` Hongtao Liu
2021-07-15 6:57 ` Wang, Pengfei
2021-07-15 7:49 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH V2 00/10] " liuhongt
2021-07-21 7:43 ` [PATCH 01/10] Update hf soft-fp from glibc liuhongt
2021-07-21 7:43 ` [PATCH 02/10] [i386] Enable _Float16 type for TARGET_SSE2 and above liuhongt
2021-07-21 10:35 ` Uros Bizjak
2021-07-22 5:21 ` Hongtao Liu
2021-07-22 11:56 ` Richard Biener
2021-07-28 21:56 ` Joseph Myers
2021-07-29 4:53 ` Hongtao Liu
2021-07-29 5:34 ` Hongtao Liu
2021-07-29 21:30 ` Joseph Myers
2021-08-02 5:23 ` Hongtao Liu
2021-08-02 6:31 ` [PATCH V3 0/6] Initial support for AVX512FP16 liuhongt
2021-08-02 6:31 ` [PATCH 1/6] Update hf soft-fp from glibc liuhongt
2021-08-02 6:31 ` [PATCH 2/6] [i386] Enable _Float16 type for TARGET_SSE2 and above liuhongt
2021-08-04 2:45 ` Hongtao Liu
2021-08-04 11:28 ` Richard Biener
2021-08-05 7:31 ` Hongtao Liu
2021-08-05 7:39 ` Hongtao Liu
2021-08-05 9:24 ` Richard Biener
2021-08-05 9:49 ` Hongtao Liu
2021-08-05 10:14 ` Richard Biener
2021-08-06 3:32 ` [PATCH] Make sure we're playing with integral modes before call extract_integral_bit_field liuhongt
2021-08-06 3:44 ` Andrew Pinski
2021-08-06 4:59 ` Hongtao Liu
2021-08-06 5:52 ` Hongtao Liu
2021-08-06 6:59 ` Richard Biener
2021-08-06 6:57 ` Richard Biener
2021-08-06 9:05 ` Richard Sandiford
2021-08-06 11:27 ` Richard Biener
2021-08-09 8:34 ` Hongtao Liu
2021-08-17 1:52 ` Hongtao Liu
2021-08-24 9:40 ` Hongtao Liu
2021-08-24 9:44 ` Hongtao Liu
2021-08-24 11:38 ` Richard Biener
2021-08-26 1:17 ` Hongtao Liu
2021-08-25 23:16 ` Jeff Law
2021-08-26 2:05 ` Hongtao Liu
2021-08-26 7:11 ` Richard Biener
2021-08-26 9:06 ` Richard Sandiford
2021-08-26 10:14 ` Richard Biener
2021-08-26 10:50 ` Richard Sandiford
2021-08-26 11:09 ` Richard Biener
2021-08-27 4:56 ` Hongtao Liu
2021-08-30 19:09 ` Joseph Myers
2021-08-30 21:15 ` Jeff Law
2021-08-31 6:10 ` Richard Biener
2021-08-31 6:30 ` Hongtao Liu
2021-08-31 6:48 ` Hongtao Liu
2021-08-31 11:16 ` Richard Biener
2021-08-31 11:17 ` [PATCH 0/2] Get rid of all float-int special cases in validate_subreg liuhongt
2021-08-31 11:17 ` [PATCH 1/2] Revert "Make sure we're playing with integral modes before call extract_integral_bit_field." liuhongt
2021-08-31 11:17 ` [PATCH 2/2] Get rid of all float-int special cases in validate_subreg liuhongt
2021-08-31 11:57 ` Richard Biener
2021-09-02 17:55 ` Segher Boessenkool
2021-09-03 15:05 ` Andreas Schwab
2021-09-07 23:19 ` Segher Boessenkool
2021-09-08 0:55 ` Hongtao Liu
2021-09-03 12:42 ` [PATCH 2/6] [i386] Enable _Float16 type for TARGET_SSE2 and above Jakub Jelinek
2021-09-06 2:05 ` Hongtao Liu
2021-09-06 12:13 ` Jakub Jelinek
2021-09-07 1:52 ` Hongtao Liu [this message]
2021-09-07 7:17 ` Jakub Jelinek
2021-09-07 10:08 ` Hongtao Liu
2021-09-07 10:10 ` Jakub Jelinek
2021-08-02 6:31 ` [PATCH 3/6] [i386] libgcc: Enable hfmode soft-sf/df/xf/tf extensions and truncations liuhongt
2021-08-02 6:31 ` [PATCH 4/6] Support -fexcess-precision=16 which will enable FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16 when backend supports _Float16 liuhongt
2021-08-02 19:34 ` Joseph Myers
2021-08-03 2:44 ` Hongtao Liu
2021-08-06 6:06 ` Hongtao Liu
2021-08-17 1:53 ` Hongtao Liu
2021-08-24 9:39 ` Hongtao Liu
2021-09-02 6:06 ` Hongtao Liu
2021-08-02 6:39 ` [PATCH 6/6] AVX512FP16: Support vector init/broadcast/set/extract for FP16 liuhongt
2021-08-02 6:44 ` [PATCH 5/6] AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instructions liuhongt
2021-08-04 2:40 ` Hongtao Liu
2021-08-04 9:55 ` Uros Bizjak
2021-09-02 6:06 ` [PATCH V3 0/6] Initial support for AVX512FP16 Hongtao Liu
2021-09-02 11:30 ` Iain Sandoe
2021-09-02 15:18 ` Hongtao Liu
2021-09-02 16:44 ` Iain Sandoe
2021-09-02 20:03 ` Joseph Myers
2021-09-03 7:51 ` Iain Sandoe
2021-09-03 15:33 ` Iain Sandoe
2021-09-21 20:11 ` Joseph Myers
2021-09-21 20:25 ` Iain Sandoe
2021-09-22 7:08 ` Iain Sandoe
2021-09-22 19:50 ` Joseph Myers
2021-09-02 15:30 ` H.J. Lu
2021-09-02 15:50 ` Hongtao Liu
2021-09-02 19:45 ` Joseph Myers
2021-07-21 7:43 ` [PATCH 03/10] [i386] libgcc: Enable hfmode soft-sf/df/xf/tf extensions and truncations liuhongt
2021-07-21 10:51 ` Uros Bizjak
2021-07-22 12:14 ` Richard Biener
2021-07-27 5:32 ` Hongtao Liu
2021-07-29 20:57 ` Joseph Myers
2021-08-02 5:10 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH 04/10] AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instructions liuhongt
2021-07-22 8:49 ` Uros Bizjak
2021-07-27 7:31 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH 05/10] AVX512FP16: Support vector init/broadcast/set/extract for FP16 liuhongt
2021-07-22 5:24 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH 06/10] AVX512FP16: Add testcase for vector init and broadcast intrinsics liuhongt
2021-07-21 7:43 ` [PATCH 07/10] AVX512FP16: Add tests for vector passing in variable arguments liuhongt
2021-07-21 7:43 ` [PATCH 08/10] AVX512FP16: Add ABI tests for xmm liuhongt
2021-07-21 7:43 ` [PATCH 09/10] AVX512FP16: Add ABI test for ymm liuhongt
2021-07-21 7:43 ` [PATCH 10/10] AVX512FP16: Add abi test for zmm liuhongt
2021-09-08 2:54 ` [PATCH V2 00/10] Initial support for AVX512FP16 Hongtao Liu
2021-09-08 3:02 ` Hongtao Liu
2021-07-01 12:58 ` [PATCH 0/2] " Uros Bizjak
2021-07-01 21:40 ` Joseph Myers
2021-07-02 6:30 ` Hongtao Liu
2021-07-02 8:03 ` Uros Bizjak
2021-07-02 8:19 ` Richard Biener
2021-07-03 14:44 ` Hongtao Liu
2021-07-05 1:25 ` Hongtao Liu
2021-07-05 11:02 ` Richard Biener
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