From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by sourceware.org (Postfix) with ESMTPS id 6A1953858C54 for ; Mon, 9 May 2022 00:58:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6A1953858C54 Received: by mail-ej1-x632.google.com with SMTP id i19so23890267eja.11 for ; Sun, 08 May 2022 17:58:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=SICH5aXFly9QrDSJyLHCgi0uUUAX6ngpa/VNyltocTg=; b=WOXZ0ZLrbWTSEDq1bTFYNPrnjPSx45X0WF+N5KIjsWmJBZkmOighOZThOVxbvlPkCf RXNwenB1qQbjVsxnZ1wYr6BtNI55+wEThlaFGUm+/FidIZneuFXCZXAfJRJwBg8MyMAn pA2cNA5WRKzzYs3bvEwaSF1gUzipmGQFB/NVWWufNnEF+xGh6g6wtAYkN1krustzIa4R lAF6dO1YEdZu+55dq3oiWvyUjCV+M5x4sM99hnAE8eNUVzr6vcZyYNX9YIUjlDyZv65t bS1EqmfJLzImWrWyrEWEKo79lNDrRnw+nYLAGY4qP03dFd65fh04asYSuSEmpFFRnWa5 5fMQ== X-Gm-Message-State: AOAM530kQ1mea+LPonw0MOZ8jJZ76f3QQRMmlKiZGjalJckVGs/bVjih 7X09vI4dnVFsZ7DJyGqPdU7HLsklEYzMO8jV+z8= X-Google-Smtp-Source: ABdhPJyjN3C5zdyybyDjF1jy00XPRUrxk0L6SxjJIY3SxD8bRoKfubZTatqcsa8Cu610yG3avHS6lnkWwi88jFyStbQ= X-Received: by 2002:a17:906:4fd5:b0:6f8:5aa9:6f13 with SMTP id i21-20020a1709064fd500b006f85aa96f13mr8129683ejw.267.1652057885911; Sun, 08 May 2022 17:58:05 -0700 (PDT) MIME-Version: 1.0 References: <20220507050523.8554-1-hongtao.liu@intel.com> In-Reply-To: <20220507050523.8554-1-hongtao.liu@intel.com> From: Hongtao Liu Date: Mon, 9 May 2022 08:57:54 +0800 Message-ID: Subject: Re: [PATCH] Expand __builtin_memcmp_eq with ptest for OImode. To: Uros Bizjak Cc: GCC Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 May 2022 00:58:09 -0000 On Sat, May 7, 2022 at 1:05 PM liuhongt via Gcc-patches wrote: > > This is adjusted patch only for OImode. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for trunk? > > gcc/ChangeLog: > > PR target/104610 > * config/i386/i386-expand.cc (ix86_expand_branch): Use ptest > for QImode when code is EQ or NE. > * config/i386/sse.md (cbranch4): Extend to OImode. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/pr104610.c: New test. > --- > gcc/config/i386/i386-expand.cc | 10 +++++++++- > gcc/config/i386/sse.md | 8 ++++++-- > gcc/testsuite/gcc.target/i386/pr104610.c | 15 +++++++++++++++ > 3 files changed, 30 insertions(+), 3 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/pr104610.c > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc > index bc806ffa283..c2f8776102c 100644 > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -2267,11 +2267,19 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label) > > /* Handle special case - vector comparsion with boolean result, transform > it using ptest instruction. */ > - if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT) > + if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT > + || (mode == OImode && (code == EQ || code == NE))) > { > rtx flag = gen_rtx_REG (CCZmode, FLAGS_REG); > machine_mode p_mode = GET_MODE_SIZE (mode) == 32 ? V4DImode : V2DImode; > > + if (mode == OImode) > + { > + op0 = lowpart_subreg (p_mode, force_reg (mode, op0), mode); > + op1 = lowpart_subreg (p_mode, force_reg (mode, op1), mode); > + mode = p_mode; > + } > + > gcc_assert (code == EQ || code == NE); > /* Generate XOR since we can't check that one operand is zero vector. */ > tmp = gen_reg_rtx (mode); > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index 7b791def542..9514b8e0234 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -26034,10 +26034,14 @@ (define_expand "maskstore" > (match_operand: 2 "register_operand")))] > "TARGET_AVX512BW") > > +(define_mode_iterator VI48_OI_AVX > + [(V8SI "TARGET_AVX") (V4DI "TARGET_AVX") (OI "TARGET_AVX") > + V4SI V2DI]) > + > (define_expand "cbranch4" > [(set (reg:CC FLAGS_REG) > - (compare:CC (match_operand:VI48_AVX 1 "register_operand") > - (match_operand:VI48_AVX 2 "nonimmediate_operand"))) > + (compare:CC (match_operand:VI48_OI_AVX 1 "register_operand") > + (match_operand:VI48_OI_AVX 2 "nonimmediate_operand"))) > (set (pc) (if_then_else > (match_operator 0 "bt_comparison_operator" > [(reg:CC FLAGS_REG) (const_int 0)]) > diff --git a/gcc/testsuite/gcc.target/i386/pr104610.c b/gcc/testsuite/gcc.target/i386/pr104610.c > new file mode 100644 > index 00000000000..00866238bd7 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr104610.c > @@ -0,0 +1,15 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mmove-max=256 -mstore-max=256" } */ > +/* { dg-final { scan-assembler-times {(?n)vptest.*ymm} 1 } } */ > +/* { dg-final { scan-assembler-times {sete} 1 } } */ > +/* { dg-final { scan-assembler-not {(?n)je.*L[0-9]} } } */ > +/* { dg-final { scan-assembler-not {(?n)jne.*L[0-9]} } } */ > + > + > +#include > +__attribute__((target("avx"))) > +bool f256(char *a) > +{ > + char t[] = "0123456789012345678901234567890"; > + return __builtin_memcmp(a, &t[0], sizeof(t)) == 0; > +} > -- > 2.18.1 > -- BR, Hongtao