From: Hongtao Liu <crazylht@gmail.com>
To: "Martin Liška" <mliska@suse.cz>
Cc: liuhongt <hongtao.liu@intel.com>,
gcc-patches@gcc.gnu.org, hjl.tools@gmail.com, ubizjak@gmail.com,
Florian Weimer <fweimer@redhat.com>
Subject: Re: [PATCH 0/2] Support HWASAN with Intel LAM
Date: Fri, 9 Dec 2022 10:04:02 +0800 [thread overview]
Message-ID: <CAMZc-bwg0zKaCMM=2NEKFMLZgRiXrd89AtsY=HNgs2f7A4dRYA@mail.gmail.com> (raw)
In-Reply-To: <b9b429a6-f83b-dfcb-2548-1df802fe707f@suse.cz>
On Wed, Nov 30, 2022 at 10:07 PM Martin Liška <mliska@suse.cz> wrote:
>
> On 11/29/22 03:37, Hongtao Liu wrote:
> > On Mon, Nov 28, 2022 at 10:40 PM Martin Liška <mliska@suse.cz> wrote:
> >>
> >> On 11/11/22 02:26, liuhongt via Gcc-patches wrote:
> >>> 2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> >>> target hooks(Many thanks to their work) so other backends can do similar
> >>> things if they have similar feature.
> >>> Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> >>> the upper bits of pointers can be used as metadata, LAM support two modes:
> >>> LAM_U48:bits 48-62 can be used as metadata
> >>> LAM_U57:bits 57-62 can be used as metedata.
> >>>
> >>> These 2 patches mainly support those target hooks, but HWASAN is not really
> >>> enabled until the final decision for the LAM kernel interface which may take
> >>> quite a long time. We have verified our patches with a "fake" interface locally[4], and
> >>> decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> >>> easy.
I've committed 2 patches.
> >>
> >> Hello.
> >>
> >> A few random comments I noticed:
> >>
> >> 1) please document the new target -mlam in extend.texi
> > I will.
>
> Thanks.
>
> >> 2) the description speaks about bits [48-62] or [57-62], can explain why the patch contains:
> >>
> > Kernel will use bit 63 for special purposes, and here we want to
> > extract the tag by shifting right the pointer 57 bits, and need to
> > manually mask off bit63.
>
> And thanks for the explanation.
>
> Martin
>
> >> + /* Mask off bit63 when LAM_U57. */
> >> + if (ix86_lam_type == lam_u57)
> >> ?
> >>
> >> 3) Shouldn't the -lman option emit GNU_PROPERTY_X86_FEATURE_1_LAM_U57 or GNU_PROPERTY_X86_FEATURE_1_LAM_U48
> >> .gnu.property note?
> >>
> >> 4) Can you please explain Florian's comment here:
> >> https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13#note_1181396487
> >>
> >> Thanks,
> >> Martin
> >>
> >>>
> >>> [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> >>> [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> >>> [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> >>> [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
> >>>
> >>>
> >>> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> >>> Ok for trunk?
> >>>
> >>> liuhongt (2):
> >>> Implement hwasan target_hook.
> >>> Enable hwasan for x86-64.
> >>>
> >>> gcc/config/i386/i386-expand.cc | 12 ++++
> >>> gcc/config/i386/i386-options.cc | 3 +
> >>> gcc/config/i386/i386-opts.h | 6 ++
> >>> gcc/config/i386/i386-protos.h | 2 +
> >>> gcc/config/i386/i386.cc | 123 ++++++++++++++++++++++++++++++++
> >>> gcc/config/i386/i386.opt | 16 +++++
> >>> libsanitizer/configure.tgt | 1 +
> >>> 7 files changed, 163 insertions(+)
> >>>
> >>
> >
> >
>
--
BR,
Hongtao
prev parent reply other threads:[~2022-12-09 2:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 1:26 liuhongt
2022-11-11 1:26 ` [PATCH 1/2] Implement hwasan target_hook liuhongt
2022-11-30 5:21 ` [PATCH 1/2 V2] " liuhongt
2022-11-11 1:26 ` [PATCH 2/2] Enable hwasan for x86-64 liuhongt
2022-11-28 3:35 ` [PATCH 0/2] Support HWASAN with Intel LAM Hongtao Liu
2022-11-28 7:12 ` Uros Bizjak
2022-11-28 14:40 ` Martin Liška
2022-11-29 2:10 ` H.J. Lu
2022-11-29 2:37 ` Hongtao Liu
2022-11-30 14:07 ` Martin Liška
2022-12-09 2:04 ` Hongtao Liu [this message]
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