From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb2b.google.com (mail-yb1-xb2b.google.com [IPv6:2607:f8b0:4864:20::b2b]) by sourceware.org (Postfix) with ESMTPS id 7E9D33857343 for ; Thu, 4 May 2023 03:17:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7E9D33857343 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yb1-xb2b.google.com with SMTP id 3f1490d57ef6-b9a6ab9ede3so23711276.2 for ; Wed, 03 May 2023 20:17:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683170277; x=1685762277; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=s6PlGAMHxjpOdNegdvbn/Dkwns+i1d2VDnRZVxvniYg=; b=VTBTt2wCa8PQzcxCuq3ztzxeJCNtcYLzM6W239WIJv6CZUUJoUYTLzemjnC9wCGZED w1l3TgEm5SaFrz2iLd8zynwkkp6wv0KxjtOvCxtjMkgl3scKzlHtOzF+OdSlTWJqRK+x id8oqXCtA9+NS/B9yi/pp2rFeJGmIaeO0GEq/oJ0QJvF4vavZ3v77cOFwNAlHIC+2u3g C1widmz7Nl3emuDQwjtoKGX2BBi70KSaUwzwF52jZYKBy/2lgXHjillksjrjivgXhEu0 /T/KIefE8wTTtK1v2fpuEB+usQg12rg+jacOe1UIayaepoPbnmvLzjvEpyzx7tlIhCyl vCWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683170277; x=1685762277; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s6PlGAMHxjpOdNegdvbn/Dkwns+i1d2VDnRZVxvniYg=; b=IRFXINWhjcmzm03XgEQ2i/n8+UCEpR0ogmHKU8CS345ogHMP5JltIEvbgrLmXrN9s0 VJvCwPNqfQJkjl+NTGdyd09iiG4iA6q3Xzsuv4tcumcPvLa2ntvNhbVUUhPICB2vwJsG +g9Oz4Kr2qsaoFzHBpOKWezW3yEYZb/qggq0AFQTViWV7iZ1ohfEMzLnEOyNaP0Zq5Zd ZktqTr48TWgB71xTcXUl7AABe+Njs5dLO/5mvrvkOydsvWCtlPcbdxfgU3XtarbkKNRF umMe/2BzDvI4+nDv19D3oHqzF1UPMnUAvOU90O/SdsDMTmgCxMgLQfAzTFZ9Hgge6lwx Iisw== X-Gm-Message-State: AC+VfDxMARV1oWrh9Ydqw6KyDYu96mgp0XTYRss6Hqika5eDRIFZJskn SHOVt3aGSOYJ1UK3IUDaV6nJ4qN2b7hvMhevI50= X-Google-Smtp-Source: ACHHUZ4PKm+dH7dlH1W6/9QhbodpU4aczd51bjw3k7XfnBsu+WdMcdzH/85o+12vPr6P5A0/81002zJo5mF0jFnRP6o= X-Received: by 2002:a25:c0cb:0:b0:b9a:7cfe:9bed with SMTP id c194-20020a25c0cb000000b00b9a7cfe9bedmr20590724ybf.14.1683170276746; Wed, 03 May 2023 20:17:56 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Hongtao Liu Date: Thu, 4 May 2023 11:17:45 +0800 Message-ID: Subject: Re: [PATCH] i386: Fix up handling of debug insns in STV [PR109676] To: Jakub Jelinek Cc: Uros Bizjak , Hongtao Liu , hjl.tools@gmail.com, gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, May 2, 2023 at 4:08=E2=80=AFPM Jakub Jelinek via Gcc-patches wrote: > > Hi! > > The following testcase ICEs because STV replaces there > (debug_insn 114 47 51 8 (var_location:TI D#3 (reg:TI 91 [ p ])) -1 > (nil)) > with > (debug_insn 114 47 51 8 (var_location:TI D#3 (reg:V1TI 91 [ p ])) -1 > (nil)) > which is invalid because of the mode mismatch. > STV has fix_debug_reg_uses function which is supposed to fix this up > and adjust such debug insns into > (debug_insn 114 47 51 8 (var_location:TI D#3 (subreg:TI (reg:V1TI 91 [ p = ]) 0)) -1 > (nil)) > but it doesn't trigger here. > The IL before stv1 has: > (debug_insn 114 47 51 8 (var_location:TI D#3 (reg:TI 91 [ p ])) -1 > (nil)) > ... > (insn 63 62 64 8 (set (mem/c:TI (reg/f:DI 89 [ .result_ptr ]) [0 = .mStorage+0 S16 A32]) > (reg:TI 91 [ p ])) "pr109676.C":4:48 87 {*movti_internal} > (expr_list:REG_DEAD (reg:TI 91 [ p ]) > (nil))) > in bb 8 and > (insn 97 96 98 9 (set (reg:TI 91 [ p ]) > (mem/c:TI (plus:DI (reg/f:DI 19 frame) > (const_int -32 [0xffffffffffffffe0])) [0 p+0 S16 A128])) = "pr109676.C":26:12 87 {*movti_internal} > (nil)) > (insn 98 97 99 9 (set (mem/c:TI (plus:DI (reg/f:DI 19 frame) > (const_int -64 [0xffffffffffffffc0])) [0 tmp+0 S16 A128]) > (reg:TI 91 [ p ])) "pr109676.C":26:12 87 {*movti_internal} > (nil)) > in bb9. > PUT_MODE on a REG is done in two spots in timode_scalar_chain::convert_in= sn, > one is: > switch (GET_CODE (dst)) > { > case REG: > if (GET_MODE (dst) =3D=3D TImode) > { > PUT_MODE (dst, V1TImode); > fix_debug_reg_uses (dst); > } > if (GET_MODE (dst) =3D=3D V1TImode) > when seeing the REG in SET_DEST and another one the hunk the patch adjust= s. > Because bb 8 comes first in the order the pass walks the bbs, we first > notice the TImode pseudo on insn 63 where it is SET_SRC, use PUT_MODE the= re > unconditionally, so for a shared REG it changes all other uses in the IL, > and then don't call fix_debug_reg_uses because DF_REG_DEF_CHAIN (REGNO (s= rc)) > is non-NULL - the REG is set in insn 97 but we haven't processed it yet. > Later on we process insn 97, but because the REG in SET_DEST already has > V1TImode, we don't do anything, even when the src handling code earlier > relied on it being done. > > The following patch fixes this by using similar code for both dst and src= , > in particular calling fix_debug_reg_uses once when we actually change REG > mode from TImode to V1TImode, and not later on. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/13.2? Thanks for the clear explanation, the patch LGTM. > > 2023-05-02 Jakub Jelinek > > PR debug/109676 > * config/i386/i386-features.cc (timode_scalar_chain::convert_insn= ): > If src is REG, change its mode to V1TImode and call fix_debug_reg= _uses > for it only if it still has TImode. Don't decide whether to call > fix_debug_reg_uses based on whether SRC is ever set or not. > > * g++.target/i386/pr109676.C: New test. > > --- gcc/config/i386/i386-features.cc.jj 2023-03-03 11:18:33.100296735 +01= 00 > +++ gcc/config/i386/i386-features.cc 2023-05-01 14:50:45.559668773 +02= 00 > @@ -1635,10 +1635,11 @@ timode_scalar_chain::convert_insn (rtx_i > switch (GET_CODE (src)) > { > case REG: > - PUT_MODE (src, V1TImode); > - /* Call fix_debug_reg_uses only if SRC is never defined. */ > - if (!DF_REG_DEF_CHAIN (REGNO (src))) > - fix_debug_reg_uses (src); > + if (GET_MODE (src) =3D=3D TImode) > + { > + PUT_MODE (src, V1TImode); > + fix_debug_reg_uses (src); > + } > break; > > case MEM: > --- gcc/testsuite/g++.target/i386/pr109676.C.jj 2023-05-01 14:58:09.02432= 9438 +0200 > +++ gcc/testsuite/g++.target/i386/pr109676.C 2023-05-01 14:57:46.56665= 0471 +0200 > @@ -0,0 +1,46 @@ > +// PR debug/109676 > +// { dg-do compile { target c++11 } } > +// { dg-options "-O2 -g -march=3Dalderlake" } > + > +template > +struct A { > + T a; > + char b; > + template > + A (U x, int) : a{x} {} > + A (...); > + T foo () { return a; } > +}; > +bool bar (); > +struct B { int c, d; unsigned char e[8]; }; > +bool baz (); > +struct C { C () : f () {} B &boo () { return f; } B f; }; > + > +A > +qux () > +{ > + { > + A p; > + bool t =3D true; > + for (; bar ();) > + if (baz ()) > + { > + t =3D false; > + break; > + } > + if (t) > + p.b =3D false; > + return p; > + } > +} > + > +A > +garply () > +{ > + C g; > + A h =3D qux (); > + if (!h.b) > + return 0; > + g.boo () =3D h.foo (); > + return A{g, 0}; > +} > > Jakub > --=20 BR, Hongtao