From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw1-x112b.google.com (mail-yw1-x112b.google.com [IPv6:2607:f8b0:4864:20::112b]) by sourceware.org (Postfix) with ESMTPS id EE6183858290 for ; Mon, 6 Jun 2022 02:26:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EE6183858290 Received: by mail-yw1-x112b.google.com with SMTP id 00721157ae682-30fdbe7467cso94876087b3.1 for ; Sun, 05 Jun 2022 19:26:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=zwydgqVa6PyZt4okeJmXS5OCMRc0FKrfKbfaPI/o+zw=; b=I4u01nn5XrFpsUiWFmsA41gfw/OtU9aw0ghiYr1/ydjWnJ+H+om1HpXlCtAO71fdtB AojYUw94nzUvs+E4xbXFSjqBQEXbwaCqCiSGAngUHzLk1i6uuEV/KbIPMRQR5sU7ggPk +SG3s+/ThH7wypbKSfkazUEUwg5fXRulhBuP8iS8qmXSq/qPc5+OA/e3J13xS3x0Ub9Q WQwV5GccZVPiOj6Pz2O0xJ5ZK+yFtmrfuNvAoShVPcmKGkL2Zu+Z0rlQIL3VB015ZOTb h1IA7cFZYvAFU1epNz0O8G7ngVXDTyfKegu5cpNifCX0MBkwJxBfhlhzf1oHn7u75JdW O0GQ== X-Gm-Message-State: AOAM532ILtxmBZqiUqlhD72GXKaddDHMi4eJK29D9VafDbveGioOqNuY QQcrvZk4NP8tsV95A0CiS9//3LwnlUK7oYehVkM= X-Google-Smtp-Source: ABdhPJy1TDMKH6x6wdFyGuNUByBz96meoWy64mw2nJJ6R9KRHYq9PAc3M9Zj+tV9ESa1UQSFCOXJryvjVonvJxxLYuE= X-Received: by 2002:a81:75c6:0:b0:30c:5ed2:8a00 with SMTP id q189-20020a8175c6000000b0030c5ed28a00mr23120951ywc.186.1654482398410; Sun, 05 Jun 2022 19:26:38 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Hongtao Liu Date: Mon, 6 Jun 2022 10:26:27 +0800 Message-ID: Subject: Re: [PATCH] x86: harmonize __builtin_ia32_psadbw*() types To: Uros Bizjak Cc: Jan Beulich , Hongtao Liu , "gcc-patches@gcc.gnu.org" , "hubicka@ucw.cz" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Jun 2022 02:26:40 -0000 On Mon, Jun 6, 2022 at 3:17 AM Uros Bizjak via Gcc-patches wrote: > > On Thu, Jun 2, 2022 at 5:04 PM Jan Beulich wrote: > > > > The 64-bit, 128-bit, and 512-bit variants have VDI return type, in > > line with instruction behavior. Make the 256-bit builtin match, thus > > also making it match the insn it expands to (using VI8_AVX2_AVX512BW). > > > > gcc/ > > > > * config/i386/i386-builtin.def (__builtin_ia32_psadbw256): > > Change type. > > * config/i386/i386-builtin-types.def: New function type > > (V4DI, V32QI, V32QI). > > * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle > > V4DI_FTYPE_V32QI_V32QI. > > LGTM, but please let HJ have the final approval. I think it was just a typo and not intentional, so Ok for the trunk. > > Uros. > > > > > --- a/gcc/config/i386/i386-builtin.def > > +++ b/gcc/config/i386/i386-builtin.def > > @@ -1217,7 +1217,7 @@ BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_mulv8si3, "__builtin_ia32_pmulld256" , IX86_BUILTIN_PMULLD256 , UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI) > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_vec_widen_umult_even_v8si, "__builtin_ia32_pmuludq256", IX86_BUILTIN_PMULUDQ256, UNKNOWN, (int) V4DI_FTYPE_V8SI_V8SI) > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_iorv4di3, "__builtin_ia32_por256", IX86_BUILTIN_POR256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI) > > -BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_psadbw, "__builtin_ia32_psadbw256", IX86_BUILTIN_PSADBW256, UNKNOWN, (int) V16HI_FTYPE_V32QI_V32QI) > > +BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_psadbw, "__builtin_ia32_psadbw256", IX86_BUILTIN_PSADBW256, UNKNOWN, (int) V4DI_FTYPE_V32QI_V32QI) > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufbv32qi3, "__builtin_ia32_pshufb256", IX86_BUILTIN_PSHUFB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufdv3, "__builtin_ia32_pshufd256", IX86_BUILTIN_PSHUFD256, UNKNOWN, (int) V8SI_FTYPE_V8SI_INT) > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufhwv3, "__builtin_ia32_pshufhw256", IX86_BUILTIN_PSHUFHW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_INT) > > --- a/gcc/config/i386/i386-builtin-types.def > > +++ b/gcc/config/i386/i386-builtin-types.def > > @@ -516,6 +516,7 @@ DEF_FUNCTION_TYPE (V8DI, V8DI, V2DI, INT > > DEF_FUNCTION_TYPE (V8DI, V8DI, V2DI, INT, V8DI, UQI) > > DEF_FUNCTION_TYPE (V8DI, V8DI, V4DI, INT, V8DI, UQI) > > DEF_FUNCTION_TYPE (V4DI, V8SI, V8SI) > > +DEF_FUNCTION_TYPE (V4DI, V32QI, V32QI) > > DEF_FUNCTION_TYPE (V8DI, V64QI, V64QI) > > DEF_FUNCTION_TYPE (V4DI, V4DI, V2DI) > > DEF_FUNCTION_TYPE (V4DI, PCV4DI, V4DI) > > --- a/gcc/config/i386/i386-expand.cc > > +++ b/gcc/config/i386/i386-expand.cc > > @@ -10359,6 +10359,7 @@ ix86_expand_args_builtin (const struct b > > case V8SI_FTYPE_V16HI_V16HI: > > case V4DI_FTYPE_V4DI_V4DI: > > case V4DI_FTYPE_V8SI_V8SI: > > + case V4DI_FTYPE_V32QI_V32QI: > > case V8DI_FTYPE_V64QI_V64QI: > > if (comparison == UNKNOWN) > > return ix86_expand_binop_builtin (icode, exp, target); > > -- BR, Hongtao